1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=bonaire -O0 -run-pass=legalizer -o - %s | FileCheck %s
3# RUN: not --crash llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -O0 -run-pass=legalizer -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERROR %s
4
5# ERROR: LLVM ERROR: unable to legalize instruction: %2:_(s32) = G_ATOMICRMW_XCHG %0:_(p0), %1:_ :: (load store seq_cst 4) (in function: atomicrmw_xchg_flat_i32)
6
7
8---
9name: atomicrmw_xchg_flat_i32
10
11body: |
12  bb.0:
13    liveins: $sgpr0_sgpr1, $sgpr2
14    ; CHECK-LABEL: name: atomicrmw_xchg_flat_i32
15    ; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $sgpr0_sgpr1
16    ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr2
17    ; CHECK: [[ATOMICRMW_XCHG:%[0-9]+]]:_(s32) = G_ATOMICRMW_XCHG [[COPY]](p0), [[COPY1]] :: (load store seq_cst 4)
18    %0:_(p0) = COPY $sgpr0_sgpr1
19    %1:_(s32) = COPY $sgpr2
20    %2:_(s32) = G_ATOMICRMW_XCHG %0, %1 :: (load store seq_cst 4, addrspace 0)
21...
22
23---
24name: atomicrmw_xchg_flat_i64
25
26body: |
27  bb.0:
28    liveins: $sgpr0_sgpr1, $sgpr2
29    ; CHECK-LABEL: name: atomicrmw_xchg_flat_i64
30    ; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $sgpr0_sgpr1
31    ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr2
32    ; CHECK: [[ATOMICRMW_XCHG:%[0-9]+]]:_(s32) = G_ATOMICRMW_XCHG [[COPY]](p0), [[COPY1]] :: (load store seq_cst 4)
33    %0:_(p0) = COPY $sgpr0_sgpr1
34    %1:_(s32) = COPY $sgpr2
35    %2:_(s32) = G_ATOMICRMW_XCHG %0, %1 :: (load store seq_cst 4, addrspace 0)
36...
37