1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -run-pass=legalizer %s -o - | FileCheck -check-prefix=SI %s
3# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -run-pass=legalizer %s -o - | FileCheck -check-prefix=VI %s
4
5---
6name: test_fptosi_s32_to_s32
7body: |
8  bb.0:
9    liveins: $vgpr0
10
11    ; SI-LABEL: name: test_fptosi_s32_to_s32
12    ; SI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
13    ; SI: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s32)
14    ; SI: $vgpr0 = COPY [[FPTOSI]](s32)
15    ; VI-LABEL: name: test_fptosi_s32_to_s32
16    ; VI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
17    ; VI: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s32)
18    ; VI: $vgpr0 = COPY [[FPTOSI]](s32)
19    %0:_(s32) = COPY $vgpr0
20    %1:_(s32) = G_FPTOSI %0
21    $vgpr0 = COPY %1
22...
23
24---
25name: test_fptosi_s64_to_s32
26body: |
27  bb.0:
28    liveins: $vgpr0_vgpr1
29
30    ; SI-LABEL: name: test_fptosi_s64_to_s32
31    ; SI: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
32    ; SI: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s64)
33    ; SI: $vgpr0 = COPY [[FPTOSI]](s32)
34    ; VI-LABEL: name: test_fptosi_s64_to_s32
35    ; VI: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
36    ; VI: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s64)
37    ; VI: $vgpr0 = COPY [[FPTOSI]](s32)
38    %0:_(s64) = COPY $vgpr0_vgpr1
39    %1:_(s32) = G_FPTOSI %0
40    $vgpr0 = COPY %1
41...
42
43---
44name: test_fptosi_v2s32_to_v2s32
45body: |
46  bb.0:
47    liveins: $vgpr0_vgpr1
48
49    ; SI-LABEL: name: test_fptosi_v2s32_to_v2s32
50    ; SI: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
51    ; SI: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)
52    ; SI: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[UV]](s32)
53    ; SI: [[FPTOSI1:%[0-9]+]]:_(s32) = G_FPTOSI [[UV1]](s32)
54    ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[FPTOSI]](s32), [[FPTOSI1]](s32)
55    ; SI: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>)
56    ; VI-LABEL: name: test_fptosi_v2s32_to_v2s32
57    ; VI: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
58    ; VI: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)
59    ; VI: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[UV]](s32)
60    ; VI: [[FPTOSI1:%[0-9]+]]:_(s32) = G_FPTOSI [[UV1]](s32)
61    ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[FPTOSI]](s32), [[FPTOSI1]](s32)
62    ; VI: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>)
63    %0:_(<2 x s32>) = COPY $vgpr0_vgpr1
64    %1:_(<2 x s32>) = G_FPTOSI %0
65    $vgpr0_vgpr1 = COPY %1
66...
67
68---
69name: test_fptosi_v2s64_to_v2s32
70body: |
71  bb.0:
72    liveins: $vgpr0_vgpr1_vgpr2_vgpr3
73
74    ; SI-LABEL: name: test_fptosi_v2s64_to_v2s32
75    ; SI: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
76    ; SI: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>)
77    ; SI: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[UV]](s64)
78    ; SI: [[FPTOSI1:%[0-9]+]]:_(s32) = G_FPTOSI [[UV1]](s64)
79    ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[FPTOSI]](s32), [[FPTOSI1]](s32)
80    ; SI: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>)
81    ; VI-LABEL: name: test_fptosi_v2s64_to_v2s32
82    ; VI: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
83    ; VI: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>)
84    ; VI: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[UV]](s64)
85    ; VI: [[FPTOSI1:%[0-9]+]]:_(s32) = G_FPTOSI [[UV1]](s64)
86    ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[FPTOSI]](s32), [[FPTOSI1]](s32)
87    ; VI: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>)
88    %0:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
89    %1:_(<2 x s32>) = G_FPTOSI %0
90    $vgpr0_vgpr1 = COPY %1
91...
92
93---
94name: test_fptosi_s16_to_s16
95body: |
96  bb.0:
97    liveins: $vgpr0
98
99    ; SI-LABEL: name: test_fptosi_s16_to_s16
100    ; SI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
101    ; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
102    ; SI: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC]](s16)
103    ; SI: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[FPEXT]](s32)
104    ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[FPTOSI]](s32)
105    ; SI: $vgpr0 = COPY [[COPY1]](s32)
106    ; VI-LABEL: name: test_fptosi_s16_to_s16
107    ; VI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
108    ; VI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
109    ; VI: [[FPTOSI:%[0-9]+]]:_(s16) = G_FPTOSI [[TRUNC]](s16)
110    ; VI: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[FPTOSI]](s16)
111    ; VI: $vgpr0 = COPY [[ANYEXT]](s32)
112    %0:_(s32) = COPY $vgpr0
113    %1:_(s16) = G_TRUNC %0
114    %2:_(s16) = G_FPTOSI %1
115    %3:_(s32) = G_ANYEXT %2
116    $vgpr0 = COPY %3
117...
118
119---
120name: test_fptosi_s32_to_s16
121body: |
122  bb.0:
123    liveins: $vgpr0
124
125    ; SI-LABEL: name: test_fptosi_s32_to_s16
126    ; SI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
127    ; SI: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s32)
128    ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[FPTOSI]](s32)
129    ; SI: $vgpr0 = COPY [[COPY1]](s32)
130    ; VI-LABEL: name: test_fptosi_s32_to_s16
131    ; VI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
132    ; VI: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s32)
133    ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[FPTOSI]](s32)
134    ; VI: $vgpr0 = COPY [[COPY1]](s32)
135    %0:_(s32) = COPY $vgpr0
136    %1:_(s16) = G_FPTOSI %0
137    %2:_(s32) = G_ANYEXT %1
138    $vgpr0 = COPY %2
139...
140
141---
142name: test_fptosi_s64_to_s16
143body: |
144  bb.0:
145    liveins: $vgpr0_vgpr1
146
147    ; SI-LABEL: name: test_fptosi_s64_to_s16
148    ; SI: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
149    ; SI: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s64)
150    ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[FPTOSI]](s32)
151    ; SI: $vgpr0 = COPY [[COPY1]](s32)
152    ; VI-LABEL: name: test_fptosi_s64_to_s16
153    ; VI: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
154    ; VI: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s64)
155    ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[FPTOSI]](s32)
156    ; VI: $vgpr0 = COPY [[COPY1]](s32)
157    %0:_(s64) = COPY $vgpr0_vgpr1
158    %1:_(s16) = G_FPTOSI %0
159    %2:_(s32) = G_ANYEXT %1
160    $vgpr0 = COPY %2
161...
162
163---
164name: test_fptosi_s64_s64
165body: |
166  bb.0:
167    liveins: $vgpr0_vgpr1
168
169    ; SI-LABEL: name: test_fptosi_s64_s64
170    ; SI: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
171    ; SI: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s64)
172    ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 20
173    ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 11
174    ; SI: [[INT:%[0-9]+]]:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.ubfe), [[UV1]](s32), [[C]](s32), [[C1]](s32)
175    ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1023
176    ; SI: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[INT]], [[C2]]
177    ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
178    ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[UV1]], [[C3]]
179    ; SI: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 4503599627370495
180    ; SI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
181    ; SI: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[C5]](s32), [[AND]](s32)
182    ; SI: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[C4]], [[SUB]](s32)
183    ; SI: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1
184    ; SI: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[ASHR]], [[C6]]
185    ; SI: [[AND1:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[XOR]]
186    ; SI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 51
187    ; SI: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[SUB]](s32), [[C5]]
188    ; SI: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(sgt), [[SUB]](s32), [[C7]]
189    ; SI: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[MV]], [[AND1]]
190    ; SI: [[SELECT1:%[0-9]+]]:_(s64) = G_SELECT [[ICMP1]](s1), [[COPY]], [[SELECT]]
191    ; SI: [[C8:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x3DF0000000000000
192    ; SI: [[C9:%[0-9]+]]:_(s64) = G_FCONSTANT double 0xC1F0000000000000
193    ; SI: [[FMUL:%[0-9]+]]:_(s64) = G_FMUL [[SELECT1]], [[C8]]
194    ; SI: [[INT1:%[0-9]+]]:_(s64) = G_INTRINSIC intrinsic(@llvm.amdgcn.fract), [[FMUL]](s64)
195    ; SI: [[C10:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x3FEFFFFFFFFFFFFF
196    ; SI: [[FMINNUM_IEEE:%[0-9]+]]:_(s64) = G_FMINNUM_IEEE [[INT1]], [[C10]]
197    ; SI: [[FCMP:%[0-9]+]]:_(s1) = G_FCMP floatpred(ord), [[FMUL]](s64), [[FMUL]]
198    ; SI: [[SELECT2:%[0-9]+]]:_(s64) = G_SELECT [[FCMP]](s1), [[FMUL]], [[FMINNUM_IEEE]]
199    ; SI: [[FNEG:%[0-9]+]]:_(s64) = G_FNEG [[SELECT2]]
200    ; SI: [[FADD:%[0-9]+]]:_(s64) = G_FADD [[FMUL]], [[FNEG]]
201    ; SI: [[FMA:%[0-9]+]]:_(s64) = G_FMA [[FADD]], [[C9]], [[SELECT1]]
202    ; SI: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[FADD]](s64)
203    ; SI: [[FPTOUI:%[0-9]+]]:_(s32) = G_FPTOUI [[FMA]](s64)
204    ; SI: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[FPTOUI]](s32), [[FPTOSI]](s32)
205    ; SI: $vgpr0_vgpr1 = COPY [[MV1]](s64)
206    ; VI-LABEL: name: test_fptosi_s64_s64
207    ; VI: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
208    ; VI: [[INTRINSIC_TRUNC:%[0-9]+]]:_(s64) = G_INTRINSIC_TRUNC [[COPY]]
209    ; VI: [[C:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x3DF0000000000000
210    ; VI: [[C1:%[0-9]+]]:_(s64) = G_FCONSTANT double 0xC1F0000000000000
211    ; VI: [[FMUL:%[0-9]+]]:_(s64) = G_FMUL [[INTRINSIC_TRUNC]], [[C]]
212    ; VI: [[FFLOOR:%[0-9]+]]:_(s64) = G_FFLOOR [[FMUL]]
213    ; VI: [[FMA:%[0-9]+]]:_(s64) = G_FMA [[FFLOOR]], [[C1]], [[INTRINSIC_TRUNC]]
214    ; VI: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[FFLOOR]](s64)
215    ; VI: [[FPTOUI:%[0-9]+]]:_(s32) = G_FPTOUI [[FMA]](s64)
216    ; VI: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[FPTOUI]](s32), [[FPTOSI]](s32)
217    ; VI: $vgpr0_vgpr1 = COPY [[MV]](s64)
218    %0:_(s64) = COPY $vgpr0_vgpr1
219    %1:_(s64) = G_FPTOSI %0
220    $vgpr0_vgpr1 = COPY %1
221...
222
223---
224name: test_fptosi_s64_s64_flags
225body: |
226  bb.0:
227    liveins: $vgpr0_vgpr1
228
229    ; SI-LABEL: name: test_fptosi_s64_s64_flags
230    ; SI: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
231    ; SI: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s64)
232    ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 20
233    ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 11
234    ; SI: [[INT:%[0-9]+]]:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.ubfe), [[UV1]](s32), [[C]](s32), [[C1]](s32)
235    ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1023
236    ; SI: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[INT]], [[C2]]
237    ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
238    ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[UV1]], [[C3]]
239    ; SI: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 4503599627370495
240    ; SI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
241    ; SI: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[C5]](s32), [[AND]](s32)
242    ; SI: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[C4]], [[SUB]](s32)
243    ; SI: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1
244    ; SI: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[ASHR]], [[C6]]
245    ; SI: [[AND1:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[XOR]]
246    ; SI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 51
247    ; SI: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[SUB]](s32), [[C5]]
248    ; SI: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(sgt), [[SUB]](s32), [[C7]]
249    ; SI: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[MV]], [[AND1]]
250    ; SI: [[SELECT1:%[0-9]+]]:_(s64) = G_SELECT [[ICMP1]](s1), [[COPY]], [[SELECT]]
251    ; SI: [[C8:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x3DF0000000000000
252    ; SI: [[C9:%[0-9]+]]:_(s64) = G_FCONSTANT double 0xC1F0000000000000
253    ; SI: [[FMUL:%[0-9]+]]:_(s64) = nnan G_FMUL [[SELECT1]], [[C8]]
254    ; SI: [[INT1:%[0-9]+]]:_(s64) = nnan G_INTRINSIC intrinsic(@llvm.amdgcn.fract), [[FMUL]](s64)
255    ; SI: [[C10:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x3FEFFFFFFFFFFFFF
256    ; SI: [[FMINNUM_IEEE:%[0-9]+]]:_(s64) = nnan G_FMINNUM_IEEE [[INT1]], [[C10]]
257    ; SI: [[FNEG:%[0-9]+]]:_(s64) = nnan G_FNEG [[FMINNUM_IEEE]]
258    ; SI: [[FADD:%[0-9]+]]:_(s64) = nnan G_FADD [[FMUL]], [[FNEG]]
259    ; SI: [[FMA:%[0-9]+]]:_(s64) = nnan G_FMA [[FADD]], [[C9]], [[SELECT1]]
260    ; SI: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[FADD]](s64)
261    ; SI: [[FPTOUI:%[0-9]+]]:_(s32) = G_FPTOUI [[FMA]](s64)
262    ; SI: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[FPTOUI]](s32), [[FPTOSI]](s32)
263    ; SI: $vgpr0_vgpr1 = COPY [[MV1]](s64)
264    ; VI-LABEL: name: test_fptosi_s64_s64_flags
265    ; VI: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
266    ; VI: [[INTRINSIC_TRUNC:%[0-9]+]]:_(s64) = nnan G_INTRINSIC_TRUNC [[COPY]]
267    ; VI: [[C:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x3DF0000000000000
268    ; VI: [[C1:%[0-9]+]]:_(s64) = G_FCONSTANT double 0xC1F0000000000000
269    ; VI: [[FMUL:%[0-9]+]]:_(s64) = nnan G_FMUL [[INTRINSIC_TRUNC]], [[C]]
270    ; VI: [[FFLOOR:%[0-9]+]]:_(s64) = nnan G_FFLOOR [[FMUL]]
271    ; VI: [[FMA:%[0-9]+]]:_(s64) = nnan G_FMA [[FFLOOR]], [[C1]], [[INTRINSIC_TRUNC]]
272    ; VI: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[FFLOOR]](s64)
273    ; VI: [[FPTOUI:%[0-9]+]]:_(s32) = G_FPTOUI [[FMA]](s64)
274    ; VI: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[FPTOUI]](s32), [[FPTOSI]](s32)
275    ; VI: $vgpr0_vgpr1 = COPY [[MV]](s64)
276    %0:_(s64) = COPY $vgpr0_vgpr1
277    %1:_(s64) = nnan G_FPTOSI %0
278    $vgpr0_vgpr1 = COPY %1
279...
280
281---
282name: test_fptosi_v2s64_to_v2s64
283body: |
284  bb.0:
285    liveins: $vgpr0_vgpr1_vgpr2_vgpr3
286
287    ; SI-LABEL: name: test_fptosi_v2s64_to_v2s64
288    ; SI: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
289    ; SI: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>)
290    ; SI: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[UV]](s64)
291    ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 20
292    ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 11
293    ; SI: [[INT:%[0-9]+]]:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.ubfe), [[UV3]](s32), [[C]](s32), [[C1]](s32)
294    ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1023
295    ; SI: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[INT]], [[C2]]
296    ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
297    ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[UV3]], [[C3]]
298    ; SI: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 4503599627370495
299    ; SI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
300    ; SI: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[C5]](s32), [[AND]](s32)
301    ; SI: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[C4]], [[SUB]](s32)
302    ; SI: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1
303    ; SI: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[ASHR]], [[C6]]
304    ; SI: [[AND1:%[0-9]+]]:_(s64) = G_AND [[UV]], [[XOR]]
305    ; SI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 51
306    ; SI: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[SUB]](s32), [[C5]]
307    ; SI: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(sgt), [[SUB]](s32), [[C7]]
308    ; SI: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[MV]], [[AND1]]
309    ; SI: [[SELECT1:%[0-9]+]]:_(s64) = G_SELECT [[ICMP1]](s1), [[UV]], [[SELECT]]
310    ; SI: [[C8:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x3DF0000000000000
311    ; SI: [[C9:%[0-9]+]]:_(s64) = G_FCONSTANT double 0xC1F0000000000000
312    ; SI: [[FMUL:%[0-9]+]]:_(s64) = G_FMUL [[SELECT1]], [[C8]]
313    ; SI: [[INT1:%[0-9]+]]:_(s64) = G_INTRINSIC intrinsic(@llvm.amdgcn.fract), [[FMUL]](s64)
314    ; SI: [[C10:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x3FEFFFFFFFFFFFFF
315    ; SI: [[FMINNUM_IEEE:%[0-9]+]]:_(s64) = G_FMINNUM_IEEE [[INT1]], [[C10]]
316    ; SI: [[FCMP:%[0-9]+]]:_(s1) = G_FCMP floatpred(ord), [[FMUL]](s64), [[FMUL]]
317    ; SI: [[SELECT2:%[0-9]+]]:_(s64) = G_SELECT [[FCMP]](s1), [[FMUL]], [[FMINNUM_IEEE]]
318    ; SI: [[FNEG:%[0-9]+]]:_(s64) = G_FNEG [[SELECT2]]
319    ; SI: [[FADD:%[0-9]+]]:_(s64) = G_FADD [[FMUL]], [[FNEG]]
320    ; SI: [[FMA:%[0-9]+]]:_(s64) = G_FMA [[FADD]], [[C9]], [[SELECT1]]
321    ; SI: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[FADD]](s64)
322    ; SI: [[FPTOUI:%[0-9]+]]:_(s32) = G_FPTOUI [[FMA]](s64)
323    ; SI: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[FPTOUI]](s32), [[FPTOSI]](s32)
324    ; SI: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[UV1]](s64)
325    ; SI: [[INT2:%[0-9]+]]:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.ubfe), [[UV5]](s32), [[C]](s32), [[C1]](s32)
326    ; SI: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[INT2]], [[C2]]
327    ; SI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[UV5]], [[C3]]
328    ; SI: [[MV2:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[C5]](s32), [[AND2]](s32)
329    ; SI: [[ASHR1:%[0-9]+]]:_(s64) = G_ASHR [[C4]], [[SUB1]](s32)
330    ; SI: [[XOR1:%[0-9]+]]:_(s64) = G_XOR [[ASHR1]], [[C6]]
331    ; SI: [[AND3:%[0-9]+]]:_(s64) = G_AND [[UV1]], [[XOR1]]
332    ; SI: [[ICMP2:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[SUB1]](s32), [[C5]]
333    ; SI: [[ICMP3:%[0-9]+]]:_(s1) = G_ICMP intpred(sgt), [[SUB1]](s32), [[C7]]
334    ; SI: [[SELECT3:%[0-9]+]]:_(s64) = G_SELECT [[ICMP2]](s1), [[MV2]], [[AND3]]
335    ; SI: [[SELECT4:%[0-9]+]]:_(s64) = G_SELECT [[ICMP3]](s1), [[UV1]], [[SELECT3]]
336    ; SI: [[FMUL1:%[0-9]+]]:_(s64) = G_FMUL [[SELECT4]], [[C8]]
337    ; SI: [[INT3:%[0-9]+]]:_(s64) = G_INTRINSIC intrinsic(@llvm.amdgcn.fract), [[FMUL1]](s64)
338    ; SI: [[FMINNUM_IEEE1:%[0-9]+]]:_(s64) = G_FMINNUM_IEEE [[INT3]], [[C10]]
339    ; SI: [[FCMP1:%[0-9]+]]:_(s1) = G_FCMP floatpred(ord), [[FMUL1]](s64), [[FMUL1]]
340    ; SI: [[SELECT5:%[0-9]+]]:_(s64) = G_SELECT [[FCMP1]](s1), [[FMUL1]], [[FMINNUM_IEEE1]]
341    ; SI: [[FNEG1:%[0-9]+]]:_(s64) = G_FNEG [[SELECT5]]
342    ; SI: [[FADD1:%[0-9]+]]:_(s64) = G_FADD [[FMUL1]], [[FNEG1]]
343    ; SI: [[FMA1:%[0-9]+]]:_(s64) = G_FMA [[FADD1]], [[C9]], [[SELECT4]]
344    ; SI: [[FPTOSI1:%[0-9]+]]:_(s32) = G_FPTOSI [[FADD1]](s64)
345    ; SI: [[FPTOUI1:%[0-9]+]]:_(s32) = G_FPTOUI [[FMA1]](s64)
346    ; SI: [[MV3:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[FPTOUI1]](s32), [[FPTOSI1]](s32)
347    ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[MV1]](s64), [[MV3]](s64)
348    ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>)
349    ; VI-LABEL: name: test_fptosi_v2s64_to_v2s64
350    ; VI: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
351    ; VI: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>)
352    ; VI: [[INTRINSIC_TRUNC:%[0-9]+]]:_(s64) = G_INTRINSIC_TRUNC [[UV]]
353    ; VI: [[C:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x3DF0000000000000
354    ; VI: [[C1:%[0-9]+]]:_(s64) = G_FCONSTANT double 0xC1F0000000000000
355    ; VI: [[FMUL:%[0-9]+]]:_(s64) = G_FMUL [[INTRINSIC_TRUNC]], [[C]]
356    ; VI: [[FFLOOR:%[0-9]+]]:_(s64) = G_FFLOOR [[FMUL]]
357    ; VI: [[FMA:%[0-9]+]]:_(s64) = G_FMA [[FFLOOR]], [[C1]], [[INTRINSIC_TRUNC]]
358    ; VI: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[FFLOOR]](s64)
359    ; VI: [[FPTOUI:%[0-9]+]]:_(s32) = G_FPTOUI [[FMA]](s64)
360    ; VI: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[FPTOUI]](s32), [[FPTOSI]](s32)
361    ; VI: [[INTRINSIC_TRUNC1:%[0-9]+]]:_(s64) = G_INTRINSIC_TRUNC [[UV1]]
362    ; VI: [[FMUL1:%[0-9]+]]:_(s64) = G_FMUL [[INTRINSIC_TRUNC1]], [[C]]
363    ; VI: [[FFLOOR1:%[0-9]+]]:_(s64) = G_FFLOOR [[FMUL1]]
364    ; VI: [[FMA1:%[0-9]+]]:_(s64) = G_FMA [[FFLOOR1]], [[C1]], [[INTRINSIC_TRUNC1]]
365    ; VI: [[FPTOSI1:%[0-9]+]]:_(s32) = G_FPTOSI [[FFLOOR1]](s64)
366    ; VI: [[FPTOUI1:%[0-9]+]]:_(s32) = G_FPTOUI [[FMA1]](s64)
367    ; VI: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[FPTOUI1]](s32), [[FPTOSI1]](s32)
368    ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[MV]](s64), [[MV1]](s64)
369    ; VI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>)
370    %0:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
371    %1:_(<2 x s64>) = G_FPTOSI %0
372    $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1
373...
374
375---
376name: test_fptosi_s32_to_s64
377body: |
378  bb.0:
379    liveins: $vgpr0
380
381    ; SI-LABEL: name: test_fptosi_s32_to_s64
382    ; SI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
383    ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2139095040
384    ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 23
385    ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]
386    ; SI: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[AND]], [[C1]](s32)
387    ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
388    ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C2]]
389    ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 31
390    ; SI: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[AND1]], [[C3]](s32)
391    ; SI: [[SEXT:%[0-9]+]]:_(s64) = G_SEXT [[ASHR]](s32)
392    ; SI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8388607
393    ; SI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C4]]
394    ; SI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 8388608
395    ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[C5]]
396    ; SI: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[OR]](s32)
397    ; SI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 127
398    ; SI: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[LSHR]], [[C6]]
399    ; SI: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[SUB]], [[C1]]
400    ; SI: [[SUB2:%[0-9]+]]:_(s32) = G_SUB [[C1]], [[SUB]]
401    ; SI: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[ZEXT]], [[SUB1]](s32)
402    ; SI: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[ZEXT]], [[SUB2]](s32)
403    ; SI: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(sgt), [[SUB]](s32), [[C1]]
404    ; SI: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[SHL]], [[LSHR1]]
405    ; SI: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[SELECT]], [[SEXT]]
406    ; SI: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[XOR]](s64)
407    ; SI: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[SEXT]](s64)
408    ; SI: [[USUBO:%[0-9]+]]:_(s32), [[USUBO1:%[0-9]+]]:_(s1) = G_USUBO [[UV]], [[UV2]]
409    ; SI: [[USUBE:%[0-9]+]]:_(s32), [[USUBE1:%[0-9]+]]:_(s1) = G_USUBE [[UV1]], [[UV3]], [[USUBO1]]
410    ; SI: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[USUBO]](s32), [[USUBE]](s32)
411    ; SI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
412    ; SI: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[SUB]](s32), [[C7]]
413    ; SI: [[C8:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
414    ; SI: [[SELECT1:%[0-9]+]]:_(s64) = G_SELECT [[ICMP1]](s1), [[C8]], [[MV]]
415    ; SI: $vgpr0_vgpr1 = COPY [[SELECT1]](s64)
416    ; VI-LABEL: name: test_fptosi_s32_to_s64
417    ; VI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
418    ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2139095040
419    ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 23
420    ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]
421    ; VI: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[AND]], [[C1]](s32)
422    ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
423    ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C2]]
424    ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 31
425    ; VI: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[AND1]], [[C3]](s32)
426    ; VI: [[SEXT:%[0-9]+]]:_(s64) = G_SEXT [[ASHR]](s32)
427    ; VI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8388607
428    ; VI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C4]]
429    ; VI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 8388608
430    ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[C5]]
431    ; VI: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[OR]](s32)
432    ; VI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 127
433    ; VI: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[LSHR]], [[C6]]
434    ; VI: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[SUB]], [[C1]]
435    ; VI: [[SUB2:%[0-9]+]]:_(s32) = G_SUB [[C1]], [[SUB]]
436    ; VI: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[ZEXT]], [[SUB1]](s32)
437    ; VI: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[ZEXT]], [[SUB2]](s32)
438    ; VI: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(sgt), [[SUB]](s32), [[C1]]
439    ; VI: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[SHL]], [[LSHR1]]
440    ; VI: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[SELECT]], [[SEXT]]
441    ; VI: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[XOR]](s64)
442    ; VI: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[SEXT]](s64)
443    ; VI: [[USUBO:%[0-9]+]]:_(s32), [[USUBO1:%[0-9]+]]:_(s1) = G_USUBO [[UV]], [[UV2]]
444    ; VI: [[USUBE:%[0-9]+]]:_(s32), [[USUBE1:%[0-9]+]]:_(s1) = G_USUBE [[UV1]], [[UV3]], [[USUBO1]]
445    ; VI: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[USUBO]](s32), [[USUBE]](s32)
446    ; VI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
447    ; VI: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[SUB]](s32), [[C7]]
448    ; VI: [[C8:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
449    ; VI: [[SELECT1:%[0-9]+]]:_(s64) = G_SELECT [[ICMP1]](s1), [[C8]], [[MV]]
450    ; VI: $vgpr0_vgpr1 = COPY [[SELECT1]](s64)
451    %0:_(s32) = COPY $vgpr0
452    %1:_(s64) = G_FPTOSI %0
453    $vgpr0_vgpr1 = COPY %1
454...
455
456---
457name: test_fptosi_v2s32_to_v2s64
458body: |
459  bb.0:
460    liveins: $vgpr0_vgpr1
461
462    ; SI-LABEL: name: test_fptosi_v2s32_to_v2s64
463    ; SI: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
464    ; SI: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)
465    ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2139095040
466    ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 23
467    ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[UV]], [[C]]
468    ; SI: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[AND]], [[C1]](s32)
469    ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
470    ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[UV]], [[C2]]
471    ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 31
472    ; SI: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[AND1]], [[C3]](s32)
473    ; SI: [[SEXT:%[0-9]+]]:_(s64) = G_SEXT [[ASHR]](s32)
474    ; SI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8388607
475    ; SI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[UV]], [[C4]]
476    ; SI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 8388608
477    ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[C5]]
478    ; SI: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[OR]](s32)
479    ; SI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 127
480    ; SI: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[LSHR]], [[C6]]
481    ; SI: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[SUB]], [[C1]]
482    ; SI: [[SUB2:%[0-9]+]]:_(s32) = G_SUB [[C1]], [[SUB]]
483    ; SI: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[ZEXT]], [[SUB1]](s32)
484    ; SI: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[ZEXT]], [[SUB2]](s32)
485    ; SI: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(sgt), [[SUB]](s32), [[C1]]
486    ; SI: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[SHL]], [[LSHR1]]
487    ; SI: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[SELECT]], [[SEXT]]
488    ; SI: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[XOR]](s64)
489    ; SI: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[SEXT]](s64)
490    ; SI: [[USUBO:%[0-9]+]]:_(s32), [[USUBO1:%[0-9]+]]:_(s1) = G_USUBO [[UV2]], [[UV4]]
491    ; SI: [[USUBE:%[0-9]+]]:_(s32), [[USUBE1:%[0-9]+]]:_(s1) = G_USUBE [[UV3]], [[UV5]], [[USUBO1]]
492    ; SI: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[USUBO]](s32), [[USUBE]](s32)
493    ; SI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
494    ; SI: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[SUB]](s32), [[C7]]
495    ; SI: [[C8:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
496    ; SI: [[SELECT1:%[0-9]+]]:_(s64) = G_SELECT [[ICMP1]](s1), [[C8]], [[MV]]
497    ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[UV1]], [[C]]
498    ; SI: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[AND3]], [[C1]](s32)
499    ; SI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[UV1]], [[C2]]
500    ; SI: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[AND4]], [[C3]](s32)
501    ; SI: [[SEXT1:%[0-9]+]]:_(s64) = G_SEXT [[ASHR1]](s32)
502    ; SI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[UV1]], [[C4]]
503    ; SI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND5]], [[C5]]
504    ; SI: [[ZEXT1:%[0-9]+]]:_(s64) = G_ZEXT [[OR1]](s32)
505    ; SI: [[SUB3:%[0-9]+]]:_(s32) = G_SUB [[LSHR2]], [[C6]]
506    ; SI: [[SUB4:%[0-9]+]]:_(s32) = G_SUB [[SUB3]], [[C1]]
507    ; SI: [[SUB5:%[0-9]+]]:_(s32) = G_SUB [[C1]], [[SUB3]]
508    ; SI: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[ZEXT1]], [[SUB4]](s32)
509    ; SI: [[LSHR3:%[0-9]+]]:_(s64) = G_LSHR [[ZEXT1]], [[SUB5]](s32)
510    ; SI: [[ICMP2:%[0-9]+]]:_(s1) = G_ICMP intpred(sgt), [[SUB3]](s32), [[C1]]
511    ; SI: [[SELECT2:%[0-9]+]]:_(s64) = G_SELECT [[ICMP2]](s1), [[SHL1]], [[LSHR3]]
512    ; SI: [[XOR1:%[0-9]+]]:_(s64) = G_XOR [[SELECT2]], [[SEXT1]]
513    ; SI: [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[XOR1]](s64)
514    ; SI: [[UV8:%[0-9]+]]:_(s32), [[UV9:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[SEXT1]](s64)
515    ; SI: [[USUBO2:%[0-9]+]]:_(s32), [[USUBO3:%[0-9]+]]:_(s1) = G_USUBO [[UV6]], [[UV8]]
516    ; SI: [[USUBE2:%[0-9]+]]:_(s32), [[USUBE3:%[0-9]+]]:_(s1) = G_USUBE [[UV7]], [[UV9]], [[USUBO3]]
517    ; SI: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[USUBO2]](s32), [[USUBE2]](s32)
518    ; SI: [[ICMP3:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[SUB3]](s32), [[C7]]
519    ; SI: [[SELECT3:%[0-9]+]]:_(s64) = G_SELECT [[ICMP3]](s1), [[C8]], [[MV1]]
520    ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[SELECT1]](s64), [[SELECT3]](s64)
521    ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>)
522    ; VI-LABEL: name: test_fptosi_v2s32_to_v2s64
523    ; VI: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
524    ; VI: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)
525    ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2139095040
526    ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 23
527    ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[UV]], [[C]]
528    ; VI: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[AND]], [[C1]](s32)
529    ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
530    ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[UV]], [[C2]]
531    ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 31
532    ; VI: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[AND1]], [[C3]](s32)
533    ; VI: [[SEXT:%[0-9]+]]:_(s64) = G_SEXT [[ASHR]](s32)
534    ; VI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8388607
535    ; VI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[UV]], [[C4]]
536    ; VI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 8388608
537    ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[C5]]
538    ; VI: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[OR]](s32)
539    ; VI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 127
540    ; VI: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[LSHR]], [[C6]]
541    ; VI: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[SUB]], [[C1]]
542    ; VI: [[SUB2:%[0-9]+]]:_(s32) = G_SUB [[C1]], [[SUB]]
543    ; VI: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[ZEXT]], [[SUB1]](s32)
544    ; VI: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[ZEXT]], [[SUB2]](s32)
545    ; VI: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(sgt), [[SUB]](s32), [[C1]]
546    ; VI: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[SHL]], [[LSHR1]]
547    ; VI: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[SELECT]], [[SEXT]]
548    ; VI: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[XOR]](s64)
549    ; VI: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[SEXT]](s64)
550    ; VI: [[USUBO:%[0-9]+]]:_(s32), [[USUBO1:%[0-9]+]]:_(s1) = G_USUBO [[UV2]], [[UV4]]
551    ; VI: [[USUBE:%[0-9]+]]:_(s32), [[USUBE1:%[0-9]+]]:_(s1) = G_USUBE [[UV3]], [[UV5]], [[USUBO1]]
552    ; VI: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[USUBO]](s32), [[USUBE]](s32)
553    ; VI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
554    ; VI: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[SUB]](s32), [[C7]]
555    ; VI: [[C8:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
556    ; VI: [[SELECT1:%[0-9]+]]:_(s64) = G_SELECT [[ICMP1]](s1), [[C8]], [[MV]]
557    ; VI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[UV1]], [[C]]
558    ; VI: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[AND3]], [[C1]](s32)
559    ; VI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[UV1]], [[C2]]
560    ; VI: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[AND4]], [[C3]](s32)
561    ; VI: [[SEXT1:%[0-9]+]]:_(s64) = G_SEXT [[ASHR1]](s32)
562    ; VI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[UV1]], [[C4]]
563    ; VI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND5]], [[C5]]
564    ; VI: [[ZEXT1:%[0-9]+]]:_(s64) = G_ZEXT [[OR1]](s32)
565    ; VI: [[SUB3:%[0-9]+]]:_(s32) = G_SUB [[LSHR2]], [[C6]]
566    ; VI: [[SUB4:%[0-9]+]]:_(s32) = G_SUB [[SUB3]], [[C1]]
567    ; VI: [[SUB5:%[0-9]+]]:_(s32) = G_SUB [[C1]], [[SUB3]]
568    ; VI: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[ZEXT1]], [[SUB4]](s32)
569    ; VI: [[LSHR3:%[0-9]+]]:_(s64) = G_LSHR [[ZEXT1]], [[SUB5]](s32)
570    ; VI: [[ICMP2:%[0-9]+]]:_(s1) = G_ICMP intpred(sgt), [[SUB3]](s32), [[C1]]
571    ; VI: [[SELECT2:%[0-9]+]]:_(s64) = G_SELECT [[ICMP2]](s1), [[SHL1]], [[LSHR3]]
572    ; VI: [[XOR1:%[0-9]+]]:_(s64) = G_XOR [[SELECT2]], [[SEXT1]]
573    ; VI: [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[XOR1]](s64)
574    ; VI: [[UV8:%[0-9]+]]:_(s32), [[UV9:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[SEXT1]](s64)
575    ; VI: [[USUBO2:%[0-9]+]]:_(s32), [[USUBO3:%[0-9]+]]:_(s1) = G_USUBO [[UV6]], [[UV8]]
576    ; VI: [[USUBE2:%[0-9]+]]:_(s32), [[USUBE3:%[0-9]+]]:_(s1) = G_USUBE [[UV7]], [[UV9]], [[USUBO3]]
577    ; VI: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[USUBO2]](s32), [[USUBE2]](s32)
578    ; VI: [[ICMP3:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[SUB3]](s32), [[C7]]
579    ; VI: [[SELECT3:%[0-9]+]]:_(s64) = G_SELECT [[ICMP3]](s1), [[C8]], [[MV1]]
580    ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[SELECT1]](s64), [[SELECT3]](s64)
581    ; VI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>)
582    %0:_(<2 x s32>) = COPY $vgpr0_vgpr1
583    %1:_(<2 x s64>) = G_FPTOSI %0
584    $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1
585...
586
587---
588name: test_fptosi_s16_to_s64
589body: |
590  bb.0:
591    liveins: $vgpr0
592
593    ; SI-LABEL: name: test_fptosi_s16_to_s64
594    ; SI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
595    ; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
596    ; SI: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[TRUNC]](s16)
597    ; SI: [[SEXT:%[0-9]+]]:_(s64) = G_SEXT [[FPTOSI]](s32)
598    ; SI: $vgpr0_vgpr1 = COPY [[SEXT]](s64)
599    ; VI-LABEL: name: test_fptosi_s16_to_s64
600    ; VI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
601    ; VI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
602    ; VI: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[TRUNC]](s16)
603    ; VI: [[SEXT:%[0-9]+]]:_(s64) = G_SEXT [[FPTOSI]](s32)
604    ; VI: $vgpr0_vgpr1 = COPY [[SEXT]](s64)
605    %0:_(s32) = COPY $vgpr0
606    %1:_(s16) = G_TRUNC %0
607    %2:_(s64) = G_FPTOSI %1
608    $vgpr0_vgpr1 = COPY %2
609...
610
611---
612name: test_fptosi_v2s16_to_v2s64
613body: |
614  bb.0:
615    liveins: $vgpr0
616
617    ; SI-LABEL: name: test_fptosi_v2s16_to_v2s64
618    ; SI: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0
619    ; SI: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>)
620    ; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[BITCAST]](s32)
621    ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
622    ; SI: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32)
623    ; SI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR]](s32)
624    ; SI: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[TRUNC]](s16)
625    ; SI: [[SEXT:%[0-9]+]]:_(s64) = G_SEXT [[FPTOSI]](s32)
626    ; SI: [[FPTOSI1:%[0-9]+]]:_(s32) = G_FPTOSI [[TRUNC1]](s16)
627    ; SI: [[SEXT1:%[0-9]+]]:_(s64) = G_SEXT [[FPTOSI1]](s32)
628    ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[SEXT]](s64), [[SEXT1]](s64)
629    ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>)
630    ; VI-LABEL: name: test_fptosi_v2s16_to_v2s64
631    ; VI: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0
632    ; VI: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>)
633    ; VI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[BITCAST]](s32)
634    ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
635    ; VI: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32)
636    ; VI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR]](s32)
637    ; VI: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[TRUNC]](s16)
638    ; VI: [[SEXT:%[0-9]+]]:_(s64) = G_SEXT [[FPTOSI]](s32)
639    ; VI: [[FPTOSI1:%[0-9]+]]:_(s32) = G_FPTOSI [[TRUNC1]](s16)
640    ; VI: [[SEXT1:%[0-9]+]]:_(s64) = G_SEXT [[FPTOSI1]](s32)
641    ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[SEXT]](s64), [[SEXT1]](s64)
642    ; VI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>)
643    %0:_(<2 x s16>) = COPY $vgpr0
644    %1:_(<2 x s64>) = G_FPTOSI %0
645    $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1
646...
647