1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -O0 -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck %s 3# RUN: llc -O0 -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck %s 4 5--- 6name: test_freeze_s1 7body: | 8 bb.0: 9 10 ; CHECK-LABEL: name: test_freeze_s1 11 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 12 ; CHECK: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[COPY]](s32) 13 ; CHECK: [[FREEZE:%[0-9]+]]:_(s1) = G_FREEZE [[TRUNC]] 14 ; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[FREEZE]](s1) 15 ; CHECK: $vgpr0 = COPY [[ANYEXT]](s32) 16 %0:_(s32) = COPY $vgpr0 17 %1:_(s1) = G_TRUNC %0 18 %2:_(s1) = G_FREEZE %1 19 %3:_(s32) = G_ANYEXT %2 20 $vgpr0 = COPY %3 21... 22 23--- 24name: test_freeze_s7 25body: | 26 bb.0: 27 28 ; CHECK-LABEL: name: test_freeze_s7 29 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 30 ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 31 ; CHECK: [[FREEZE:%[0-9]+]]:_(s32) = G_FREEZE [[COPY1]] 32 ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[FREEZE]](s32) 33 ; CHECK: $vgpr0 = COPY [[COPY2]](s32) 34 %0:_(s32) = COPY $vgpr0 35 %1:_(s7) = G_TRUNC %0 36 %2:_(s7) = G_FREEZE %1 37 %3:_(s32) = G_ANYEXT %2 38 $vgpr0 = COPY %3 39... 40 41--- 42name: test_freeze_s8 43body: | 44 bb.0: 45 46 ; CHECK-LABEL: name: test_freeze_s8 47 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 48 ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 49 ; CHECK: [[FREEZE:%[0-9]+]]:_(s32) = G_FREEZE [[COPY1]] 50 ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[FREEZE]](s32) 51 ; CHECK: $vgpr0 = COPY [[COPY2]](s32) 52 %0:_(s32) = COPY $vgpr0 53 %1:_(s8) = G_TRUNC %0 54 %2:_(s8) = G_FREEZE %1 55 %3:_(s32) = G_ANYEXT %2 56 $vgpr0 = COPY %3 57... 58 59--- 60name: test_freeze_s16 61body: | 62 bb.0: 63 64 ; CHECK-LABEL: name: test_freeze_s16 65 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 66 ; CHECK: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32) 67 ; CHECK: [[FREEZE:%[0-9]+]]:_(s16) = G_FREEZE [[TRUNC]] 68 ; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[FREEZE]](s16) 69 ; CHECK: $vgpr0 = COPY [[ANYEXT]](s32) 70 %0:_(s32) = COPY $vgpr0 71 %1:_(s16) = G_TRUNC %0 72 %2:_(s16) = G_FREEZE %1 73 %3:_(s32) = G_ANYEXT %2 74 $vgpr0 = COPY %3 75... 76 77--- 78name: test_freeze_s32 79body: | 80 bb.0: 81 82 ; CHECK-LABEL: name: test_freeze_s32 83 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 84 ; CHECK: [[FREEZE:%[0-9]+]]:_(s32) = G_FREEZE [[COPY]] 85 ; CHECK: $vgpr0 = COPY [[FREEZE]](s32) 86 %0:_(s32) = COPY $vgpr0 87 %1:_(s32) = G_FREEZE %0 88 $vgpr0 = COPY %1 89... 90 91--- 92name: test_freeze_s48 93body: | 94 bb.0: 95 96 ; CHECK-LABEL: name: test_freeze_s48 97 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1 98 ; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY [[COPY]](s64) 99 ; CHECK: [[FREEZE:%[0-9]+]]:_(s64) = G_FREEZE [[COPY1]] 100 ; CHECK: [[COPY2:%[0-9]+]]:_(s64) = COPY [[FREEZE]](s64) 101 ; CHECK: $vgpr0_vgpr1 = COPY [[COPY2]](s64) 102 %0:_(s64) = COPY $vgpr0_vgpr1 103 %1:_(s48) = G_TRUNC %0 104 %2:_(s48) = G_FREEZE %1 105 %3:_(s64) = G_ANYEXT %2 106 $vgpr0_vgpr1 = COPY %3 107... 108 109--- 110name: test_freeze_s64 111body: | 112 bb.0: 113 114 ; CHECK-LABEL: name: test_freeze_s64 115 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1 116 ; CHECK: [[FREEZE:%[0-9]+]]:_(s64) = G_FREEZE [[COPY]] 117 ; CHECK: $vgpr0_vgpr1 = COPY [[FREEZE]](s64) 118 %0:_(s64) = COPY $vgpr0_vgpr1 119 %1:_(s64) = G_FREEZE %0 120 $vgpr0_vgpr1 = COPY %1 121... 122 123--- 124name: test_freeze_s65 125body: | 126 bb.0: 127 128 ; CHECK-LABEL: name: test_freeze_s65 129 ; CHECK: [[COPY:%[0-9]+]]:_(s96) = COPY $vgpr0_vgpr1_vgpr2 130 ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s96) 131 ; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF 132 ; CHECK: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[UV]](s32), [[UV1]](s32) 133 ; CHECK: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[UV2]](s32), [[DEF]](s32) 134 ; CHECK: [[MV2:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[MV]](s64), [[MV1]](s64) 135 ; CHECK: [[FREEZE:%[0-9]+]]:_(s128) = G_FREEZE [[MV2]] 136 ; CHECK: [[TRUNC:%[0-9]+]]:_(s96) = G_TRUNC [[FREEZE]](s128) 137 ; CHECK: $vgpr0_vgpr1_vgpr2 = COPY [[TRUNC]](s96) 138 %0:_(s96) = COPY $vgpr0_vgpr1_vgpr2 139 %1:_(s65) = G_TRUNC %0 140 %2:_(s65) = G_FREEZE %1 141 %3:_(s96) = G_ANYEXT %2 142 $vgpr0_vgpr1_vgpr2 = COPY %3 143... 144 145--- 146name: test_freeze_s128 147body: | 148 bb.0: 149 150 ; CHECK-LABEL: name: test_freeze_s128 151 ; CHECK: [[COPY:%[0-9]+]]:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 152 ; CHECK: [[FREEZE:%[0-9]+]]:_(s128) = G_FREEZE [[COPY]] 153 ; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[FREEZE]](s128) 154 %0:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 155 %1:_(s128) = G_FREEZE %0 156 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1 157... 158 159--- 160name: test_freeze_256 161body: | 162 bb.0: 163 164 ; CHECK-LABEL: name: test_freeze_256 165 ; CHECK: [[COPY:%[0-9]+]]:_(s256) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 166 ; CHECK: [[FREEZE:%[0-9]+]]:_(s256) = G_FREEZE [[COPY]] 167 ; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[FREEZE]](s256) 168 %0:_(s256) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 169 %1:_(s256) = G_FREEZE %0 170 $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY %1 171... 172 173--- 174name: test_freeze_s448 175body: | 176 bb.0: 177 178 ; CHECK-LABEL: name: test_freeze_s448 179 ; CHECK: [[COPY:%[0-9]+]]:_(s512) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 180 ; CHECK: [[TRUNC:%[0-9]+]]:_(s448) = G_TRUNC [[COPY]](s512) 181 ; CHECK: [[FREEZE:%[0-9]+]]:_(s448) = G_FREEZE [[TRUNC]] 182 ; CHECK: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64), [[UV2:%[0-9]+]]:_(s64), [[UV3:%[0-9]+]]:_(s64), [[UV4:%[0-9]+]]:_(s64), [[UV5:%[0-9]+]]:_(s64), [[UV6:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[FREEZE]](s448) 183 ; CHECK: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF 184 ; CHECK: [[MV:%[0-9]+]]:_(s512) = G_MERGE_VALUES [[UV]](s64), [[UV1]](s64), [[UV2]](s64), [[UV3]](s64), [[UV4]](s64), [[UV5]](s64), [[UV6]](s64), [[DEF]](s64) 185 ; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = COPY [[MV]](s512) 186 %0:_(s512) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 187 %1:_(s448) = G_TRUNC %0 188 %2:_(s448) = G_FREEZE %1 189 %3:_(s512) = G_ANYEXT %2 190 $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = COPY %3 191... 192 193--- 194name: test_freeze_s512 195body: | 196 bb.0: 197 198 ; CHECK-LABEL: name: test_freeze_s512 199 ; CHECK: [[COPY:%[0-9]+]]:_(s512) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 200 ; CHECK: [[FREEZE:%[0-9]+]]:_(s512) = G_FREEZE [[COPY]] 201 ; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = COPY [[FREEZE]](s512) 202 %0:_(s512) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 203 %1:_(s512) = G_FREEZE %0 204 $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = COPY %1 205... 206 207--- 208name: test_freeze_s1024 209body: | 210 bb.0: 211 212 ; CHECK-LABEL: name: test_freeze_s1024 213 ; CHECK: [[COPY:%[0-9]+]]:_(s512) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 214 ; CHECK: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64), [[UV2:%[0-9]+]]:_(s64), [[UV3:%[0-9]+]]:_(s64), [[UV4:%[0-9]+]]:_(s64), [[UV5:%[0-9]+]]:_(s64), [[UV6:%[0-9]+]]:_(s64), [[UV7:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](s512) 215 ; CHECK: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF 216 ; CHECK: [[MV:%[0-9]+]]:_(s1024) = G_MERGE_VALUES [[UV]](s64), [[UV1]](s64), [[UV2]](s64), [[UV3]](s64), [[UV4]](s64), [[UV5]](s64), [[UV6]](s64), [[UV7]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64) 217 ; CHECK: [[FREEZE:%[0-9]+]]:_(s1024) = G_FREEZE [[MV]] 218 ; CHECK: S_NOP 0, implicit [[FREEZE]](s1024) 219 %0:_(s512) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 220 %1:_(s1024) = G_ANYEXT %0 221 %2:_(s1024) = G_FREEZE %1 222 S_NOP 0, implicit %2 223... 224 225--- 226name: test_freeze_s1056 227body: | 228 bb.0: 229 230 ; CHECK-LABEL: name: test_freeze_s1056 231 ; CHECK: [[COPY:%[0-9]+]]:_(s512) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 232 ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32), [[UV8:%[0-9]+]]:_(s32), [[UV9:%[0-9]+]]:_(s32), [[UV10:%[0-9]+]]:_(s32), [[UV11:%[0-9]+]]:_(s32), [[UV12:%[0-9]+]]:_(s32), [[UV13:%[0-9]+]]:_(s32), [[UV14:%[0-9]+]]:_(s32), [[UV15:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s512) 233 ; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF 234 ; CHECK: [[DEF1:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF 235 ; CHECK: [[UV16:%[0-9]+]]:_(s32), [[UV17:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF1]](s64) 236 ; CHECK: [[UV18:%[0-9]+]]:_(s32), [[UV19:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF1]](s64) 237 ; CHECK: [[UV20:%[0-9]+]]:_(s32), [[UV21:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF1]](s64) 238 ; CHECK: [[UV22:%[0-9]+]]:_(s32), [[UV23:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF1]](s64) 239 ; CHECK: [[UV24:%[0-9]+]]:_(s32), [[UV25:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF1]](s64) 240 ; CHECK: [[UV26:%[0-9]+]]:_(s32), [[UV27:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF1]](s64) 241 ; CHECK: [[UV28:%[0-9]+]]:_(s32), [[UV29:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF1]](s64) 242 ; CHECK: [[UV30:%[0-9]+]]:_(s32), [[UV31:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF1]](s64) 243 ; CHECK: [[UV32:%[0-9]+]]:_(s32), [[UV33:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF1]](s64) 244 ; CHECK: [[MV:%[0-9]+]]:_(s1024) = G_MERGE_VALUES [[UV]](s32), [[UV1]](s32), [[UV2]](s32), [[UV3]](s32), [[UV4]](s32), [[UV5]](s32), [[UV6]](s32), [[UV7]](s32), [[UV8]](s32), [[UV9]](s32), [[UV10]](s32), [[UV11]](s32), [[UV12]](s32), [[UV13]](s32), [[UV14]](s32), [[UV15]](s32), [[UV16]](s32), [[UV17]](s32), [[UV18]](s32), [[UV19]](s32), [[UV20]](s32), [[UV21]](s32), [[UV22]](s32), [[UV23]](s32), [[UV24]](s32), [[UV25]](s32), [[UV26]](s32), [[UV27]](s32), [[UV28]](s32), [[UV29]](s32), [[UV30]](s32), [[UV31]](s32) 245 ; CHECK: [[MV1:%[0-9]+]]:_(s1024) = G_MERGE_VALUES [[UV32]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32) 246 ; CHECK: [[DEF2:%[0-9]+]]:_(s1024) = G_IMPLICIT_DEF 247 ; CHECK: [[FREEZE:%[0-9]+]]:_(s1024) = G_FREEZE [[MV]] 248 ; CHECK: [[FREEZE1:%[0-9]+]]:_(s1024) = G_FREEZE [[MV1]] 249 ; CHECK: [[MV2:%[0-9]+]]:_(s33792) = G_MERGE_VALUES [[FREEZE]](s1024), [[FREEZE1]](s1024), [[DEF2]](s1024), [[DEF2]](s1024), [[DEF2]](s1024), [[DEF2]](s1024), [[DEF2]](s1024), [[DEF2]](s1024), [[DEF2]](s1024), [[DEF2]](s1024), [[DEF2]](s1024), [[DEF2]](s1024), [[DEF2]](s1024), [[DEF2]](s1024), [[DEF2]](s1024), [[DEF2]](s1024), [[DEF2]](s1024), [[DEF2]](s1024), [[DEF2]](s1024), [[DEF2]](s1024), [[DEF2]](s1024), [[DEF2]](s1024), [[DEF2]](s1024), [[DEF2]](s1024), [[DEF2]](s1024), [[DEF2]](s1024), [[DEF2]](s1024), [[DEF2]](s1024), [[DEF2]](s1024), [[DEF2]](s1024), [[DEF2]](s1024), [[DEF2]](s1024), [[DEF2]](s1024) 250 ; CHECK: [[TRUNC:%[0-9]+]]:_(s1056) = G_TRUNC [[MV2]](s33792) 251 ; CHECK: S_NOP 0, implicit [[TRUNC]](s1056) 252 %0:_(s512) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 253 %1:_(s1056) = G_ANYEXT %0 254 %2:_(s1056) = G_FREEZE %1 255 S_NOP 0, implicit %2 256... 257 258--- 259name: test_freeze_s2048 260body: | 261 bb.0: 262 263 ; CHECK-LABEL: name: test_freeze_s2048 264 ; CHECK: [[COPY:%[0-9]+]]:_(s512) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 265 ; CHECK: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64), [[UV2:%[0-9]+]]:_(s64), [[UV3:%[0-9]+]]:_(s64), [[UV4:%[0-9]+]]:_(s64), [[UV5:%[0-9]+]]:_(s64), [[UV6:%[0-9]+]]:_(s64), [[UV7:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](s512) 266 ; CHECK: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF 267 ; CHECK: [[MV:%[0-9]+]]:_(s1024) = G_MERGE_VALUES [[UV]](s64), [[UV1]](s64), [[UV2]](s64), [[UV3]](s64), [[UV4]](s64), [[UV5]](s64), [[UV6]](s64), [[UV7]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64) 268 ; CHECK: [[MV1:%[0-9]+]]:_(s1024) = G_MERGE_VALUES [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64) 269 ; CHECK: [[FREEZE:%[0-9]+]]:_(s1024) = G_FREEZE [[MV]] 270 ; CHECK: [[FREEZE1:%[0-9]+]]:_(s1024) = G_FREEZE [[MV1]] 271 ; CHECK: [[MV2:%[0-9]+]]:_(s2048) = G_MERGE_VALUES [[FREEZE]](s1024), [[FREEZE1]](s1024) 272 ; CHECK: S_NOP 0, implicit [[MV2]](s2048) 273 %0:_(s512) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 274 %1:_(s2048) = G_ANYEXT %0 275 %2:_(s2048) = G_FREEZE %1 276 S_NOP 0, implicit %2 277... 278 279--- 280name: test_freeze_v2s32 281body: | 282 bb.0: 283 284 ; CHECK-LABEL: name: test_freeze_v2s32 285 ; CHECK: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1 286 ; CHECK: [[FREEZE:%[0-9]+]]:_(<2 x s32>) = G_FREEZE [[COPY]] 287 ; CHECK: $vgpr0_vgpr1 = COPY [[FREEZE]](<2 x s32>) 288 %0:_(<2 x s32>) = COPY $vgpr0_vgpr1 289 %1:_(<2 x s32>) = G_FREEZE %0 290 $vgpr0_vgpr1 = COPY %1 291... 292 293--- 294name: test_freeze_v3s32 295body: | 296 bb.0: 297 298 ; CHECK-LABEL: name: test_freeze_v3s32 299 ; CHECK: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2 300 ; CHECK: [[FREEZE:%[0-9]+]]:_(<3 x s32>) = G_FREEZE [[COPY]] 301 ; CHECK: $vgpr0_vgpr1_vgpr2 = COPY [[FREEZE]](<3 x s32>) 302 %0:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2 303 %1:_(<3 x s32>) = G_FREEZE %0 304 $vgpr0_vgpr1_vgpr2 = COPY %1 305... 306 307--- 308name: test_freeze_v4s32 309body: | 310 bb.0: 311 312 ; CHECK-LABEL: name: test_freeze_v4s32 313 ; CHECK: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 314 ; CHECK: [[FREEZE:%[0-9]+]]:_(<4 x s32>) = G_FREEZE [[COPY]] 315 ; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[FREEZE]](<4 x s32>) 316 %0:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 317 %1:_(<4 x s32>) = G_FREEZE %0 318 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1 319... 320 321--- 322name: test_freeze_v5s32 323body: | 324 bb.0: 325 326 ; CHECK-LABEL: name: test_freeze_v5s32 327 ; CHECK: [[COPY:%[0-9]+]]:_(<5 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 328 ; CHECK: [[FREEZE:%[0-9]+]]:_(<5 x s32>) = G_FREEZE [[COPY]] 329 ; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 = COPY [[FREEZE]](<5 x s32>) 330 %0:_(<5 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 331 %1:_(<5 x s32>) = G_FREEZE %0 332 $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 = COPY %1 333... 334 335--- 336name: test_freeze_v6s32 337body: | 338 bb.0: 339 340 ; CHECK-LABEL: name: test_freeze_v6s32 341 ; CHECK: [[DEF:%[0-9]+]]:_(<6 x s32>) = G_IMPLICIT_DEF 342 ; CHECK: [[FREEZE:%[0-9]+]]:_(<6 x s32>) = G_FREEZE [[DEF]] 343 ; CHECK: S_NOP 0, implicit [[FREEZE]](<6 x s32>) 344 %0:_(<6 x s32>) = G_IMPLICIT_DEF 345 %1:_(<6 x s32>) = G_FREEZE %0 346 S_NOP 0, implicit %1 347... 348 349--- 350name: test_freeze_v7s32 351body: | 352 bb.0: 353 354 ; CHECK-LABEL: name: test_freeze_v7s32 355 ; CHECK: [[DEF:%[0-9]+]]:_(<7 x s32>) = G_IMPLICIT_DEF 356 ; CHECK: [[FREEZE:%[0-9]+]]:_(<7 x s32>) = G_FREEZE [[DEF]] 357 ; CHECK: S_NOP 0, implicit [[FREEZE]](<7 x s32>) 358 %0:_(<7 x s32>) = G_IMPLICIT_DEF 359 %1:_(<7 x s32>) = G_FREEZE %0 360 S_NOP 0, implicit %1 361... 362 363--- 364name: test_freeze_v8s32 365body: | 366 bb.0: 367 368 ; CHECK-LABEL: name: test_freeze_v8s32 369 ; CHECK: [[COPY:%[0-9]+]]:_(<8 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 370 ; CHECK: [[FREEZE:%[0-9]+]]:_(<8 x s32>) = G_FREEZE [[COPY]] 371 ; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[FREEZE]](<8 x s32>) 372 %0:_(<8 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 373 %1:_(<8 x s32>) = G_FREEZE %0 374 $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY %1 375... 376 377--- 378name: test_freeze_v16s32 379body: | 380 bb.0: 381 382 ; CHECK-LABEL: name: test_freeze_v16s32 383 ; CHECK: [[COPY:%[0-9]+]]:_(<16 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 384 ; CHECK: [[FREEZE:%[0-9]+]]:_(<16 x s32>) = G_FREEZE [[COPY]] 385 ; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = COPY [[FREEZE]](<16 x s32>) 386 %0:_(<16 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 387 %1:_(<16 x s32>) = G_FREEZE %0 388 $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = COPY %1 389... 390 391--- 392name: test_freeze_v17s32 393body: | 394 bb.0: 395 396 ; CHECK-LABEL: name: test_freeze_v17s32 397 ; CHECK: [[COPY:%[0-9]+]]:_(<16 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 398 ; CHECK: [[FREEZE:%[0-9]+]]:_(<16 x s32>) = G_FREEZE [[COPY]] 399 ; CHECK: S_NOP 0, implicit [[FREEZE]](<16 x s32>) 400 %0:_(<16 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 401 %1:_(<16 x s32>) = G_FREEZE %0 402 S_NOP 0, implicit %1 403... 404 405--- 406name: test_freeze_v32s32 407body: | 408 bb.0: 409 410 ; CHECK-LABEL: name: test_freeze_v32s32 411 ; CHECK: [[DEF:%[0-9]+]]:_(<32 x s32>) = G_IMPLICIT_DEF 412 ; CHECK: [[FREEZE:%[0-9]+]]:_(<32 x s32>) = G_FREEZE [[DEF]] 413 ; CHECK: S_NOP 0, implicit [[FREEZE]](<32 x s32>) 414 %0:_(<32 x s32>) = G_IMPLICIT_DEF 415 %1:_(<32 x s32>) = G_FREEZE %0 416 S_NOP 0, implicit %1 417... 418 419--- 420name: test_freeze_v33s32 421body: | 422 bb.0: 423 424 ; CHECK-LABEL: name: test_freeze_v33s32 425 ; CHECK: [[DEF:%[0-9]+]]:_(<16 x s32>) = G_IMPLICIT_DEF 426 ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32), [[UV8:%[0-9]+]]:_(s32), [[UV9:%[0-9]+]]:_(s32), [[UV10:%[0-9]+]]:_(s32), [[UV11:%[0-9]+]]:_(s32), [[UV12:%[0-9]+]]:_(s32), [[UV13:%[0-9]+]]:_(s32), [[UV14:%[0-9]+]]:_(s32), [[UV15:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF]](<16 x s32>) 427 ; CHECK: [[UV16:%[0-9]+]]:_(s32), [[UV17:%[0-9]+]]:_(s32), [[UV18:%[0-9]+]]:_(s32), [[UV19:%[0-9]+]]:_(s32), [[UV20:%[0-9]+]]:_(s32), [[UV21:%[0-9]+]]:_(s32), [[UV22:%[0-9]+]]:_(s32), [[UV23:%[0-9]+]]:_(s32), [[UV24:%[0-9]+]]:_(s32), [[UV25:%[0-9]+]]:_(s32), [[UV26:%[0-9]+]]:_(s32), [[UV27:%[0-9]+]]:_(s32), [[UV28:%[0-9]+]]:_(s32), [[UV29:%[0-9]+]]:_(s32), [[UV30:%[0-9]+]]:_(s32), [[UV31:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF]](<16 x s32>) 428 ; CHECK: [[UV32:%[0-9]+]]:_(s32), [[UV33:%[0-9]+]]:_(s32), [[UV34:%[0-9]+]]:_(s32), [[UV35:%[0-9]+]]:_(s32), [[UV36:%[0-9]+]]:_(s32), [[UV37:%[0-9]+]]:_(s32), [[UV38:%[0-9]+]]:_(s32), [[UV39:%[0-9]+]]:_(s32), [[UV40:%[0-9]+]]:_(s32), [[UV41:%[0-9]+]]:_(s32), [[UV42:%[0-9]+]]:_(s32), [[UV43:%[0-9]+]]:_(s32), [[UV44:%[0-9]+]]:_(s32), [[UV45:%[0-9]+]]:_(s32), [[UV46:%[0-9]+]]:_(s32), [[UV47:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF]](<16 x s32>) 429 ; CHECK: [[DEF1:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF 430 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<16 x s32>) = G_BUILD_VECTOR [[UV]](s32), [[UV1]](s32), [[UV2]](s32), [[UV3]](s32), [[UV4]](s32), [[UV5]](s32), [[UV6]](s32), [[UV7]](s32), [[UV8]](s32), [[UV9]](s32), [[UV10]](s32), [[UV11]](s32), [[UV12]](s32), [[UV13]](s32), [[UV14]](s32), [[UV15]](s32) 431 ; CHECK: [[BUILD_VECTOR1:%[0-9]+]]:_(<16 x s32>) = G_BUILD_VECTOR [[UV16]](s32), [[UV17]](s32), [[UV18]](s32), [[UV19]](s32), [[UV20]](s32), [[UV21]](s32), [[UV22]](s32), [[UV23]](s32), [[UV24]](s32), [[UV25]](s32), [[UV26]](s32), [[UV27]](s32), [[UV28]](s32), [[UV29]](s32), [[UV30]](s32), [[UV31]](s32) 432 ; CHECK: [[BUILD_VECTOR2:%[0-9]+]]:_(<16 x s32>) = G_BUILD_VECTOR [[UV32]](s32), [[DEF1]](s32), [[DEF1]](s32), [[DEF1]](s32), [[DEF1]](s32), [[DEF1]](s32), [[DEF1]](s32), [[DEF1]](s32), [[DEF1]](s32), [[DEF1]](s32), [[DEF1]](s32), [[DEF1]](s32), [[DEF1]](s32), [[DEF1]](s32), [[DEF1]](s32), [[DEF1]](s32) 433 ; CHECK: [[FREEZE:%[0-9]+]]:_(<16 x s32>) = G_FREEZE [[BUILD_VECTOR]] 434 ; CHECK: [[FREEZE1:%[0-9]+]]:_(<16 x s32>) = G_FREEZE [[BUILD_VECTOR1]] 435 ; CHECK: [[FREEZE2:%[0-9]+]]:_(<16 x s32>) = G_FREEZE [[BUILD_VECTOR2]] 436 ; CHECK: [[CONCAT_VECTORS:%[0-9]+]]:_(<528 x s32>) = G_CONCAT_VECTORS [[FREEZE]](<16 x s32>), [[FREEZE1]](<16 x s32>), [[FREEZE2]](<16 x s32>), [[DEF]](<16 x s32>), [[DEF]](<16 x s32>), [[DEF]](<16 x s32>), [[DEF]](<16 x s32>), [[DEF]](<16 x s32>), [[DEF]](<16 x s32>), [[DEF]](<16 x s32>), [[DEF]](<16 x s32>), [[DEF]](<16 x s32>), [[DEF]](<16 x s32>), [[DEF]](<16 x s32>), [[DEF]](<16 x s32>), [[DEF]](<16 x s32>), [[DEF]](<16 x s32>), [[DEF]](<16 x s32>), [[DEF]](<16 x s32>), [[DEF]](<16 x s32>), [[DEF]](<16 x s32>), [[DEF]](<16 x s32>), [[DEF]](<16 x s32>), [[DEF]](<16 x s32>), [[DEF]](<16 x s32>), [[DEF]](<16 x s32>), [[DEF]](<16 x s32>), [[DEF]](<16 x s32>), [[DEF]](<16 x s32>), [[DEF]](<16 x s32>), [[DEF]](<16 x s32>), [[DEF]](<16 x s32>), [[DEF]](<16 x s32>) 437 ; CHECK: [[UV48:%[0-9]+]]:_(<33 x s32>), [[UV49:%[0-9]+]]:_(<33 x s32>), [[UV50:%[0-9]+]]:_(<33 x s32>), [[UV51:%[0-9]+]]:_(<33 x s32>), [[UV52:%[0-9]+]]:_(<33 x s32>), [[UV53:%[0-9]+]]:_(<33 x s32>), [[UV54:%[0-9]+]]:_(<33 x s32>), [[UV55:%[0-9]+]]:_(<33 x s32>), [[UV56:%[0-9]+]]:_(<33 x s32>), [[UV57:%[0-9]+]]:_(<33 x s32>), [[UV58:%[0-9]+]]:_(<33 x s32>), [[UV59:%[0-9]+]]:_(<33 x s32>), [[UV60:%[0-9]+]]:_(<33 x s32>), [[UV61:%[0-9]+]]:_(<33 x s32>), [[UV62:%[0-9]+]]:_(<33 x s32>), [[UV63:%[0-9]+]]:_(<33 x s32>) = G_UNMERGE_VALUES [[CONCAT_VECTORS]](<528 x s32>) 438 ; CHECK: S_NOP 0, implicit [[UV48]](<33 x s32>) 439 %0:_(<33 x s32>) = G_IMPLICIT_DEF 440 %1:_(<33 x s32>) = G_FREEZE %0 441 S_NOP 0, implicit %1 442... 443 444--- 445name: test_freeze_v64s32 446body: | 447 bb.0: 448 449 ; CHECK-LABEL: name: test_freeze_v64s32 450 ; CHECK: [[DEF:%[0-9]+]]:_(<16 x s32>) = G_IMPLICIT_DEF 451 ; CHECK: [[FREEZE:%[0-9]+]]:_(<16 x s32>) = G_FREEZE [[DEF]] 452 ; CHECK: [[FREEZE1:%[0-9]+]]:_(<16 x s32>) = G_FREEZE [[DEF]] 453 ; CHECK: [[FREEZE2:%[0-9]+]]:_(<16 x s32>) = G_FREEZE [[DEF]] 454 ; CHECK: [[FREEZE3:%[0-9]+]]:_(<16 x s32>) = G_FREEZE [[DEF]] 455 ; CHECK: [[CONCAT_VECTORS:%[0-9]+]]:_(<64 x s32>) = G_CONCAT_VECTORS [[FREEZE]](<16 x s32>), [[FREEZE1]](<16 x s32>), [[FREEZE2]](<16 x s32>), [[FREEZE3]](<16 x s32>) 456 ; CHECK: S_NOP 0, implicit [[CONCAT_VECTORS]](<64 x s32>) 457 %0:_(<64 x s32>) = G_IMPLICIT_DEF 458 %1:_(<64 x s32>) = G_FREEZE %0 459 S_NOP 0, implicit %1 460... 461 462--- 463name: test_freeze_v2s1 464body: | 465 bb.0: 466 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 467 468 ; CHECK-LABEL: name: test_freeze_v2s1 469 ; CHECK: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1 470 ; CHECK: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr2_vgpr3 471 ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>) 472 ; CHECK: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<2 x s32>) 473 ; CHECK: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[UV]](s32), [[UV2]] 474 ; CHECK: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[UV1]](s32), [[UV3]] 475 ; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[ICMP]](s1) 476 ; CHECK: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[ICMP1]](s1) 477 ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[ANYEXT]](s32) 478 ; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[ANYEXT1]](s32) 479 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[COPY2]](s32), [[COPY3]](s32) 480 ; CHECK: [[FREEZE:%[0-9]+]]:_(<2 x s32>) = G_FREEZE [[BUILD_VECTOR]] 481 ; CHECK: [[COPY4:%[0-9]+]]:_(<2 x s32>) = COPY [[FREEZE]](<2 x s32>) 482 ; CHECK: $vgpr0_vgpr1 = COPY [[COPY4]](<2 x s32>) 483 %0:_(<2 x s32>) = COPY $vgpr0_vgpr1 484 %1:_(<2 x s32>) = COPY $vgpr2_vgpr3 485 %2:_(<2 x s1>) = G_ICMP intpred(ne), %0, %1 486 %3:_(<2 x s1>) = G_FREEZE %2 487 %4:_(<2 x s32>) = G_ANYEXT %3 488 $vgpr0_vgpr1 = COPY %4 489... 490 491--- 492name: test_freeze_v3s1 493body: | 494 bb.0: 495 liveins: $vgpr0_vgpr1_vgpr2, $vgpr3_vgpr4_vgpr5 496 497 ; CHECK-LABEL: name: test_freeze_v3s1 498 ; CHECK: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2 499 ; CHECK: [[COPY1:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr3_vgpr4_vgpr5 500 ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<3 x s32>) 501 ; CHECK: [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<3 x s32>) 502 ; CHECK: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[UV]](s32), [[UV3]] 503 ; CHECK: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[UV1]](s32), [[UV4]] 504 ; CHECK: [[ICMP2:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[UV2]](s32), [[UV5]] 505 ; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[ICMP]](s1) 506 ; CHECK: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[ICMP1]](s1) 507 ; CHECK: [[ANYEXT2:%[0-9]+]]:_(s32) = G_ANYEXT [[ICMP2]](s1) 508 ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[ANYEXT]](s32) 509 ; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[ANYEXT1]](s32) 510 ; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY [[ANYEXT2]](s32) 511 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32) 512 ; CHECK: [[FREEZE:%[0-9]+]]:_(<3 x s32>) = G_FREEZE [[BUILD_VECTOR]] 513 ; CHECK: [[COPY5:%[0-9]+]]:_(<3 x s32>) = COPY [[FREEZE]](<3 x s32>) 514 ; CHECK: $vgpr0_vgpr1_vgpr2 = COPY [[COPY5]](<3 x s32>) 515 %0:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2 516 %1:_(<3 x s32>) = COPY $vgpr3_vgpr4_vgpr5 517 %2:_(<3 x s1>) = G_ICMP intpred(ne), %0, %1 518 %3:_(<3 x s1>) = G_FREEZE %2 519 %4:_(<3 x s32>) = G_ANYEXT %3 520 $vgpr0_vgpr1_vgpr2 = COPY %4 521... 522 523--- 524name: test_freeze_v2s8 525body: | 526 bb.0: 527 528 ; CHECK-LABEL: name: test_freeze_v2s8 529 ; CHECK: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1 530 ; CHECK: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY [[COPY]](<2 x s32>) 531 ; CHECK: [[FREEZE:%[0-9]+]]:_(<2 x s32>) = G_FREEZE [[COPY1]] 532 ; CHECK: [[COPY2:%[0-9]+]]:_(<2 x s32>) = COPY [[FREEZE]](<2 x s32>) 533 ; CHECK: $vgpr0_vgpr1 = COPY [[COPY2]](<2 x s32>) 534 %0:_(<2 x s32>) = COPY $vgpr0_vgpr1 535 %1:_(<2 x s8>) = G_TRUNC %0 536 %2:_(<2 x s8>) = G_FREEZE %1 537 %3:_(<2 x s32>) = G_ANYEXT %2 538 $vgpr0_vgpr1 = COPY %3 539... 540 541--- 542name: test_freeze_v3s8 543body: | 544 bb.0: 545 546 ; CHECK-LABEL: name: test_freeze_v3s8 547 ; CHECK: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2 548 ; CHECK: [[TRUNC:%[0-9]+]]:_(<3 x s8>) = G_TRUNC [[COPY]](<3 x s32>) 549 ; CHECK: [[DEF:%[0-9]+]]:_(<4 x s8>) = G_IMPLICIT_DEF 550 ; CHECK: [[INSERT:%[0-9]+]]:_(<4 x s8>) = G_INSERT [[DEF]], [[TRUNC]](<3 x s8>), 0 551 ; CHECK: [[ANYEXT:%[0-9]+]]:_(<4 x s32>) = G_ANYEXT [[INSERT]](<4 x s8>) 552 ; CHECK: [[FREEZE:%[0-9]+]]:_(<4 x s32>) = G_FREEZE [[ANYEXT]] 553 ; CHECK: [[TRUNC1:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[FREEZE]](<4 x s32>) 554 ; CHECK: [[CONCAT_VECTORS:%[0-9]+]]:_(<12 x s8>) = G_CONCAT_VECTORS [[TRUNC1]](<4 x s8>), [[DEF]](<4 x s8>), [[DEF]](<4 x s8>) 555 ; CHECK: [[UV:%[0-9]+]]:_(<3 x s8>), [[UV1:%[0-9]+]]:_(<3 x s8>), [[UV2:%[0-9]+]]:_(<3 x s8>), [[UV3:%[0-9]+]]:_(<3 x s8>) = G_UNMERGE_VALUES [[CONCAT_VECTORS]](<12 x s8>) 556 ; CHECK: [[ANYEXT1:%[0-9]+]]:_(<3 x s32>) = G_ANYEXT [[UV]](<3 x s8>) 557 ; CHECK: $vgpr0_vgpr1_vgpr2 = COPY [[ANYEXT1]](<3 x s32>) 558 %0:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2 559 %1:_(<3 x s8>) = G_TRUNC %0 560 %2:_(<3 x s8>) = G_FREEZE %1 561 %3:_(<3 x s32>) = G_ANYEXT %2 562 $vgpr0_vgpr1_vgpr2 = COPY %3 563... 564 565--- 566name: test_freeze_v2s16 567body: | 568 bb.0: 569 570 ; CHECK-LABEL: name: test_freeze_v2s16 571 ; CHECK: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0 572 ; CHECK: [[FREEZE:%[0-9]+]]:_(<2 x s16>) = G_FREEZE [[COPY]] 573 ; CHECK: $vgpr0 = COPY [[FREEZE]](<2 x s16>) 574 %0:_(<2 x s16>) = COPY $vgpr0 575 %1:_(<2 x s16>) = G_FREEZE %0 576 $vgpr0 = COPY %1 577... 578 579--- 580name: test_freeze_v3s16 581body: | 582 bb.0: 583 584 ; CHECK-LABEL: name: test_freeze_v3s16 585 ; CHECK: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2 586 ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<3 x s32>) 587 ; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF 588 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[UV]](s32), [[UV1]](s32) 589 ; CHECK: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[UV2]](s32), [[DEF]](s32) 590 ; CHECK: [[TRUNC:%[0-9]+]]:_(<2 x s16>) = G_TRUNC [[BUILD_VECTOR]](<2 x s32>) 591 ; CHECK: [[TRUNC1:%[0-9]+]]:_(<2 x s16>) = G_TRUNC [[BUILD_VECTOR1]](<2 x s32>) 592 ; CHECK: [[DEF1:%[0-9]+]]:_(<2 x s16>) = G_IMPLICIT_DEF 593 ; CHECK: [[CONCAT_VECTORS:%[0-9]+]]:_(<6 x s16>) = G_CONCAT_VECTORS [[TRUNC]](<2 x s16>), [[TRUNC1]](<2 x s16>), [[DEF1]](<2 x s16>) 594 ; CHECK: [[UV3:%[0-9]+]]:_(<3 x s16>), [[UV4:%[0-9]+]]:_(<3 x s16>) = G_UNMERGE_VALUES [[CONCAT_VECTORS]](<6 x s16>) 595 ; CHECK: [[DEF2:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 596 ; CHECK: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF2]], [[UV3]](<3 x s16>), 0 597 ; CHECK: [[FREEZE:%[0-9]+]]:_(<4 x s16>) = G_FREEZE [[INSERT]] 598 ; CHECK: [[UV5:%[0-9]+]]:_(<2 x s16>), [[UV6:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[FREEZE]](<4 x s16>) 599 ; CHECK: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[UV5]](<2 x s16>) 600 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 601 ; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32) 602 ; CHECK: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[UV6]](<2 x s16>) 603 ; CHECK: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST1]], [[C]](s32) 604 ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[BITCAST]](s32) 605 ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32) 606 ; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[BITCAST1]](s32) 607 ; CHECK: [[BUILD_VECTOR2:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32) 608 ; CHECK: $vgpr0_vgpr1_vgpr2 = COPY [[BUILD_VECTOR2]](<3 x s32>) 609 %0:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2 610 %1:_(<3 x s16>) = G_TRUNC %0 611 %2:_(<3 x s16>) = G_FREEZE %1 612 %3:_(<3 x s32>) = G_ANYEXT %2 613 $vgpr0_vgpr1_vgpr2 = COPY %3 614... 615 616--- 617name: test_freeze_v4s16 618body: | 619 bb.0: 620 621 ; CHECK-LABEL: name: test_freeze_v4s16 622 ; CHECK: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1 623 ; CHECK: [[FREEZE:%[0-9]+]]:_(<4 x s16>) = G_FREEZE [[COPY]] 624 ; CHECK: $vgpr0_vgpr1 = COPY [[FREEZE]](<4 x s16>) 625 %0:_(<4 x s16>) = COPY $vgpr0_vgpr1 626 %1:_(<4 x s16>) = G_FREEZE %0 627 $vgpr0_vgpr1 = COPY %1 628... 629 630--- 631name: test_freeze_v5s16 632body: | 633 bb.0: 634 635 ; CHECK-LABEL: name: test_freeze_v5s16 636 ; CHECK: [[COPY:%[0-9]+]]:_(<5 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 637 ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<5 x s32>) 638 ; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF 639 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[UV]](s32), [[UV1]](s32) 640 ; CHECK: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[UV2]](s32), [[UV3]](s32) 641 ; CHECK: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[UV4]](s32), [[DEF]](s32) 642 ; CHECK: [[TRUNC:%[0-9]+]]:_(<2 x s16>) = G_TRUNC [[BUILD_VECTOR]](<2 x s32>) 643 ; CHECK: [[TRUNC1:%[0-9]+]]:_(<2 x s16>) = G_TRUNC [[BUILD_VECTOR1]](<2 x s32>) 644 ; CHECK: [[TRUNC2:%[0-9]+]]:_(<2 x s16>) = G_TRUNC [[BUILD_VECTOR2]](<2 x s32>) 645 ; CHECK: [[DEF1:%[0-9]+]]:_(<2 x s16>) = G_IMPLICIT_DEF 646 ; CHECK: [[CONCAT_VECTORS:%[0-9]+]]:_(<10 x s16>) = G_CONCAT_VECTORS [[TRUNC]](<2 x s16>), [[TRUNC1]](<2 x s16>), [[TRUNC2]](<2 x s16>), [[DEF1]](<2 x s16>), [[DEF1]](<2 x s16>) 647 ; CHECK: [[UV5:%[0-9]+]]:_(<5 x s16>), [[UV6:%[0-9]+]]:_(<5 x s16>) = G_UNMERGE_VALUES [[CONCAT_VECTORS]](<10 x s16>) 648 ; CHECK: [[DEF2:%[0-9]+]]:_(<6 x s16>) = G_IMPLICIT_DEF 649 ; CHECK: [[INSERT:%[0-9]+]]:_(<6 x s16>) = G_INSERT [[DEF2]], [[UV5]](<5 x s16>), 0 650 ; CHECK: [[FREEZE:%[0-9]+]]:_(<6 x s16>) = G_FREEZE [[INSERT]] 651 ; CHECK: [[UV7:%[0-9]+]]:_(<2 x s16>), [[UV8:%[0-9]+]]:_(<2 x s16>), [[UV9:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[FREEZE]](<6 x s16>) 652 ; CHECK: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[UV7]](<2 x s16>) 653 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 654 ; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32) 655 ; CHECK: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[UV8]](<2 x s16>) 656 ; CHECK: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST1]], [[C]](s32) 657 ; CHECK: [[BITCAST2:%[0-9]+]]:_(s32) = G_BITCAST [[UV9]](<2 x s16>) 658 ; CHECK: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST2]], [[C]](s32) 659 ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[BITCAST]](s32) 660 ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32) 661 ; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[BITCAST1]](s32) 662 ; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LSHR1]](s32) 663 ; CHECK: [[COPY5:%[0-9]+]]:_(s32) = COPY [[BITCAST2]](s32) 664 ; CHECK: [[BUILD_VECTOR3:%[0-9]+]]:_(<5 x s32>) = G_BUILD_VECTOR [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32) 665 ; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 = COPY [[BUILD_VECTOR3]](<5 x s32>) 666 %0:_(<5 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 667 %1:_(<5 x s16>) = G_TRUNC %0 668 %2:_(<5 x s16>) = G_FREEZE %1 669 %3:_(<5 x s32>) = G_ANYEXT %2 670 $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 = COPY %3 671... 672 673--- 674name: test_freeze_v6s16 675body: | 676 bb.0: 677 678 ; CHECK-LABEL: name: test_freeze_v6s16 679 ; CHECK: [[COPY:%[0-9]+]]:_(<6 x s16>) = COPY $vgpr0_vgpr1_vgpr2 680 ; CHECK: [[FREEZE:%[0-9]+]]:_(<6 x s16>) = G_FREEZE [[COPY]] 681 ; CHECK: $vgpr0_vgpr1_vgpr2 = COPY [[FREEZE]](<6 x s16>) 682 %0:_(<6 x s16>) = COPY $vgpr0_vgpr1_vgpr2 683 %1:_(<6 x s16>) = G_FREEZE %0 684 $vgpr0_vgpr1_vgpr2 = COPY %1 685... 686 687--- 688name: test_freeze_v8s16 689body: | 690 bb.0: 691 692 ; CHECK-LABEL: name: test_freeze_v8s16 693 ; CHECK: [[COPY:%[0-9]+]]:_(<8 x s16>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 694 ; CHECK: [[FREEZE:%[0-9]+]]:_(<8 x s16>) = G_FREEZE [[COPY]] 695 ; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[FREEZE]](<8 x s16>) 696 %0:_(<8 x s16>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 697 %1:_(<8 x s16>) = G_FREEZE %0 698 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1 699... 700 701--- 702name: test_freeze_v2s64 703body: | 704 bb.0: 705 706 ; CHECK-LABEL: name: test_freeze_v2s64 707 ; CHECK: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 708 ; CHECK: [[FREEZE:%[0-9]+]]:_(<2 x s64>) = G_FREEZE [[COPY]] 709 ; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[FREEZE]](<2 x s64>) 710 %0:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 711 %1:_(<2 x s64>) = G_FREEZE %0 712 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1 713... 714 715--- 716name: test_freeze_v4s8 717body: | 718 bb.0: 719 liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3 720 721 ; CHECK-LABEL: name: test_freeze_v4s8 722 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 723 ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 724 ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2 725 ; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3 726 ; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 727 ; CHECK: [[COPY5:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 728 ; CHECK: [[COPY6:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 729 ; CHECK: [[COPY7:%[0-9]+]]:_(s32) = COPY [[COPY3]](s32) 730 ; CHECK: [[COPY8:%[0-9]+]]:_(s32) = COPY [[COPY4]](s32) 731 ; CHECK: [[COPY9:%[0-9]+]]:_(s32) = COPY [[COPY5]](s32) 732 ; CHECK: [[COPY10:%[0-9]+]]:_(s32) = COPY [[COPY6]](s32) 733 ; CHECK: [[COPY11:%[0-9]+]]:_(s32) = COPY [[COPY7]](s32) 734 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32) 735 ; CHECK: [[FREEZE:%[0-9]+]]:_(<4 x s32>) = G_FREEZE [[BUILD_VECTOR]] 736 ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[FREEZE]](<4 x s32>) 737 ; CHECK: [[COPY12:%[0-9]+]]:_(s32) = COPY [[UV]](s32) 738 ; CHECK: [[COPY13:%[0-9]+]]:_(s32) = COPY [[UV1]](s32) 739 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[UV2]](s32) 740 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[UV3]](s32) 741 ; CHECK: S_ENDPGM 0, implicit [[COPY12]](s32), implicit [[COPY13]](s32), implicit [[COPY14]](s32), implicit [[COPY15]](s32) 742 %0:_(s32) = COPY $vgpr0 743 %1:_(s32) = COPY $vgpr1 744 %2:_(s32) = COPY $vgpr2 745 %3:_(s32) = COPY $vgpr3 746 %4:_(s8) = G_TRUNC %0 747 %5:_(s8) = G_TRUNC %1 748 %6:_(s8) = G_TRUNC %2 749 %7:_(s8) = G_TRUNC %3 750 %8:_(<4 x s8>) = G_BUILD_VECTOR %4, %5, %6, %7 751 %9:_(<4 x s8>) = G_FREEZE %8 752 %10:_(s8), %11:_(s8), %12:_(s8), %13:_(s8) = G_UNMERGE_VALUES %9 753 %14:_(s32) = G_ANYEXT %10 754 %15:_(s32) = G_ANYEXT %11 755 %16:_(s32) = G_ANYEXT %12 756 %17:_(s32) = G_ANYEXT %13 757 S_ENDPGM 0, implicit %14, implicit %15, implicit %16, implicit %17 758... 759 760--- 761name: test_freeze_p0 762body: | 763 bb.0: 764 765 ; CHECK-LABEL: name: test_freeze_p0 766 ; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1 767 ; CHECK: [[FREEZE:%[0-9]+]]:_(p0) = G_FREEZE [[COPY]] 768 ; CHECK: $vgpr0_vgpr1 = COPY [[FREEZE]](p0) 769 %0:_(p0) = COPY $vgpr0_vgpr1 770 %1:_(p0) = G_FREEZE %0 771 $vgpr0_vgpr1 = COPY %1 772... 773 774--- 775name: test_freeze_p1 776body: | 777 bb.0: 778 779 ; CHECK-LABEL: name: test_freeze_p1 780 ; CHECK: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 781 ; CHECK: [[FREEZE:%[0-9]+]]:_(p1) = G_FREEZE [[COPY]] 782 ; CHECK: $vgpr0_vgpr1 = COPY [[FREEZE]](p1) 783 %0:_(p1) = COPY $vgpr0_vgpr1 784 %1:_(p1) = G_FREEZE %0 785 $vgpr0_vgpr1 = COPY %1 786... 787 788--- 789name: test_freeze_p2 790body: | 791 bb.0: 792 793 ; CHECK-LABEL: name: test_freeze_p2 794 ; CHECK: [[COPY:%[0-9]+]]:_(p2) = COPY $vgpr0 795 ; CHECK: [[FREEZE:%[0-9]+]]:_(p2) = G_FREEZE [[COPY]] 796 ; CHECK: $vgpr0 = COPY [[FREEZE]](p2) 797 %0:_(p2) = COPY $vgpr0 798 %1:_(p2) = G_FREEZE %0 799 $vgpr0 = COPY %1 800... 801 802--- 803name: test_freeze_p3 804body: | 805 bb.0: 806 807 ; CHECK-LABEL: name: test_freeze_p3 808 ; CHECK: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 809 ; CHECK: [[FREEZE:%[0-9]+]]:_(p3) = G_FREEZE [[COPY]] 810 ; CHECK: $vgpr0 = COPY [[FREEZE]](p3) 811 %0:_(p3) = COPY $vgpr0 812 %1:_(p3) = G_FREEZE %0 813 $vgpr0 = COPY %1 814... 815 816--- 817name: test_freeze_p4 818body: | 819 bb.0: 820 821 ; CHECK-LABEL: name: test_freeze_p4 822 ; CHECK: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 823 ; CHECK: [[FREEZE:%[0-9]+]]:_(p4) = G_FREEZE [[COPY]] 824 ; CHECK: $vgpr0_vgpr1 = COPY [[FREEZE]](p4) 825 %0:_(p4) = COPY $vgpr0_vgpr1 826 %1:_(p4) = G_FREEZE %0 827 $vgpr0_vgpr1 = COPY %1 828... 829 830--- 831name: test_freeze_p5 832body: | 833 bb.0: 834 835 ; CHECK-LABEL: name: test_freeze_p5 836 ; CHECK: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 837 ; CHECK: [[FREEZE:%[0-9]+]]:_(p5) = G_FREEZE [[COPY]] 838 ; CHECK: $vgpr0 = COPY [[FREEZE]](p5) 839 %0:_(p5) = COPY $vgpr0 840 %1:_(p5) = G_FREEZE %0 841 $vgpr0 = COPY %1 842... 843 844--- 845name: test_freeze_p999 846body: | 847 bb.0: 848 849 ; CHECK-LABEL: name: test_freeze_p999 850 ; CHECK: [[COPY:%[0-9]+]]:_(p999) = COPY $vgpr0_vgpr1 851 ; CHECK: [[FREEZE:%[0-9]+]]:_(p999) = G_FREEZE [[COPY]] 852 ; CHECK: $vgpr0_vgpr1 = COPY [[FREEZE]](p999) 853 %0:_(p999) = COPY $vgpr0_vgpr1 854 %1:_(p999) = G_FREEZE %0 855 $vgpr0_vgpr1 = COPY %1 856 857... 858 859--- 860name: test_freeze_v2s1024 861body: | 862 bb.0: 863 864 ; CHECK-LABEL: name: test_freeze_v2s1024 865 ; CHECK: [[DEF:%[0-9]+]]:_(<2 x s1024>) = G_IMPLICIT_DEF 866 ; CHECK: [[FREEZE:%[0-9]+]]:_(<2 x s1024>) = G_FREEZE [[DEF]] 867 ; CHECK: S_NOP 0, implicit [[FREEZE]](<2 x s1024>) 868 %0:_(<2 x s1024>) = G_IMPLICIT_DEF 869 %1:_(<2 x s1024>) = G_FREEZE %0 870 S_NOP 0, implicit %1 871... 872 873--- 874 875name: test_freeze_v3s1024 876body: | 877 bb.0: 878 879 ; CHECK-LABEL: name: test_freeze_v3s1024 880 ; CHECK: [[DEF:%[0-9]+]]:_(<3 x s1024>) = G_IMPLICIT_DEF 881 ; CHECK: [[FREEZE:%[0-9]+]]:_(<3 x s1024>) = G_FREEZE [[DEF]] 882 ; CHECK: S_NOP 0, implicit [[FREEZE]](<3 x s1024>) 883 %0:_(<3 x s1024>) = G_IMPLICIT_DEF 884 %1:_(<3 x s1024>) = G_FREEZE %0 885 S_NOP 0, implicit %1 886... 887