1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -run-pass=legalizer -o - %s | FileCheck -check-prefix=SI %s
3# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=hawaii -run-pass=legalizer -o - %s | FileCheck -check-prefix=CI %s
4# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -run-pass=legalizer -o - %s | FileCheck -check-prefix=VI %s
5# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -run-pass=legalizer -o - %s | FileCheck -check-prefix=GFX9 %s
6
7---
8name: test_intrinsic_trunc_s16
9body: |
10  bb.0:
11    liveins: $vgpr0
12
13    ; SI-LABEL: name: test_intrinsic_trunc_s16
14    ; SI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
15    ; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
16    ; SI: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC]](s16)
17    ; SI: [[INTRINSIC_TRUNC:%[0-9]+]]:_(s32) = G_INTRINSIC_TRUNC [[FPEXT]]
18    ; SI: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_TRUNC]](s32)
19    ; SI: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[FPTRUNC]](s16)
20    ; SI: $vgpr0 = COPY [[ANYEXT]](s32)
21    ; CI-LABEL: name: test_intrinsic_trunc_s16
22    ; CI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
23    ; CI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
24    ; CI: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC]](s16)
25    ; CI: [[INTRINSIC_TRUNC:%[0-9]+]]:_(s32) = G_INTRINSIC_TRUNC [[FPEXT]]
26    ; CI: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_TRUNC]](s32)
27    ; CI: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[FPTRUNC]](s16)
28    ; CI: $vgpr0 = COPY [[ANYEXT]](s32)
29    ; VI-LABEL: name: test_intrinsic_trunc_s16
30    ; VI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
31    ; VI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
32    ; VI: [[INTRINSIC_TRUNC:%[0-9]+]]:_(s16) = G_INTRINSIC_TRUNC [[TRUNC]]
33    ; VI: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[INTRINSIC_TRUNC]](s16)
34    ; VI: $vgpr0 = COPY [[ANYEXT]](s32)
35    ; GFX9-LABEL: name: test_intrinsic_trunc_s16
36    ; GFX9: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
37    ; GFX9: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
38    ; GFX9: [[INTRINSIC_TRUNC:%[0-9]+]]:_(s16) = G_INTRINSIC_TRUNC [[TRUNC]]
39    ; GFX9: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[INTRINSIC_TRUNC]](s16)
40    ; GFX9: $vgpr0 = COPY [[ANYEXT]](s32)
41    %0:_(s32) = COPY $vgpr0
42    %1:_(s16) = G_TRUNC %0
43    %2:_(s16) = G_INTRINSIC_TRUNC %1
44    %3:_(s32) = G_ANYEXT %2
45    $vgpr0 = COPY %3
46...
47
48---
49name: test_intrinsic_trunc_s32
50body: |
51  bb.0:
52    liveins: $vgpr0
53
54    ; SI-LABEL: name: test_intrinsic_trunc_s32
55    ; SI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
56    ; SI: $vgpr0 = COPY [[COPY]](s32)
57    ; CI-LABEL: name: test_intrinsic_trunc_s32
58    ; CI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
59    ; CI: $vgpr0 = COPY [[COPY]](s32)
60    ; VI-LABEL: name: test_intrinsic_trunc_s32
61    ; VI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
62    ; VI: $vgpr0 = COPY [[COPY]](s32)
63    ; GFX9-LABEL: name: test_intrinsic_trunc_s32
64    ; GFX9: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
65    ; GFX9: $vgpr0 = COPY [[COPY]](s32)
66    %0:_(s32) = COPY $vgpr0
67    %1:_(s32) = G_INTRINSIC_TRUNC %0
68    $vgpr0 = COPY %0
69...
70
71---
72name: test_intrinsic_trunc_s64
73body: |
74  bb.0:
75    liveins: $vgpr0_vgpr1
76
77    ; SI-LABEL: name: test_intrinsic_trunc_s64
78    ; SI: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
79    ; SI: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s64)
80    ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 20
81    ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 11
82    ; SI: [[INT:%[0-9]+]]:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.ubfe), [[UV1]](s32), [[C]](s32), [[C1]](s32)
83    ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1023
84    ; SI: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[INT]], [[C2]]
85    ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
86    ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[UV1]], [[C3]]
87    ; SI: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 4503599627370495
88    ; SI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
89    ; SI: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[C5]](s32), [[AND]](s32)
90    ; SI: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[C4]], [[SUB]](s32)
91    ; SI: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1
92    ; SI: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[ASHR]], [[C6]]
93    ; SI: [[AND1:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[XOR]]
94    ; SI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 51
95    ; SI: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[SUB]](s32), [[C5]]
96    ; SI: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(sgt), [[SUB]](s32), [[C7]]
97    ; SI: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[MV]], [[AND1]]
98    ; SI: [[SELECT1:%[0-9]+]]:_(s64) = G_SELECT [[ICMP1]](s1), [[COPY]], [[SELECT]]
99    ; SI: $vgpr0_vgpr1 = COPY [[SELECT1]](s64)
100    ; CI-LABEL: name: test_intrinsic_trunc_s64
101    ; CI: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
102    ; CI: [[INTRINSIC_TRUNC:%[0-9]+]]:_(s64) = G_INTRINSIC_TRUNC [[COPY]]
103    ; CI: $vgpr0_vgpr1 = COPY [[INTRINSIC_TRUNC]](s64)
104    ; VI-LABEL: name: test_intrinsic_trunc_s64
105    ; VI: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
106    ; VI: [[INTRINSIC_TRUNC:%[0-9]+]]:_(s64) = G_INTRINSIC_TRUNC [[COPY]]
107    ; VI: $vgpr0_vgpr1 = COPY [[INTRINSIC_TRUNC]](s64)
108    ; GFX9-LABEL: name: test_intrinsic_trunc_s64
109    ; GFX9: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
110    ; GFX9: [[INTRINSIC_TRUNC:%[0-9]+]]:_(s64) = G_INTRINSIC_TRUNC [[COPY]]
111    ; GFX9: $vgpr0_vgpr1 = COPY [[INTRINSIC_TRUNC]](s64)
112    %0:_(s64) = COPY $vgpr0_vgpr1
113    %1:_(s64) = G_INTRINSIC_TRUNC %0
114    $vgpr0_vgpr1 = COPY %1
115...
116
117---
118name: test_intrinsic_trunc_v2s16
119body: |
120  bb.0:
121    liveins: $vgpr0
122
123    ; SI-LABEL: name: test_intrinsic_trunc_v2s16
124    ; SI: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0
125    ; SI: $vgpr0 = COPY [[COPY]](<2 x s16>)
126    ; CI-LABEL: name: test_intrinsic_trunc_v2s16
127    ; CI: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0
128    ; CI: $vgpr0 = COPY [[COPY]](<2 x s16>)
129    ; VI-LABEL: name: test_intrinsic_trunc_v2s16
130    ; VI: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0
131    ; VI: $vgpr0 = COPY [[COPY]](<2 x s16>)
132    ; GFX9-LABEL: name: test_intrinsic_trunc_v2s16
133    ; GFX9: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0
134    ; GFX9: $vgpr0 = COPY [[COPY]](<2 x s16>)
135    %0:_(<2 x s16>) = COPY $vgpr0
136    %1:_(<2 x s16>) = G_INTRINSIC_TRUNC %0
137    $vgpr0 = COPY %0
138...
139
140---
141name: test_intrinsic_trunc_v2s32
142body: |
143  bb.0:
144    liveins: $vgpr0_vgpr1
145
146    ; SI-LABEL: name: test_intrinsic_trunc_v2s32
147    ; SI: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
148    ; SI: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)
149    ; SI: [[INTRINSIC_TRUNC:%[0-9]+]]:_(s32) = G_INTRINSIC_TRUNC [[UV]]
150    ; SI: [[INTRINSIC_TRUNC1:%[0-9]+]]:_(s32) = G_INTRINSIC_TRUNC [[UV1]]
151    ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[INTRINSIC_TRUNC]](s32), [[INTRINSIC_TRUNC1]](s32)
152    ; SI: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>)
153    ; CI-LABEL: name: test_intrinsic_trunc_v2s32
154    ; CI: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
155    ; CI: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)
156    ; CI: [[INTRINSIC_TRUNC:%[0-9]+]]:_(s32) = G_INTRINSIC_TRUNC [[UV]]
157    ; CI: [[INTRINSIC_TRUNC1:%[0-9]+]]:_(s32) = G_INTRINSIC_TRUNC [[UV1]]
158    ; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[INTRINSIC_TRUNC]](s32), [[INTRINSIC_TRUNC1]](s32)
159    ; CI: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>)
160    ; VI-LABEL: name: test_intrinsic_trunc_v2s32
161    ; VI: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
162    ; VI: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)
163    ; VI: [[INTRINSIC_TRUNC:%[0-9]+]]:_(s32) = G_INTRINSIC_TRUNC [[UV]]
164    ; VI: [[INTRINSIC_TRUNC1:%[0-9]+]]:_(s32) = G_INTRINSIC_TRUNC [[UV1]]
165    ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[INTRINSIC_TRUNC]](s32), [[INTRINSIC_TRUNC1]](s32)
166    ; VI: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>)
167    ; GFX9-LABEL: name: test_intrinsic_trunc_v2s32
168    ; GFX9: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
169    ; GFX9: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)
170    ; GFX9: [[INTRINSIC_TRUNC:%[0-9]+]]:_(s32) = G_INTRINSIC_TRUNC [[UV]]
171    ; GFX9: [[INTRINSIC_TRUNC1:%[0-9]+]]:_(s32) = G_INTRINSIC_TRUNC [[UV1]]
172    ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[INTRINSIC_TRUNC]](s32), [[INTRINSIC_TRUNC1]](s32)
173    ; GFX9: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>)
174    %0:_(<2 x s32>) = COPY $vgpr0_vgpr1
175    %1:_(<2 x s32>) = G_INTRINSIC_TRUNC %0
176    $vgpr0_vgpr1 = COPY %1
177...
178
179---
180name: test_intrinsic_trunc_v2s64
181body: |
182  bb.0:
183    liveins: $vgpr0_vgpr1_vgpr2_vgpr3
184
185    ; SI-LABEL: name: test_intrinsic_trunc_v2s64
186    ; SI: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
187    ; SI: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>)
188    ; SI: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[UV]](s64)
189    ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 20
190    ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 11
191    ; SI: [[INT:%[0-9]+]]:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.ubfe), [[UV3]](s32), [[C]](s32), [[C1]](s32)
192    ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1023
193    ; SI: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[INT]], [[C2]]
194    ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
195    ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[UV3]], [[C3]]
196    ; SI: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 4503599627370495
197    ; SI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
198    ; SI: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[C5]](s32), [[AND]](s32)
199    ; SI: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[C4]], [[SUB]](s32)
200    ; SI: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1
201    ; SI: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[ASHR]], [[C6]]
202    ; SI: [[AND1:%[0-9]+]]:_(s64) = G_AND [[UV]], [[XOR]]
203    ; SI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 51
204    ; SI: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[SUB]](s32), [[C5]]
205    ; SI: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(sgt), [[SUB]](s32), [[C7]]
206    ; SI: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[MV]], [[AND1]]
207    ; SI: [[SELECT1:%[0-9]+]]:_(s64) = G_SELECT [[ICMP1]](s1), [[UV]], [[SELECT]]
208    ; SI: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[UV1]](s64)
209    ; SI: [[INT1:%[0-9]+]]:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.ubfe), [[UV5]](s32), [[C]](s32), [[C1]](s32)
210    ; SI: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[INT1]], [[C2]]
211    ; SI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[UV5]], [[C3]]
212    ; SI: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[C5]](s32), [[AND2]](s32)
213    ; SI: [[ASHR1:%[0-9]+]]:_(s64) = G_ASHR [[C4]], [[SUB1]](s32)
214    ; SI: [[XOR1:%[0-9]+]]:_(s64) = G_XOR [[ASHR1]], [[C6]]
215    ; SI: [[AND3:%[0-9]+]]:_(s64) = G_AND [[UV1]], [[XOR1]]
216    ; SI: [[ICMP2:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[SUB1]](s32), [[C5]]
217    ; SI: [[ICMP3:%[0-9]+]]:_(s1) = G_ICMP intpred(sgt), [[SUB1]](s32), [[C7]]
218    ; SI: [[SELECT2:%[0-9]+]]:_(s64) = G_SELECT [[ICMP2]](s1), [[MV1]], [[AND3]]
219    ; SI: [[SELECT3:%[0-9]+]]:_(s64) = G_SELECT [[ICMP3]](s1), [[UV1]], [[SELECT2]]
220    ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[SELECT1]](s64), [[SELECT3]](s64)
221    ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>)
222    ; CI-LABEL: name: test_intrinsic_trunc_v2s64
223    ; CI: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
224    ; CI: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>)
225    ; CI: [[INTRINSIC_TRUNC:%[0-9]+]]:_(s64) = G_INTRINSIC_TRUNC [[UV]]
226    ; CI: [[INTRINSIC_TRUNC1:%[0-9]+]]:_(s64) = G_INTRINSIC_TRUNC [[UV1]]
227    ; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[INTRINSIC_TRUNC]](s64), [[INTRINSIC_TRUNC1]](s64)
228    ; CI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>)
229    ; VI-LABEL: name: test_intrinsic_trunc_v2s64
230    ; VI: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
231    ; VI: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>)
232    ; VI: [[INTRINSIC_TRUNC:%[0-9]+]]:_(s64) = G_INTRINSIC_TRUNC [[UV]]
233    ; VI: [[INTRINSIC_TRUNC1:%[0-9]+]]:_(s64) = G_INTRINSIC_TRUNC [[UV1]]
234    ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[INTRINSIC_TRUNC]](s64), [[INTRINSIC_TRUNC1]](s64)
235    ; VI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>)
236    ; GFX9-LABEL: name: test_intrinsic_trunc_v2s64
237    ; GFX9: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
238    ; GFX9: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>)
239    ; GFX9: [[INTRINSIC_TRUNC:%[0-9]+]]:_(s64) = G_INTRINSIC_TRUNC [[UV]]
240    ; GFX9: [[INTRINSIC_TRUNC1:%[0-9]+]]:_(s64) = G_INTRINSIC_TRUNC [[UV1]]
241    ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[INTRINSIC_TRUNC]](s64), [[INTRINSIC_TRUNC1]](s64)
242    ; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>)
243    %0:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
244    %1:_(<2 x s64>) = G_INTRINSIC_TRUNC %0
245    $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1
246...
247