1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -O0 -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck -check-prefix=SI %s 3# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=bonaire -mattr=-enable-ds128 -O0 -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck -check-prefix=CI %s 4# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=bonaire -mattr=+enable-ds128 -O0 -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck -check-prefix=CI-DS128 %s 5# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -O0 -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck -check-prefix=VI %s 6# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -O0 -run-pass=legalizer -mattr=-unaligned-access-mode -global-isel-abort=0 %s -o - | FileCheck -check-prefix=GFX9 %s 7# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -O0 -run-pass=legalizer -mattr=+unaligned-access-mode -global-isel-abort=0 %s -o - | FileCheck -check-prefix=GFX9-UNALIGNED %s 8 9--- 10name: test_load_local_s1_align1 11body: | 12 bb.0: 13 liveins: $vgpr0 14 15 ; SI-LABEL: name: test_load_local_s1_align1 16 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 17 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 18 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 19 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 20 ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]] 21 ; SI: $vgpr0 = COPY [[AND]](s32) 22 ; CI-LABEL: name: test_load_local_s1_align1 23 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 24 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 25 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 26 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 27 ; CI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]] 28 ; CI: $vgpr0 = COPY [[AND]](s32) 29 ; CI-DS128-LABEL: name: test_load_local_s1_align1 30 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 31 ; CI-DS128: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 32 ; CI-DS128: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 33 ; CI-DS128: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 34 ; CI-DS128: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]] 35 ; CI-DS128: $vgpr0 = COPY [[AND]](s32) 36 ; VI-LABEL: name: test_load_local_s1_align1 37 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 38 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 39 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 40 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 41 ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]] 42 ; VI: $vgpr0 = COPY [[AND]](s32) 43 ; GFX9-LABEL: name: test_load_local_s1_align1 44 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 45 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 46 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 47 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 48 ; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]] 49 ; GFX9: $vgpr0 = COPY [[AND]](s32) 50 ; GFX9-UNALIGNED-LABEL: name: test_load_local_s1_align1 51 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 52 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 53 ; GFX9-UNALIGNED: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 54 ; GFX9-UNALIGNED: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 55 ; GFX9-UNALIGNED: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]] 56 ; GFX9-UNALIGNED: $vgpr0 = COPY [[AND]](s32) 57 %0:_(p3) = COPY $vgpr0 58 %1:_(s1) = G_LOAD %0 :: (load 1, align 1, addrspace 3) 59 %2:_(s32) = G_ZEXT %1 60 $vgpr0 = COPY %2 61... 62 63--- 64name: test_load_local_s2_align1 65body: | 66 bb.0: 67 liveins: $vgpr0 68 69 ; SI-LABEL: name: test_load_local_s2_align1 70 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 71 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 72 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 73 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 74 ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]] 75 ; SI: $vgpr0 = COPY [[AND]](s32) 76 ; CI-LABEL: name: test_load_local_s2_align1 77 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 78 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 79 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 80 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 81 ; CI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]] 82 ; CI: $vgpr0 = COPY [[AND]](s32) 83 ; CI-DS128-LABEL: name: test_load_local_s2_align1 84 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 85 ; CI-DS128: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 86 ; CI-DS128: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 87 ; CI-DS128: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 88 ; CI-DS128: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]] 89 ; CI-DS128: $vgpr0 = COPY [[AND]](s32) 90 ; VI-LABEL: name: test_load_local_s2_align1 91 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 92 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 93 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 94 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 95 ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]] 96 ; VI: $vgpr0 = COPY [[AND]](s32) 97 ; GFX9-LABEL: name: test_load_local_s2_align1 98 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 99 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 100 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 101 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 102 ; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]] 103 ; GFX9: $vgpr0 = COPY [[AND]](s32) 104 ; GFX9-UNALIGNED-LABEL: name: test_load_local_s2_align1 105 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 106 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 107 ; GFX9-UNALIGNED: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 108 ; GFX9-UNALIGNED: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 109 ; GFX9-UNALIGNED: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]] 110 ; GFX9-UNALIGNED: $vgpr0 = COPY [[AND]](s32) 111 %0:_(p3) = COPY $vgpr0 112 %1:_(s2) = G_LOAD %0 :: (load 1, align 1, addrspace 3) 113 %2:_(s32) = G_ZEXT %1 114 $vgpr0 = COPY %2 115... 116 117--- 118name: test_load_local_s8_align4 119body: | 120 bb.0: 121 liveins: $vgpr0 122 123 ; SI-LABEL: name: test_load_local_s8_align4 124 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 125 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, align 4, addrspace 3) 126 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 127 ; SI: $vgpr0 = COPY [[COPY1]](s32) 128 ; CI-LABEL: name: test_load_local_s8_align4 129 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 130 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, align 4, addrspace 3) 131 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 132 ; CI: $vgpr0 = COPY [[COPY1]](s32) 133 ; CI-DS128-LABEL: name: test_load_local_s8_align4 134 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 135 ; CI-DS128: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, align 4, addrspace 3) 136 ; CI-DS128: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 137 ; CI-DS128: $vgpr0 = COPY [[COPY1]](s32) 138 ; VI-LABEL: name: test_load_local_s8_align4 139 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 140 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, align 4, addrspace 3) 141 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 142 ; VI: $vgpr0 = COPY [[COPY1]](s32) 143 ; GFX9-LABEL: name: test_load_local_s8_align4 144 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 145 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, align 4, addrspace 3) 146 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 147 ; GFX9: $vgpr0 = COPY [[COPY1]](s32) 148 ; GFX9-UNALIGNED-LABEL: name: test_load_local_s8_align4 149 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 150 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, align 4, addrspace 3) 151 ; GFX9-UNALIGNED: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 152 ; GFX9-UNALIGNED: $vgpr0 = COPY [[COPY1]](s32) 153 %0:_(p3) = COPY $vgpr0 154 %1:_(s8) = G_LOAD %0 :: (load 1, align 4, addrspace 3) 155 %2:_(s32) = G_ANYEXT %1 156 $vgpr0 = COPY %2 157... 158 159--- 160name: test_load_local_s8_align1 161body: | 162 bb.0: 163 liveins: $vgpr0 164 165 ; SI-LABEL: name: test_load_local_s8_align1 166 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 167 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 168 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 169 ; SI: $vgpr0 = COPY [[COPY1]](s32) 170 ; CI-LABEL: name: test_load_local_s8_align1 171 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 172 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 173 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 174 ; CI: $vgpr0 = COPY [[COPY1]](s32) 175 ; CI-DS128-LABEL: name: test_load_local_s8_align1 176 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 177 ; CI-DS128: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 178 ; CI-DS128: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 179 ; CI-DS128: $vgpr0 = COPY [[COPY1]](s32) 180 ; VI-LABEL: name: test_load_local_s8_align1 181 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 182 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 183 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 184 ; VI: $vgpr0 = COPY [[COPY1]](s32) 185 ; GFX9-LABEL: name: test_load_local_s8_align1 186 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 187 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 188 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 189 ; GFX9: $vgpr0 = COPY [[COPY1]](s32) 190 ; GFX9-UNALIGNED-LABEL: name: test_load_local_s8_align1 191 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 192 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 193 ; GFX9-UNALIGNED: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 194 ; GFX9-UNALIGNED: $vgpr0 = COPY [[COPY1]](s32) 195 %0:_(p3) = COPY $vgpr0 196 %1:_(s8) = G_LOAD %0 :: (load 1, align 1, addrspace 3) 197 %2:_(s32) = G_ANYEXT %1 198 $vgpr0 = COPY %2 199... 200 201--- 202name: test_load_local_s16_align4 203body: | 204 bb.0: 205 liveins: $vgpr0 206 207 ; SI-LABEL: name: test_load_local_s16_align4 208 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 209 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, align 4, addrspace 3) 210 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 211 ; SI: $vgpr0 = COPY [[COPY1]](s32) 212 ; CI-LABEL: name: test_load_local_s16_align4 213 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 214 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, align 4, addrspace 3) 215 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 216 ; CI: $vgpr0 = COPY [[COPY1]](s32) 217 ; CI-DS128-LABEL: name: test_load_local_s16_align4 218 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 219 ; CI-DS128: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, align 4, addrspace 3) 220 ; CI-DS128: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 221 ; CI-DS128: $vgpr0 = COPY [[COPY1]](s32) 222 ; VI-LABEL: name: test_load_local_s16_align4 223 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 224 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, align 4, addrspace 3) 225 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 226 ; VI: $vgpr0 = COPY [[COPY1]](s32) 227 ; GFX9-LABEL: name: test_load_local_s16_align4 228 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 229 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, align 4, addrspace 3) 230 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 231 ; GFX9: $vgpr0 = COPY [[COPY1]](s32) 232 ; GFX9-UNALIGNED-LABEL: name: test_load_local_s16_align4 233 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 234 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, align 4, addrspace 3) 235 ; GFX9-UNALIGNED: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 236 ; GFX9-UNALIGNED: $vgpr0 = COPY [[COPY1]](s32) 237 %0:_(p3) = COPY $vgpr0 238 %1:_(s16) = G_LOAD %0 :: (load 2, align 4, addrspace 3) 239 %2:_(s32) = G_ANYEXT %1 240 $vgpr0 = COPY %2 241... 242 243--- 244name: test_load_local_s16_align2 245body: | 246 bb.0: 247 liveins: $vgpr0 248 249 ; SI-LABEL: name: test_load_local_s16_align2 250 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 251 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 252 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 253 ; SI: $vgpr0 = COPY [[COPY1]](s32) 254 ; CI-LABEL: name: test_load_local_s16_align2 255 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 256 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 257 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 258 ; CI: $vgpr0 = COPY [[COPY1]](s32) 259 ; CI-DS128-LABEL: name: test_load_local_s16_align2 260 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 261 ; CI-DS128: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 262 ; CI-DS128: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 263 ; CI-DS128: $vgpr0 = COPY [[COPY1]](s32) 264 ; VI-LABEL: name: test_load_local_s16_align2 265 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 266 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 267 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 268 ; VI: $vgpr0 = COPY [[COPY1]](s32) 269 ; GFX9-LABEL: name: test_load_local_s16_align2 270 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 271 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 272 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 273 ; GFX9: $vgpr0 = COPY [[COPY1]](s32) 274 ; GFX9-UNALIGNED-LABEL: name: test_load_local_s16_align2 275 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 276 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 277 ; GFX9-UNALIGNED: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 278 ; GFX9-UNALIGNED: $vgpr0 = COPY [[COPY1]](s32) 279 %0:_(p3) = COPY $vgpr0 280 %1:_(s16) = G_LOAD %0 :: (load 2, align 2, addrspace 3) 281 %2:_(s32) = G_ANYEXT %1 282 $vgpr0 = COPY %2 283... 284 285--- 286name: test_load_local_s16_align1 287body: | 288 bb.0: 289 liveins: $vgpr0 290 291 ; SI-LABEL: name: test_load_local_s16_align1 292 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 293 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 294 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 295 ; SI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 296 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 297 ; SI: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 298 ; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) 299 ; SI: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C1]] 300 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 301 ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 302 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 303 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 304 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 305 ; SI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[SHL]](s32) 306 ; SI: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[TRUNC1]] 307 ; SI: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[OR]](s16) 308 ; SI: $vgpr0 = COPY [[ANYEXT]](s32) 309 ; CI-LABEL: name: test_load_local_s16_align1 310 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 311 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 312 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 313 ; CI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 314 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 315 ; CI: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 316 ; CI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) 317 ; CI: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C1]] 318 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 319 ; CI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 320 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 321 ; CI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 322 ; CI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 323 ; CI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[SHL]](s32) 324 ; CI: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[TRUNC1]] 325 ; CI: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[OR]](s16) 326 ; CI: $vgpr0 = COPY [[ANYEXT]](s32) 327 ; CI-DS128-LABEL: name: test_load_local_s16_align1 328 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 329 ; CI-DS128: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 330 ; CI-DS128: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 331 ; CI-DS128: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 332 ; CI-DS128: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 333 ; CI-DS128: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 334 ; CI-DS128: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) 335 ; CI-DS128: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C1]] 336 ; CI-DS128: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 337 ; CI-DS128: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 338 ; CI-DS128: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 339 ; CI-DS128: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 340 ; CI-DS128: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 341 ; CI-DS128: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[SHL]](s32) 342 ; CI-DS128: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[TRUNC1]] 343 ; CI-DS128: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[OR]](s16) 344 ; CI-DS128: $vgpr0 = COPY [[ANYEXT]](s32) 345 ; VI-LABEL: name: test_load_local_s16_align1 346 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 347 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 348 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 349 ; VI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 350 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 351 ; VI: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 352 ; VI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) 353 ; VI: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C1]] 354 ; VI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD1]](s32) 355 ; VI: [[AND1:%[0-9]+]]:_(s16) = G_AND [[TRUNC1]], [[C1]] 356 ; VI: [[C2:%[0-9]+]]:_(s16) = G_CONSTANT i16 8 357 ; VI: [[SHL:%[0-9]+]]:_(s16) = G_SHL [[AND1]], [[C2]](s16) 358 ; VI: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[SHL]] 359 ; VI: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[OR]](s16) 360 ; VI: $vgpr0 = COPY [[ANYEXT]](s32) 361 ; GFX9-LABEL: name: test_load_local_s16_align1 362 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 363 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 364 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 365 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 366 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 367 ; GFX9: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 368 ; GFX9: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) 369 ; GFX9: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C1]] 370 ; GFX9: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD1]](s32) 371 ; GFX9: [[AND1:%[0-9]+]]:_(s16) = G_AND [[TRUNC1]], [[C1]] 372 ; GFX9: [[C2:%[0-9]+]]:_(s16) = G_CONSTANT i16 8 373 ; GFX9: [[SHL:%[0-9]+]]:_(s16) = G_SHL [[AND1]], [[C2]](s16) 374 ; GFX9: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[SHL]] 375 ; GFX9: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[OR]](s16) 376 ; GFX9: $vgpr0 = COPY [[ANYEXT]](s32) 377 ; GFX9-UNALIGNED-LABEL: name: test_load_local_s16_align1 378 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 379 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, align 1, addrspace 3) 380 ; GFX9-UNALIGNED: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 381 ; GFX9-UNALIGNED: $vgpr0 = COPY [[COPY1]](s32) 382 %0:_(p3) = COPY $vgpr0 383 %1:_(s16) = G_LOAD %0 :: (load 2, align 1, addrspace 3) 384 %2:_(s32) = G_ANYEXT %1 385 $vgpr0 = COPY %2 386... 387 388--- 389name: test_load_local_s32_align4 390body: | 391 bb.0: 392 liveins: $vgpr0 393 394 ; SI-LABEL: name: test_load_local_s32_align4 395 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 396 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) 397 ; SI: $vgpr0 = COPY [[LOAD]](s32) 398 ; CI-LABEL: name: test_load_local_s32_align4 399 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 400 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) 401 ; CI: $vgpr0 = COPY [[LOAD]](s32) 402 ; CI-DS128-LABEL: name: test_load_local_s32_align4 403 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 404 ; CI-DS128: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) 405 ; CI-DS128: $vgpr0 = COPY [[LOAD]](s32) 406 ; VI-LABEL: name: test_load_local_s32_align4 407 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 408 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) 409 ; VI: $vgpr0 = COPY [[LOAD]](s32) 410 ; GFX9-LABEL: name: test_load_local_s32_align4 411 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 412 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) 413 ; GFX9: $vgpr0 = COPY [[LOAD]](s32) 414 ; GFX9-UNALIGNED-LABEL: name: test_load_local_s32_align4 415 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 416 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) 417 ; GFX9-UNALIGNED: $vgpr0 = COPY [[LOAD]](s32) 418 %0:_(p3) = COPY $vgpr0 419 %1:_(s32) = G_LOAD %0 :: (load 4, align 4, addrspace 3) 420 $vgpr0 = COPY %1 421... 422 423--- 424name: test_load_local_s32_align2 425body: | 426 bb.0: 427 liveins: $vgpr0 428 429 ; SI-LABEL: name: test_load_local_s32_align2 430 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 431 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 432 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 433 ; SI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 434 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 435 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 436 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 437 ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 438 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 439 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 440 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 441 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 442 ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 443 ; SI: $vgpr0 = COPY [[OR]](s32) 444 ; CI-LABEL: name: test_load_local_s32_align2 445 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 446 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 447 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 448 ; CI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 449 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 450 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 451 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 452 ; CI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 453 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 454 ; CI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 455 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 456 ; CI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 457 ; CI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 458 ; CI: $vgpr0 = COPY [[OR]](s32) 459 ; CI-DS128-LABEL: name: test_load_local_s32_align2 460 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 461 ; CI-DS128: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 462 ; CI-DS128: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 463 ; CI-DS128: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 464 ; CI-DS128: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 465 ; CI-DS128: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 466 ; CI-DS128: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 467 ; CI-DS128: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 468 ; CI-DS128: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 469 ; CI-DS128: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 470 ; CI-DS128: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 471 ; CI-DS128: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 472 ; CI-DS128: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 473 ; CI-DS128: $vgpr0 = COPY [[OR]](s32) 474 ; VI-LABEL: name: test_load_local_s32_align2 475 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 476 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 477 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 478 ; VI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 479 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 480 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 481 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 482 ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 483 ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 484 ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 485 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 486 ; VI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 487 ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 488 ; VI: $vgpr0 = COPY [[OR]](s32) 489 ; GFX9-LABEL: name: test_load_local_s32_align2 490 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 491 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 492 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 493 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 494 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 495 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 496 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 497 ; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 498 ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 499 ; GFX9: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 500 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 501 ; GFX9: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 502 ; GFX9: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 503 ; GFX9: $vgpr0 = COPY [[OR]](s32) 504 ; GFX9-UNALIGNED-LABEL: name: test_load_local_s32_align2 505 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 506 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 4, align 2, addrspace 3) 507 ; GFX9-UNALIGNED: $vgpr0 = COPY [[LOAD]](s32) 508 %0:_(p3) = COPY $vgpr0 509 %1:_(s32) = G_LOAD %0 :: (load 4, align 2, addrspace 3) 510 $vgpr0 = COPY %1 511... 512 513--- 514name: test_load_local_s32_align1 515body: | 516 bb.0: 517 liveins: $vgpr0 518 519 ; SI-LABEL: name: test_load_local_s32_align1 520 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 521 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 522 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 523 ; SI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 524 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 525 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 526 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 527 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 528 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 529 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 530 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 531 ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 532 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 533 ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 534 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 535 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 536 ; SI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 537 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 538 ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 539 ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 540 ; SI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 541 ; SI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 542 ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 543 ; SI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 544 ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 545 ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 546 ; SI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 547 ; SI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 548 ; SI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 549 ; SI: $vgpr0 = COPY [[OR2]](s32) 550 ; CI-LABEL: name: test_load_local_s32_align1 551 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 552 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 553 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 554 ; CI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 555 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 556 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 557 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 558 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 559 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 560 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 561 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 562 ; CI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 563 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 564 ; CI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 565 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 566 ; CI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 567 ; CI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 568 ; CI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 569 ; CI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 570 ; CI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 571 ; CI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 572 ; CI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 573 ; CI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 574 ; CI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 575 ; CI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 576 ; CI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 577 ; CI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 578 ; CI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 579 ; CI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 580 ; CI: $vgpr0 = COPY [[OR2]](s32) 581 ; CI-DS128-LABEL: name: test_load_local_s32_align1 582 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 583 ; CI-DS128: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 584 ; CI-DS128: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 585 ; CI-DS128: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 586 ; CI-DS128: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 587 ; CI-DS128: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 588 ; CI-DS128: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 589 ; CI-DS128: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 590 ; CI-DS128: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 591 ; CI-DS128: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 592 ; CI-DS128: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 593 ; CI-DS128: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 594 ; CI-DS128: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 595 ; CI-DS128: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 596 ; CI-DS128: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 597 ; CI-DS128: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 598 ; CI-DS128: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 599 ; CI-DS128: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 600 ; CI-DS128: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 601 ; CI-DS128: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 602 ; CI-DS128: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 603 ; CI-DS128: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 604 ; CI-DS128: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 605 ; CI-DS128: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 606 ; CI-DS128: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 607 ; CI-DS128: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 608 ; CI-DS128: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 609 ; CI-DS128: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 610 ; CI-DS128: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 611 ; CI-DS128: $vgpr0 = COPY [[OR2]](s32) 612 ; VI-LABEL: name: test_load_local_s32_align1 613 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 614 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 615 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 616 ; VI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 617 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 618 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 619 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 620 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 621 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 622 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 623 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 624 ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 625 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 626 ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 627 ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 628 ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 629 ; VI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 630 ; VI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 631 ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 632 ; VI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 633 ; VI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 634 ; VI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 635 ; VI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 636 ; VI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 637 ; VI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 638 ; VI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 639 ; VI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 640 ; VI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 641 ; VI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 642 ; VI: $vgpr0 = COPY [[OR2]](s32) 643 ; GFX9-LABEL: name: test_load_local_s32_align1 644 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 645 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 646 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 647 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 648 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 649 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 650 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 651 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 652 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 653 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 654 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 655 ; GFX9: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 656 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 657 ; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 658 ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 659 ; GFX9: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 660 ; GFX9: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 661 ; GFX9: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 662 ; GFX9: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 663 ; GFX9: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 664 ; GFX9: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 665 ; GFX9: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 666 ; GFX9: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 667 ; GFX9: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 668 ; GFX9: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 669 ; GFX9: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 670 ; GFX9: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 671 ; GFX9: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 672 ; GFX9: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 673 ; GFX9: $vgpr0 = COPY [[OR2]](s32) 674 ; GFX9-UNALIGNED-LABEL: name: test_load_local_s32_align1 675 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 676 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 4, align 1, addrspace 3) 677 ; GFX9-UNALIGNED: $vgpr0 = COPY [[LOAD]](s32) 678 %0:_(p3) = COPY $vgpr0 679 %1:_(s32) = G_LOAD %0 :: (load 4, align 1, addrspace 3) 680 $vgpr0 = COPY %1 681... 682 683--- 684name: test_load_local_s24_align8 685body: | 686 bb.0: 687 liveins: $vgpr0 688 689 ; SI-LABEL: name: test_load_local_s24_align8 690 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 691 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 4, align 8, addrspace 3) 692 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 693 ; SI: $vgpr0 = COPY [[COPY1]](s32) 694 ; CI-LABEL: name: test_load_local_s24_align8 695 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 696 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 4, align 8, addrspace 3) 697 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 698 ; CI: $vgpr0 = COPY [[COPY1]](s32) 699 ; CI-DS128-LABEL: name: test_load_local_s24_align8 700 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 701 ; CI-DS128: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 4, align 8, addrspace 3) 702 ; CI-DS128: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 703 ; CI-DS128: $vgpr0 = COPY [[COPY1]](s32) 704 ; VI-LABEL: name: test_load_local_s24_align8 705 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 706 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 4, align 8, addrspace 3) 707 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 708 ; VI: $vgpr0 = COPY [[COPY1]](s32) 709 ; GFX9-LABEL: name: test_load_local_s24_align8 710 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 711 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 4, align 8, addrspace 3) 712 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 713 ; GFX9: $vgpr0 = COPY [[COPY1]](s32) 714 ; GFX9-UNALIGNED-LABEL: name: test_load_local_s24_align8 715 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 716 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 4, align 8, addrspace 3) 717 ; GFX9-UNALIGNED: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 718 ; GFX9-UNALIGNED: $vgpr0 = COPY [[COPY1]](s32) 719 %0:_(p3) = COPY $vgpr0 720 %1:_(s24) = G_LOAD %0 :: (load 3, align 8, addrspace 3) 721 %2:_(s32) = G_ANYEXT %1 722 $vgpr0 = COPY %2 723... 724 725--- 726name: test_load_local_s24_align4 727body: | 728 bb.0: 729 liveins: $vgpr0 730 731 ; SI-LABEL: name: test_load_local_s24_align4 732 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 733 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) 734 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 735 ; SI: $vgpr0 = COPY [[COPY1]](s32) 736 ; CI-LABEL: name: test_load_local_s24_align4 737 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 738 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) 739 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 740 ; CI: $vgpr0 = COPY [[COPY1]](s32) 741 ; CI-DS128-LABEL: name: test_load_local_s24_align4 742 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 743 ; CI-DS128: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) 744 ; CI-DS128: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 745 ; CI-DS128: $vgpr0 = COPY [[COPY1]](s32) 746 ; VI-LABEL: name: test_load_local_s24_align4 747 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 748 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) 749 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 750 ; VI: $vgpr0 = COPY [[COPY1]](s32) 751 ; GFX9-LABEL: name: test_load_local_s24_align4 752 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 753 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) 754 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 755 ; GFX9: $vgpr0 = COPY [[COPY1]](s32) 756 ; GFX9-UNALIGNED-LABEL: name: test_load_local_s24_align4 757 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 758 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) 759 ; GFX9-UNALIGNED: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 760 ; GFX9-UNALIGNED: $vgpr0 = COPY [[COPY1]](s32) 761 %0:_(p3) = COPY $vgpr0 762 %1:_(s24) = G_LOAD %0 :: (load 3, align 4, addrspace 3) 763 %2:_(s32) = G_ANYEXT %1 764 $vgpr0 = COPY %2 765... 766 767--- 768name: test_load_local_s24_align2 769body: | 770 bb.0: 771 liveins: $vgpr0 772 773 ; SI-LABEL: name: test_load_local_s24_align2 774 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 775 ; SI: [[LOAD:%[0-9]+]]:_(s16) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 776 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 777 ; SI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 778 ; SI: [[LOAD1:%[0-9]+]]:_(s8) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 2, align 2, addrspace 3) 779 ; SI: [[DEF:%[0-9]+]]:_(s24) = G_IMPLICIT_DEF 780 ; SI: [[INSERT:%[0-9]+]]:_(s24) = G_INSERT [[DEF]], [[LOAD]](s16), 0 781 ; SI: [[INSERT1:%[0-9]+]]:_(s24) = G_INSERT [[INSERT]], [[LOAD1]](s8), 16 782 ; SI: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[INSERT1]](s24) 783 ; SI: $vgpr0 = COPY [[ANYEXT]](s32) 784 ; CI-LABEL: name: test_load_local_s24_align2 785 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 786 ; CI: [[LOAD:%[0-9]+]]:_(s16) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 787 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 788 ; CI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 789 ; CI: [[LOAD1:%[0-9]+]]:_(s8) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 2, align 2, addrspace 3) 790 ; CI: [[DEF:%[0-9]+]]:_(s24) = G_IMPLICIT_DEF 791 ; CI: [[INSERT:%[0-9]+]]:_(s24) = G_INSERT [[DEF]], [[LOAD]](s16), 0 792 ; CI: [[INSERT1:%[0-9]+]]:_(s24) = G_INSERT [[INSERT]], [[LOAD1]](s8), 16 793 ; CI: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[INSERT1]](s24) 794 ; CI: $vgpr0 = COPY [[ANYEXT]](s32) 795 ; CI-DS128-LABEL: name: test_load_local_s24_align2 796 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 797 ; CI-DS128: [[LOAD:%[0-9]+]]:_(s16) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 798 ; CI-DS128: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 799 ; CI-DS128: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 800 ; CI-DS128: [[LOAD1:%[0-9]+]]:_(s8) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 2, align 2, addrspace 3) 801 ; CI-DS128: [[DEF:%[0-9]+]]:_(s24) = G_IMPLICIT_DEF 802 ; CI-DS128: [[INSERT:%[0-9]+]]:_(s24) = G_INSERT [[DEF]], [[LOAD]](s16), 0 803 ; CI-DS128: [[INSERT1:%[0-9]+]]:_(s24) = G_INSERT [[INSERT]], [[LOAD1]](s8), 16 804 ; CI-DS128: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[INSERT1]](s24) 805 ; CI-DS128: $vgpr0 = COPY [[ANYEXT]](s32) 806 ; VI-LABEL: name: test_load_local_s24_align2 807 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 808 ; VI: [[LOAD:%[0-9]+]]:_(s16) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 809 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 810 ; VI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 811 ; VI: [[LOAD1:%[0-9]+]]:_(s8) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 2, align 2, addrspace 3) 812 ; VI: [[DEF:%[0-9]+]]:_(s24) = G_IMPLICIT_DEF 813 ; VI: [[INSERT:%[0-9]+]]:_(s24) = G_INSERT [[DEF]], [[LOAD]](s16), 0 814 ; VI: [[INSERT1:%[0-9]+]]:_(s24) = G_INSERT [[INSERT]], [[LOAD1]](s8), 16 815 ; VI: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[INSERT1]](s24) 816 ; VI: $vgpr0 = COPY [[ANYEXT]](s32) 817 ; GFX9-LABEL: name: test_load_local_s24_align2 818 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 819 ; GFX9: [[LOAD:%[0-9]+]]:_(s16) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 820 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 821 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 822 ; GFX9: [[LOAD1:%[0-9]+]]:_(s8) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 2, align 2, addrspace 3) 823 ; GFX9: [[DEF:%[0-9]+]]:_(s24) = G_IMPLICIT_DEF 824 ; GFX9: [[INSERT:%[0-9]+]]:_(s24) = G_INSERT [[DEF]], [[LOAD]](s16), 0 825 ; GFX9: [[INSERT1:%[0-9]+]]:_(s24) = G_INSERT [[INSERT]], [[LOAD1]](s8), 16 826 ; GFX9: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[INSERT1]](s24) 827 ; GFX9: $vgpr0 = COPY [[ANYEXT]](s32) 828 ; GFX9-UNALIGNED-LABEL: name: test_load_local_s24_align2 829 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 830 ; GFX9-UNALIGNED: [[ZEXTLOAD:%[0-9]+]]:_(s32) = G_ZEXTLOAD [[COPY]](p3) :: (load 2, addrspace 3) 831 ; GFX9-UNALIGNED: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 832 ; GFX9-UNALIGNED: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 833 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 2, align 2, addrspace 3) 834 ; GFX9-UNALIGNED: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 835 ; GFX9-UNALIGNED: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[LOAD]], [[C1]](s32) 836 ; GFX9-UNALIGNED: [[OR:%[0-9]+]]:_(s32) = G_OR [[SHL]], [[ZEXTLOAD]] 837 ; GFX9-UNALIGNED: [[COPY1:%[0-9]+]]:_(s32) = COPY [[OR]](s32) 838 ; GFX9-UNALIGNED: $vgpr0 = COPY [[COPY1]](s32) 839 %0:_(p3) = COPY $vgpr0 840 %1:_(s24) = G_LOAD %0 :: (load 3, align 2, addrspace 3) 841 %2:_(s32) = G_ANYEXT %1 842 $vgpr0 = COPY %2 843... 844 845--- 846name: test_load_local_s24_align1 847body: | 848 bb.0: 849 liveins: $vgpr0 850 851 ; SI-LABEL: name: test_load_local_s24_align1 852 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 853 ; SI: [[LOAD:%[0-9]+]]:_(s16) = G_LOAD [[COPY]](p3) :: (load 2, align 1, addrspace 3) 854 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 855 ; SI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 856 ; SI: [[LOAD1:%[0-9]+]]:_(s8) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 2, addrspace 3) 857 ; SI: [[DEF:%[0-9]+]]:_(s24) = G_IMPLICIT_DEF 858 ; SI: [[INSERT:%[0-9]+]]:_(s24) = G_INSERT [[DEF]], [[LOAD]](s16), 0 859 ; SI: [[INSERT1:%[0-9]+]]:_(s24) = G_INSERT [[INSERT]], [[LOAD1]](s8), 16 860 ; SI: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[INSERT1]](s24) 861 ; SI: $vgpr0 = COPY [[ANYEXT]](s32) 862 ; CI-LABEL: name: test_load_local_s24_align1 863 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 864 ; CI: [[LOAD:%[0-9]+]]:_(s16) = G_LOAD [[COPY]](p3) :: (load 2, align 1, addrspace 3) 865 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 866 ; CI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 867 ; CI: [[LOAD1:%[0-9]+]]:_(s8) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 2, addrspace 3) 868 ; CI: [[DEF:%[0-9]+]]:_(s24) = G_IMPLICIT_DEF 869 ; CI: [[INSERT:%[0-9]+]]:_(s24) = G_INSERT [[DEF]], [[LOAD]](s16), 0 870 ; CI: [[INSERT1:%[0-9]+]]:_(s24) = G_INSERT [[INSERT]], [[LOAD1]](s8), 16 871 ; CI: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[INSERT1]](s24) 872 ; CI: $vgpr0 = COPY [[ANYEXT]](s32) 873 ; CI-DS128-LABEL: name: test_load_local_s24_align1 874 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 875 ; CI-DS128: [[LOAD:%[0-9]+]]:_(s16) = G_LOAD [[COPY]](p3) :: (load 2, align 1, addrspace 3) 876 ; CI-DS128: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 877 ; CI-DS128: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 878 ; CI-DS128: [[LOAD1:%[0-9]+]]:_(s8) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 2, addrspace 3) 879 ; CI-DS128: [[DEF:%[0-9]+]]:_(s24) = G_IMPLICIT_DEF 880 ; CI-DS128: [[INSERT:%[0-9]+]]:_(s24) = G_INSERT [[DEF]], [[LOAD]](s16), 0 881 ; CI-DS128: [[INSERT1:%[0-9]+]]:_(s24) = G_INSERT [[INSERT]], [[LOAD1]](s8), 16 882 ; CI-DS128: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[INSERT1]](s24) 883 ; CI-DS128: $vgpr0 = COPY [[ANYEXT]](s32) 884 ; VI-LABEL: name: test_load_local_s24_align1 885 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 886 ; VI: [[LOAD:%[0-9]+]]:_(s16) = G_LOAD [[COPY]](p3) :: (load 2, align 1, addrspace 3) 887 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 888 ; VI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 889 ; VI: [[LOAD1:%[0-9]+]]:_(s8) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 2, addrspace 3) 890 ; VI: [[DEF:%[0-9]+]]:_(s24) = G_IMPLICIT_DEF 891 ; VI: [[INSERT:%[0-9]+]]:_(s24) = G_INSERT [[DEF]], [[LOAD]](s16), 0 892 ; VI: [[INSERT1:%[0-9]+]]:_(s24) = G_INSERT [[INSERT]], [[LOAD1]](s8), 16 893 ; VI: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[INSERT1]](s24) 894 ; VI: $vgpr0 = COPY [[ANYEXT]](s32) 895 ; GFX9-LABEL: name: test_load_local_s24_align1 896 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 897 ; GFX9: [[LOAD:%[0-9]+]]:_(s16) = G_LOAD [[COPY]](p3) :: (load 2, align 1, addrspace 3) 898 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 899 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 900 ; GFX9: [[LOAD1:%[0-9]+]]:_(s8) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 2, addrspace 3) 901 ; GFX9: [[DEF:%[0-9]+]]:_(s24) = G_IMPLICIT_DEF 902 ; GFX9: [[INSERT:%[0-9]+]]:_(s24) = G_INSERT [[DEF]], [[LOAD]](s16), 0 903 ; GFX9: [[INSERT1:%[0-9]+]]:_(s24) = G_INSERT [[INSERT]], [[LOAD1]](s8), 16 904 ; GFX9: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[INSERT1]](s24) 905 ; GFX9: $vgpr0 = COPY [[ANYEXT]](s32) 906 ; GFX9-UNALIGNED-LABEL: name: test_load_local_s24_align1 907 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 908 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, align 1, addrspace 3) 909 ; GFX9-UNALIGNED: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 910 ; GFX9-UNALIGNED: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 911 ; GFX9-UNALIGNED: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]] 912 ; GFX9-UNALIGNED: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 913 ; GFX9-UNALIGNED: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 914 ; GFX9-UNALIGNED: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 2, addrspace 3) 915 ; GFX9-UNALIGNED: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 916 ; GFX9-UNALIGNED: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[LOAD1]], [[C2]](s32) 917 ; GFX9-UNALIGNED: [[OR:%[0-9]+]]:_(s32) = G_OR [[SHL]], [[AND]] 918 ; GFX9-UNALIGNED: [[COPY2:%[0-9]+]]:_(s32) = COPY [[OR]](s32) 919 ; GFX9-UNALIGNED: $vgpr0 = COPY [[COPY2]](s32) 920 %0:_(p3) = COPY $vgpr0 921 %1:_(s24) = G_LOAD %0 :: (load 3, align 1, addrspace 3) 922 %2:_(s32) = G_ANYEXT %1 923 $vgpr0 = COPY %2 924... 925 926--- 927name: test_load_local_s48_align8 928body: | 929 bb.0: 930 liveins: $vgpr0 931 932 ; SI-LABEL: name: test_load_local_s48_align8 933 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 934 ; SI: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) 935 ; SI: [[COPY1:%[0-9]+]]:_(s64) = COPY [[LOAD]](s64) 936 ; SI: $vgpr0_vgpr1 = COPY [[COPY1]](s64) 937 ; CI-LABEL: name: test_load_local_s48_align8 938 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 939 ; CI: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) 940 ; CI: [[COPY1:%[0-9]+]]:_(s64) = COPY [[LOAD]](s64) 941 ; CI: $vgpr0_vgpr1 = COPY [[COPY1]](s64) 942 ; CI-DS128-LABEL: name: test_load_local_s48_align8 943 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 944 ; CI-DS128: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) 945 ; CI-DS128: [[COPY1:%[0-9]+]]:_(s64) = COPY [[LOAD]](s64) 946 ; CI-DS128: $vgpr0_vgpr1 = COPY [[COPY1]](s64) 947 ; VI-LABEL: name: test_load_local_s48_align8 948 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 949 ; VI: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) 950 ; VI: [[COPY1:%[0-9]+]]:_(s64) = COPY [[LOAD]](s64) 951 ; VI: $vgpr0_vgpr1 = COPY [[COPY1]](s64) 952 ; GFX9-LABEL: name: test_load_local_s48_align8 953 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 954 ; GFX9: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) 955 ; GFX9: [[COPY1:%[0-9]+]]:_(s64) = COPY [[LOAD]](s64) 956 ; GFX9: $vgpr0_vgpr1 = COPY [[COPY1]](s64) 957 ; GFX9-UNALIGNED-LABEL: name: test_load_local_s48_align8 958 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 959 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) 960 ; GFX9-UNALIGNED: [[COPY1:%[0-9]+]]:_(s64) = COPY [[LOAD]](s64) 961 ; GFX9-UNALIGNED: $vgpr0_vgpr1 = COPY [[COPY1]](s64) 962 %0:_(p3) = COPY $vgpr0 963 %1:_(s48) = G_LOAD %0 :: (load 6, align 8, addrspace 3) 964 %2:_(s64) = G_ANYEXT %1 965 $vgpr0_vgpr1 = COPY %2 966... 967 968--- 969name: test_load_local_s64_align8 970body: | 971 bb.0: 972 liveins: $vgpr0 973 974 ; SI-LABEL: name: test_load_local_s64_align8 975 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 976 ; SI: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) 977 ; SI: $vgpr0_vgpr1 = COPY [[LOAD]](s64) 978 ; CI-LABEL: name: test_load_local_s64_align8 979 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 980 ; CI: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) 981 ; CI: $vgpr0_vgpr1 = COPY [[LOAD]](s64) 982 ; CI-DS128-LABEL: name: test_load_local_s64_align8 983 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 984 ; CI-DS128: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) 985 ; CI-DS128: $vgpr0_vgpr1 = COPY [[LOAD]](s64) 986 ; VI-LABEL: name: test_load_local_s64_align8 987 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 988 ; VI: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) 989 ; VI: $vgpr0_vgpr1 = COPY [[LOAD]](s64) 990 ; GFX9-LABEL: name: test_load_local_s64_align8 991 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 992 ; GFX9: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) 993 ; GFX9: $vgpr0_vgpr1 = COPY [[LOAD]](s64) 994 ; GFX9-UNALIGNED-LABEL: name: test_load_local_s64_align8 995 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 996 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) 997 ; GFX9-UNALIGNED: $vgpr0_vgpr1 = COPY [[LOAD]](s64) 998 %0:_(p3) = COPY $vgpr0 999 %1:_(s64) = G_LOAD %0 :: (load 8, align 8, addrspace 3) 1000 $vgpr0_vgpr1 = COPY %1 1001... 1002 1003--- 1004name: test_load_local_s64_align4 1005body: | 1006 bb.0: 1007 liveins: $vgpr0 1008 1009 ; SI-LABEL: name: test_load_local_s64_align4 1010 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 1011 ; SI: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p3) :: (load 8, align 4, addrspace 3) 1012 ; SI: $vgpr0_vgpr1 = COPY [[LOAD]](s64) 1013 ; CI-LABEL: name: test_load_local_s64_align4 1014 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 1015 ; CI: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p3) :: (load 8, align 4, addrspace 3) 1016 ; CI: $vgpr0_vgpr1 = COPY [[LOAD]](s64) 1017 ; CI-DS128-LABEL: name: test_load_local_s64_align4 1018 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 1019 ; CI-DS128: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p3) :: (load 8, align 4, addrspace 3) 1020 ; CI-DS128: $vgpr0_vgpr1 = COPY [[LOAD]](s64) 1021 ; VI-LABEL: name: test_load_local_s64_align4 1022 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 1023 ; VI: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p3) :: (load 8, align 4, addrspace 3) 1024 ; VI: $vgpr0_vgpr1 = COPY [[LOAD]](s64) 1025 ; GFX9-LABEL: name: test_load_local_s64_align4 1026 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 1027 ; GFX9: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p3) :: (load 8, align 4, addrspace 3) 1028 ; GFX9: $vgpr0_vgpr1 = COPY [[LOAD]](s64) 1029 ; GFX9-UNALIGNED-LABEL: name: test_load_local_s64_align4 1030 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 1031 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p3) :: (load 8, align 4, addrspace 3) 1032 ; GFX9-UNALIGNED: $vgpr0_vgpr1 = COPY [[LOAD]](s64) 1033 %0:_(p3) = COPY $vgpr0 1034 %1:_(s64) = G_LOAD %0 :: (load 8, align 4, addrspace 3) 1035 $vgpr0_vgpr1 = COPY %1 1036... 1037 1038--- 1039name: test_load_local_s64_align2 1040body: | 1041 bb.0: 1042 liveins: $vgpr0 1043 1044 ; SI-LABEL: name: test_load_local_s64_align2 1045 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 1046 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 1047 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 1048 ; SI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 1049 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 1050 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 1051 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 1052 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 2 + 4, addrspace 3) 1053 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 6 1054 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 1055 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 2 + 6, addrspace 3) 1056 ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 1057 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 1058 ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 1059 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 1060 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 1061 ; SI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 1062 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 1063 ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 1064 ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 1065 ; SI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 1066 ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 1067 ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 1068 ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C4]](s32) 1069 ; SI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 1070 ; SI: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR]](s32), [[OR1]](s32) 1071 ; SI: $vgpr0_vgpr1 = COPY [[MV]](s64) 1072 ; CI-LABEL: name: test_load_local_s64_align2 1073 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 1074 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 1075 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 1076 ; CI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 1077 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 1078 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 1079 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 1080 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 2 + 4, addrspace 3) 1081 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 6 1082 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 1083 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 2 + 6, addrspace 3) 1084 ; CI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 1085 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 1086 ; CI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 1087 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 1088 ; CI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 1089 ; CI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 1090 ; CI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 1091 ; CI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 1092 ; CI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 1093 ; CI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 1094 ; CI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 1095 ; CI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 1096 ; CI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C4]](s32) 1097 ; CI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 1098 ; CI: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR]](s32), [[OR1]](s32) 1099 ; CI: $vgpr0_vgpr1 = COPY [[MV]](s64) 1100 ; CI-DS128-LABEL: name: test_load_local_s64_align2 1101 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 1102 ; CI-DS128: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 1103 ; CI-DS128: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 1104 ; CI-DS128: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 1105 ; CI-DS128: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 1106 ; CI-DS128: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 1107 ; CI-DS128: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 1108 ; CI-DS128: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 2 + 4, addrspace 3) 1109 ; CI-DS128: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 6 1110 ; CI-DS128: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 1111 ; CI-DS128: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 2 + 6, addrspace 3) 1112 ; CI-DS128: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 1113 ; CI-DS128: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 1114 ; CI-DS128: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 1115 ; CI-DS128: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 1116 ; CI-DS128: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 1117 ; CI-DS128: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 1118 ; CI-DS128: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 1119 ; CI-DS128: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 1120 ; CI-DS128: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 1121 ; CI-DS128: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 1122 ; CI-DS128: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 1123 ; CI-DS128: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 1124 ; CI-DS128: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C4]](s32) 1125 ; CI-DS128: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 1126 ; CI-DS128: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR]](s32), [[OR1]](s32) 1127 ; CI-DS128: $vgpr0_vgpr1 = COPY [[MV]](s64) 1128 ; VI-LABEL: name: test_load_local_s64_align2 1129 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 1130 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 1131 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 1132 ; VI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 1133 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 1134 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 1135 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 1136 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 2 + 4, addrspace 3) 1137 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 6 1138 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 1139 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 2 + 6, addrspace 3) 1140 ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 1141 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 1142 ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 1143 ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 1144 ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 1145 ; VI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 1146 ; VI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 1147 ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 1148 ; VI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 1149 ; VI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 1150 ; VI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 1151 ; VI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 1152 ; VI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C4]](s32) 1153 ; VI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 1154 ; VI: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR]](s32), [[OR1]](s32) 1155 ; VI: $vgpr0_vgpr1 = COPY [[MV]](s64) 1156 ; GFX9-LABEL: name: test_load_local_s64_align2 1157 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 1158 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 1159 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 1160 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 1161 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 1162 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 1163 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 1164 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 2 + 4, addrspace 3) 1165 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 6 1166 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 1167 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 2 + 6, addrspace 3) 1168 ; GFX9: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 1169 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 1170 ; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 1171 ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 1172 ; GFX9: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 1173 ; GFX9: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 1174 ; GFX9: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 1175 ; GFX9: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 1176 ; GFX9: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 1177 ; GFX9: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 1178 ; GFX9: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 1179 ; GFX9: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 1180 ; GFX9: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C4]](s32) 1181 ; GFX9: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 1182 ; GFX9: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR]](s32), [[OR1]](s32) 1183 ; GFX9: $vgpr0_vgpr1 = COPY [[MV]](s64) 1184 ; GFX9-UNALIGNED-LABEL: name: test_load_local_s64_align2 1185 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 1186 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p3) :: (load 8, align 2, addrspace 3) 1187 ; GFX9-UNALIGNED: $vgpr0_vgpr1 = COPY [[LOAD]](s64) 1188 %0:_(p3) = COPY $vgpr0 1189 %1:_(s64) = G_LOAD %0 :: (load 8, align 2, addrspace 3) 1190 $vgpr0_vgpr1 = COPY %1 1191... 1192 1193--- 1194name: test_load_local_s64_align1 1195body: | 1196 bb.0: 1197 liveins: $vgpr0 1198 1199 ; SI-LABEL: name: test_load_local_s64_align1 1200 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 1201 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 1202 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 1203 ; SI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 1204 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 1205 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 1206 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 1207 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 1208 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 1209 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 1210 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 1211 ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 1212 ; SI: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C3]](s32) 1213 ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 1214 ; SI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 5 1215 ; SI: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 1216 ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 1217 ; SI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 6 1218 ; SI: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C5]](s32) 1219 ; SI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 1220 ; SI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 7 1221 ; SI: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C6]](s32) 1222 ; SI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 1223 ; SI: [[C7:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 1224 ; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) 1225 ; SI: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C7]] 1226 ; SI: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 1227 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[C8]](s32) 1228 ; SI: [[C9:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 1229 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 1230 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C9]] 1231 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[COPY1]](s32) 1232 ; SI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[SHL]](s32) 1233 ; SI: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[TRUNC1]] 1234 ; SI: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) 1235 ; SI: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C7]] 1236 ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[C8]](s32) 1237 ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 1238 ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C9]] 1239 ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[COPY3]](s32) 1240 ; SI: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[SHL1]](s32) 1241 ; SI: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[TRUNC3]] 1242 ; SI: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD4]](s32) 1243 ; SI: [[AND4:%[0-9]+]]:_(s16) = G_AND [[TRUNC4]], [[C7]] 1244 ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[C8]](s32) 1245 ; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 1246 ; SI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C9]] 1247 ; SI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[COPY5]](s32) 1248 ; SI: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[SHL2]](s32) 1249 ; SI: [[OR2:%[0-9]+]]:_(s16) = G_OR [[AND4]], [[TRUNC5]] 1250 ; SI: [[TRUNC6:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD6]](s32) 1251 ; SI: [[AND6:%[0-9]+]]:_(s16) = G_AND [[TRUNC6]], [[C7]] 1252 ; SI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 1253 ; SI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C9]] 1254 ; SI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C8]](s32) 1255 ; SI: [[TRUNC7:%[0-9]+]]:_(s16) = G_TRUNC [[SHL3]](s32) 1256 ; SI: [[OR3:%[0-9]+]]:_(s16) = G_OR [[AND6]], [[TRUNC7]] 1257 ; SI: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[OR]](s16) 1258 ; SI: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[OR1]](s16) 1259 ; SI: [[C10:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 1260 ; SI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[ZEXT1]], [[C10]](s32) 1261 ; SI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL4]] 1262 ; SI: [[ZEXT2:%[0-9]+]]:_(s32) = G_ZEXT [[OR2]](s16) 1263 ; SI: [[ZEXT3:%[0-9]+]]:_(s32) = G_ZEXT [[OR3]](s16) 1264 ; SI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[ZEXT3]], [[C10]](s32) 1265 ; SI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[ZEXT2]], [[SHL5]] 1266 ; SI: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR4]](s32), [[OR5]](s32) 1267 ; SI: $vgpr0_vgpr1 = COPY [[MV]](s64) 1268 ; CI-LABEL: name: test_load_local_s64_align1 1269 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 1270 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 1271 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 1272 ; CI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 1273 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 1274 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 1275 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 1276 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 1277 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 1278 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 1279 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 1280 ; CI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 1281 ; CI: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C3]](s32) 1282 ; CI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 1283 ; CI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 5 1284 ; CI: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 1285 ; CI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 1286 ; CI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 6 1287 ; CI: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C5]](s32) 1288 ; CI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 1289 ; CI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 7 1290 ; CI: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C6]](s32) 1291 ; CI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 1292 ; CI: [[C7:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 1293 ; CI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) 1294 ; CI: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C7]] 1295 ; CI: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 1296 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[C8]](s32) 1297 ; CI: [[C9:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 1298 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 1299 ; CI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C9]] 1300 ; CI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[COPY1]](s32) 1301 ; CI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[SHL]](s32) 1302 ; CI: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[TRUNC1]] 1303 ; CI: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) 1304 ; CI: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C7]] 1305 ; CI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[C8]](s32) 1306 ; CI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 1307 ; CI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C9]] 1308 ; CI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[COPY3]](s32) 1309 ; CI: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[SHL1]](s32) 1310 ; CI: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[TRUNC3]] 1311 ; CI: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD4]](s32) 1312 ; CI: [[AND4:%[0-9]+]]:_(s16) = G_AND [[TRUNC4]], [[C7]] 1313 ; CI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[C8]](s32) 1314 ; CI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 1315 ; CI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C9]] 1316 ; CI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[COPY5]](s32) 1317 ; CI: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[SHL2]](s32) 1318 ; CI: [[OR2:%[0-9]+]]:_(s16) = G_OR [[AND4]], [[TRUNC5]] 1319 ; CI: [[TRUNC6:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD6]](s32) 1320 ; CI: [[AND6:%[0-9]+]]:_(s16) = G_AND [[TRUNC6]], [[C7]] 1321 ; CI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 1322 ; CI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C9]] 1323 ; CI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C8]](s32) 1324 ; CI: [[TRUNC7:%[0-9]+]]:_(s16) = G_TRUNC [[SHL3]](s32) 1325 ; CI: [[OR3:%[0-9]+]]:_(s16) = G_OR [[AND6]], [[TRUNC7]] 1326 ; CI: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[OR]](s16) 1327 ; CI: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[OR1]](s16) 1328 ; CI: [[C10:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 1329 ; CI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[ZEXT1]], [[C10]](s32) 1330 ; CI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL4]] 1331 ; CI: [[ZEXT2:%[0-9]+]]:_(s32) = G_ZEXT [[OR2]](s16) 1332 ; CI: [[ZEXT3:%[0-9]+]]:_(s32) = G_ZEXT [[OR3]](s16) 1333 ; CI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[ZEXT3]], [[C10]](s32) 1334 ; CI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[ZEXT2]], [[SHL5]] 1335 ; CI: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR4]](s32), [[OR5]](s32) 1336 ; CI: $vgpr0_vgpr1 = COPY [[MV]](s64) 1337 ; CI-DS128-LABEL: name: test_load_local_s64_align1 1338 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 1339 ; CI-DS128: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 1340 ; CI-DS128: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 1341 ; CI-DS128: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 1342 ; CI-DS128: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 1343 ; CI-DS128: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 1344 ; CI-DS128: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 1345 ; CI-DS128: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 1346 ; CI-DS128: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 1347 ; CI-DS128: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 1348 ; CI-DS128: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 1349 ; CI-DS128: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 1350 ; CI-DS128: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C3]](s32) 1351 ; CI-DS128: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 1352 ; CI-DS128: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 5 1353 ; CI-DS128: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 1354 ; CI-DS128: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 1355 ; CI-DS128: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 6 1356 ; CI-DS128: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C5]](s32) 1357 ; CI-DS128: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 1358 ; CI-DS128: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 7 1359 ; CI-DS128: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C6]](s32) 1360 ; CI-DS128: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 1361 ; CI-DS128: [[C7:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 1362 ; CI-DS128: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) 1363 ; CI-DS128: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C7]] 1364 ; CI-DS128: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 1365 ; CI-DS128: [[COPY1:%[0-9]+]]:_(s32) = COPY [[C8]](s32) 1366 ; CI-DS128: [[C9:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 1367 ; CI-DS128: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 1368 ; CI-DS128: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C9]] 1369 ; CI-DS128: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[COPY1]](s32) 1370 ; CI-DS128: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[SHL]](s32) 1371 ; CI-DS128: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[TRUNC1]] 1372 ; CI-DS128: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) 1373 ; CI-DS128: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C7]] 1374 ; CI-DS128: [[COPY3:%[0-9]+]]:_(s32) = COPY [[C8]](s32) 1375 ; CI-DS128: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 1376 ; CI-DS128: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C9]] 1377 ; CI-DS128: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[COPY3]](s32) 1378 ; CI-DS128: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[SHL1]](s32) 1379 ; CI-DS128: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[TRUNC3]] 1380 ; CI-DS128: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD4]](s32) 1381 ; CI-DS128: [[AND4:%[0-9]+]]:_(s16) = G_AND [[TRUNC4]], [[C7]] 1382 ; CI-DS128: [[COPY5:%[0-9]+]]:_(s32) = COPY [[C8]](s32) 1383 ; CI-DS128: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 1384 ; CI-DS128: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C9]] 1385 ; CI-DS128: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[COPY5]](s32) 1386 ; CI-DS128: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[SHL2]](s32) 1387 ; CI-DS128: [[OR2:%[0-9]+]]:_(s16) = G_OR [[AND4]], [[TRUNC5]] 1388 ; CI-DS128: [[TRUNC6:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD6]](s32) 1389 ; CI-DS128: [[AND6:%[0-9]+]]:_(s16) = G_AND [[TRUNC6]], [[C7]] 1390 ; CI-DS128: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 1391 ; CI-DS128: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C9]] 1392 ; CI-DS128: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C8]](s32) 1393 ; CI-DS128: [[TRUNC7:%[0-9]+]]:_(s16) = G_TRUNC [[SHL3]](s32) 1394 ; CI-DS128: [[OR3:%[0-9]+]]:_(s16) = G_OR [[AND6]], [[TRUNC7]] 1395 ; CI-DS128: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[OR]](s16) 1396 ; CI-DS128: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[OR1]](s16) 1397 ; CI-DS128: [[C10:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 1398 ; CI-DS128: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[ZEXT1]], [[C10]](s32) 1399 ; CI-DS128: [[OR4:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL4]] 1400 ; CI-DS128: [[ZEXT2:%[0-9]+]]:_(s32) = G_ZEXT [[OR2]](s16) 1401 ; CI-DS128: [[ZEXT3:%[0-9]+]]:_(s32) = G_ZEXT [[OR3]](s16) 1402 ; CI-DS128: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[ZEXT3]], [[C10]](s32) 1403 ; CI-DS128: [[OR5:%[0-9]+]]:_(s32) = G_OR [[ZEXT2]], [[SHL5]] 1404 ; CI-DS128: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR4]](s32), [[OR5]](s32) 1405 ; CI-DS128: $vgpr0_vgpr1 = COPY [[MV]](s64) 1406 ; VI-LABEL: name: test_load_local_s64_align1 1407 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 1408 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 1409 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 1410 ; VI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 1411 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 1412 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 1413 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 1414 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 1415 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 1416 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 1417 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 1418 ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 1419 ; VI: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C3]](s32) 1420 ; VI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 1421 ; VI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 5 1422 ; VI: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 1423 ; VI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 1424 ; VI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 6 1425 ; VI: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C5]](s32) 1426 ; VI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 1427 ; VI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 7 1428 ; VI: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C6]](s32) 1429 ; VI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 1430 ; VI: [[C7:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 1431 ; VI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) 1432 ; VI: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C7]] 1433 ; VI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD1]](s32) 1434 ; VI: [[AND1:%[0-9]+]]:_(s16) = G_AND [[TRUNC1]], [[C7]] 1435 ; VI: [[C8:%[0-9]+]]:_(s16) = G_CONSTANT i16 8 1436 ; VI: [[SHL:%[0-9]+]]:_(s16) = G_SHL [[AND1]], [[C8]](s16) 1437 ; VI: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[SHL]] 1438 ; VI: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) 1439 ; VI: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C7]] 1440 ; VI: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD3]](s32) 1441 ; VI: [[AND3:%[0-9]+]]:_(s16) = G_AND [[TRUNC3]], [[C7]] 1442 ; VI: [[SHL1:%[0-9]+]]:_(s16) = G_SHL [[AND3]], [[C8]](s16) 1443 ; VI: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[SHL1]] 1444 ; VI: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD4]](s32) 1445 ; VI: [[AND4:%[0-9]+]]:_(s16) = G_AND [[TRUNC4]], [[C7]] 1446 ; VI: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD5]](s32) 1447 ; VI: [[AND5:%[0-9]+]]:_(s16) = G_AND [[TRUNC5]], [[C7]] 1448 ; VI: [[SHL2:%[0-9]+]]:_(s16) = G_SHL [[AND5]], [[C8]](s16) 1449 ; VI: [[OR2:%[0-9]+]]:_(s16) = G_OR [[AND4]], [[SHL2]] 1450 ; VI: [[TRUNC6:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD6]](s32) 1451 ; VI: [[AND6:%[0-9]+]]:_(s16) = G_AND [[TRUNC6]], [[C7]] 1452 ; VI: [[TRUNC7:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD7]](s32) 1453 ; VI: [[AND7:%[0-9]+]]:_(s16) = G_AND [[TRUNC7]], [[C7]] 1454 ; VI: [[SHL3:%[0-9]+]]:_(s16) = G_SHL [[AND7]], [[C8]](s16) 1455 ; VI: [[OR3:%[0-9]+]]:_(s16) = G_OR [[AND6]], [[SHL3]] 1456 ; VI: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[OR]](s16) 1457 ; VI: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[OR1]](s16) 1458 ; VI: [[C9:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 1459 ; VI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[ZEXT1]], [[C9]](s32) 1460 ; VI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL4]] 1461 ; VI: [[ZEXT2:%[0-9]+]]:_(s32) = G_ZEXT [[OR2]](s16) 1462 ; VI: [[ZEXT3:%[0-9]+]]:_(s32) = G_ZEXT [[OR3]](s16) 1463 ; VI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[ZEXT3]], [[C9]](s32) 1464 ; VI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[ZEXT2]], [[SHL5]] 1465 ; VI: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR4]](s32), [[OR5]](s32) 1466 ; VI: $vgpr0_vgpr1 = COPY [[MV]](s64) 1467 ; GFX9-LABEL: name: test_load_local_s64_align1 1468 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 1469 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 1470 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 1471 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 1472 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 1473 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 1474 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 1475 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 1476 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 1477 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 1478 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 1479 ; GFX9: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 1480 ; GFX9: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C3]](s32) 1481 ; GFX9: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 1482 ; GFX9: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 5 1483 ; GFX9: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 1484 ; GFX9: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 1485 ; GFX9: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 6 1486 ; GFX9: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C5]](s32) 1487 ; GFX9: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 1488 ; GFX9: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 7 1489 ; GFX9: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C6]](s32) 1490 ; GFX9: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 1491 ; GFX9: [[C7:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 1492 ; GFX9: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) 1493 ; GFX9: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C7]] 1494 ; GFX9: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD1]](s32) 1495 ; GFX9: [[AND1:%[0-9]+]]:_(s16) = G_AND [[TRUNC1]], [[C7]] 1496 ; GFX9: [[C8:%[0-9]+]]:_(s16) = G_CONSTANT i16 8 1497 ; GFX9: [[SHL:%[0-9]+]]:_(s16) = G_SHL [[AND1]], [[C8]](s16) 1498 ; GFX9: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[SHL]] 1499 ; GFX9: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) 1500 ; GFX9: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C7]] 1501 ; GFX9: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD3]](s32) 1502 ; GFX9: [[AND3:%[0-9]+]]:_(s16) = G_AND [[TRUNC3]], [[C7]] 1503 ; GFX9: [[SHL1:%[0-9]+]]:_(s16) = G_SHL [[AND3]], [[C8]](s16) 1504 ; GFX9: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[SHL1]] 1505 ; GFX9: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD4]](s32) 1506 ; GFX9: [[AND4:%[0-9]+]]:_(s16) = G_AND [[TRUNC4]], [[C7]] 1507 ; GFX9: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD5]](s32) 1508 ; GFX9: [[AND5:%[0-9]+]]:_(s16) = G_AND [[TRUNC5]], [[C7]] 1509 ; GFX9: [[SHL2:%[0-9]+]]:_(s16) = G_SHL [[AND5]], [[C8]](s16) 1510 ; GFX9: [[OR2:%[0-9]+]]:_(s16) = G_OR [[AND4]], [[SHL2]] 1511 ; GFX9: [[TRUNC6:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD6]](s32) 1512 ; GFX9: [[AND6:%[0-9]+]]:_(s16) = G_AND [[TRUNC6]], [[C7]] 1513 ; GFX9: [[TRUNC7:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD7]](s32) 1514 ; GFX9: [[AND7:%[0-9]+]]:_(s16) = G_AND [[TRUNC7]], [[C7]] 1515 ; GFX9: [[SHL3:%[0-9]+]]:_(s16) = G_SHL [[AND7]], [[C8]](s16) 1516 ; GFX9: [[OR3:%[0-9]+]]:_(s16) = G_OR [[AND6]], [[SHL3]] 1517 ; GFX9: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[OR]](s16) 1518 ; GFX9: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[OR1]](s16) 1519 ; GFX9: [[C9:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 1520 ; GFX9: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[ZEXT1]], [[C9]](s32) 1521 ; GFX9: [[OR4:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL4]] 1522 ; GFX9: [[ZEXT2:%[0-9]+]]:_(s32) = G_ZEXT [[OR2]](s16) 1523 ; GFX9: [[ZEXT3:%[0-9]+]]:_(s32) = G_ZEXT [[OR3]](s16) 1524 ; GFX9: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[ZEXT3]], [[C9]](s32) 1525 ; GFX9: [[OR5:%[0-9]+]]:_(s32) = G_OR [[ZEXT2]], [[SHL5]] 1526 ; GFX9: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR4]](s32), [[OR5]](s32) 1527 ; GFX9: $vgpr0_vgpr1 = COPY [[MV]](s64) 1528 ; GFX9-UNALIGNED-LABEL: name: test_load_local_s64_align1 1529 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 1530 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p3) :: (load 8, align 1, addrspace 3) 1531 ; GFX9-UNALIGNED: $vgpr0_vgpr1 = COPY [[LOAD]](s64) 1532 %0:_(p3) = COPY $vgpr0 1533 %1:_(s64) = G_LOAD %0 :: (load 8, align 1, addrspace 3) 1534 $vgpr0_vgpr1 = COPY %1 1535... 1536 1537--- 1538name: test_load_local_s96_align16 1539body: | 1540 bb.0: 1541 liveins: $vgpr0 1542 1543 ; SI-LABEL: name: test_load_local_s96_align16 1544 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 1545 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 1546 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 1547 ; SI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 1548 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 1549 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 1550 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 1551 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 1552 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 1553 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 1554 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 1555 ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 1556 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 1557 ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 1558 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 1559 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 1560 ; SI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 1561 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 1562 ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 1563 ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 1564 ; SI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 1565 ; SI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 1566 ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 1567 ; SI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 1568 ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 1569 ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 1570 ; SI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 1571 ; SI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 1572 ; SI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 1573 ; SI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 1574 ; SI: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C7]](s32) 1575 ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 1576 ; SI: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 1577 ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 1578 ; SI: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 1579 ; SI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 1580 ; SI: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 1581 ; SI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 1582 ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 1583 ; SI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 1584 ; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 1585 ; SI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 1586 ; SI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 1587 ; SI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 1588 ; SI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 1589 ; SI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 1590 ; SI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 1591 ; SI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 1592 ; SI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 1593 ; SI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 1594 ; SI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 1595 ; SI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 1596 ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32) 1597 ; SI: [[PTR_ADD7:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 1598 ; SI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p3) :: (load 1 + 8, addrspace 3) 1599 ; SI: [[PTR_ADD8:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 1600 ; SI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p3) :: (load 1 + 9, addrspace 3) 1601 ; SI: [[PTR_ADD9:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 1602 ; SI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p3) :: (load 1 + 10, addrspace 3) 1603 ; SI: [[PTR_ADD10:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 1604 ; SI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p3) :: (load 1 + 11, addrspace 3) 1605 ; SI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 1606 ; SI: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 1607 ; SI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 1608 ; SI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 1609 ; SI: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 1610 ; SI: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 1611 ; SI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 1612 ; SI: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 1613 ; SI: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 1614 ; SI: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 1615 ; SI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 1616 ; SI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 1617 ; SI: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 1618 ; SI: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 1619 ; SI: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF 1620 ; SI: [[INSERT:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[DEF]], [[BUILD_VECTOR]](<2 x s32>), 0 1621 ; SI: [[INSERT1:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT]], [[OR8]](s32), 64 1622 ; SI: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[INSERT1]](<3 x s32>) 1623 ; SI: $vgpr0_vgpr1_vgpr2 = COPY [[BITCAST]](s96) 1624 ; CI-LABEL: name: test_load_local_s96_align16 1625 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 1626 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 1627 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 1628 ; CI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 1629 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 1630 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 1631 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 1632 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 1633 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 1634 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 1635 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 1636 ; CI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 1637 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 1638 ; CI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 1639 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 1640 ; CI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 1641 ; CI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 1642 ; CI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 1643 ; CI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 1644 ; CI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 1645 ; CI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 1646 ; CI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 1647 ; CI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 1648 ; CI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 1649 ; CI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 1650 ; CI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 1651 ; CI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 1652 ; CI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 1653 ; CI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 1654 ; CI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 1655 ; CI: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C7]](s32) 1656 ; CI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 1657 ; CI: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 1658 ; CI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 1659 ; CI: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 1660 ; CI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 1661 ; CI: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 1662 ; CI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 1663 ; CI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 1664 ; CI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 1665 ; CI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 1666 ; CI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 1667 ; CI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 1668 ; CI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 1669 ; CI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 1670 ; CI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 1671 ; CI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 1672 ; CI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 1673 ; CI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 1674 ; CI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 1675 ; CI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 1676 ; CI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 1677 ; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32) 1678 ; CI: [[PTR_ADD7:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 1679 ; CI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p3) :: (load 1 + 8, addrspace 3) 1680 ; CI: [[PTR_ADD8:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 1681 ; CI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p3) :: (load 1 + 9, addrspace 3) 1682 ; CI: [[PTR_ADD9:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 1683 ; CI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p3) :: (load 1 + 10, addrspace 3) 1684 ; CI: [[PTR_ADD10:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 1685 ; CI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p3) :: (load 1 + 11, addrspace 3) 1686 ; CI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 1687 ; CI: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 1688 ; CI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 1689 ; CI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 1690 ; CI: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 1691 ; CI: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 1692 ; CI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 1693 ; CI: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 1694 ; CI: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 1695 ; CI: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 1696 ; CI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 1697 ; CI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 1698 ; CI: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 1699 ; CI: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 1700 ; CI: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF 1701 ; CI: [[INSERT:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[DEF]], [[BUILD_VECTOR]](<2 x s32>), 0 1702 ; CI: [[INSERT1:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT]], [[OR8]](s32), 64 1703 ; CI: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[INSERT1]](<3 x s32>) 1704 ; CI: $vgpr0_vgpr1_vgpr2 = COPY [[BITCAST]](s96) 1705 ; CI-DS128-LABEL: name: test_load_local_s96_align16 1706 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 1707 ; CI-DS128: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 1708 ; CI-DS128: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 1709 ; CI-DS128: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 1710 ; CI-DS128: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 1711 ; CI-DS128: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 1712 ; CI-DS128: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 1713 ; CI-DS128: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 1714 ; CI-DS128: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 1715 ; CI-DS128: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 1716 ; CI-DS128: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 1717 ; CI-DS128: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 1718 ; CI-DS128: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 1719 ; CI-DS128: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 1720 ; CI-DS128: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 1721 ; CI-DS128: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 1722 ; CI-DS128: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 1723 ; CI-DS128: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 1724 ; CI-DS128: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 1725 ; CI-DS128: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 1726 ; CI-DS128: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 1727 ; CI-DS128: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 1728 ; CI-DS128: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 1729 ; CI-DS128: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 1730 ; CI-DS128: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 1731 ; CI-DS128: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 1732 ; CI-DS128: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 1733 ; CI-DS128: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 1734 ; CI-DS128: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 1735 ; CI-DS128: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 1736 ; CI-DS128: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C7]](s32) 1737 ; CI-DS128: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 1738 ; CI-DS128: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 1739 ; CI-DS128: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 1740 ; CI-DS128: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 1741 ; CI-DS128: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 1742 ; CI-DS128: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 1743 ; CI-DS128: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 1744 ; CI-DS128: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 1745 ; CI-DS128: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 1746 ; CI-DS128: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 1747 ; CI-DS128: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 1748 ; CI-DS128: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 1749 ; CI-DS128: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 1750 ; CI-DS128: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 1751 ; CI-DS128: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 1752 ; CI-DS128: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 1753 ; CI-DS128: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 1754 ; CI-DS128: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 1755 ; CI-DS128: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 1756 ; CI-DS128: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 1757 ; CI-DS128: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 1758 ; CI-DS128: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32) 1759 ; CI-DS128: [[PTR_ADD7:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 1760 ; CI-DS128: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p3) :: (load 1 + 8, addrspace 3) 1761 ; CI-DS128: [[PTR_ADD8:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 1762 ; CI-DS128: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p3) :: (load 1 + 9, addrspace 3) 1763 ; CI-DS128: [[PTR_ADD9:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 1764 ; CI-DS128: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p3) :: (load 1 + 10, addrspace 3) 1765 ; CI-DS128: [[PTR_ADD10:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 1766 ; CI-DS128: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p3) :: (load 1 + 11, addrspace 3) 1767 ; CI-DS128: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 1768 ; CI-DS128: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 1769 ; CI-DS128: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 1770 ; CI-DS128: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 1771 ; CI-DS128: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 1772 ; CI-DS128: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 1773 ; CI-DS128: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 1774 ; CI-DS128: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 1775 ; CI-DS128: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 1776 ; CI-DS128: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 1777 ; CI-DS128: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 1778 ; CI-DS128: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 1779 ; CI-DS128: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 1780 ; CI-DS128: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 1781 ; CI-DS128: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF 1782 ; CI-DS128: [[INSERT:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[DEF]], [[BUILD_VECTOR]](<2 x s32>), 0 1783 ; CI-DS128: [[INSERT1:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT]], [[OR8]](s32), 64 1784 ; CI-DS128: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[INSERT1]](<3 x s32>) 1785 ; CI-DS128: $vgpr0_vgpr1_vgpr2 = COPY [[BITCAST]](s96) 1786 ; VI-LABEL: name: test_load_local_s96_align16 1787 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 1788 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 1789 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 1790 ; VI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 1791 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 1792 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 1793 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 1794 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 1795 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 1796 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 1797 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 1798 ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 1799 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 1800 ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 1801 ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 1802 ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 1803 ; VI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 1804 ; VI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 1805 ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 1806 ; VI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 1807 ; VI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 1808 ; VI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 1809 ; VI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 1810 ; VI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 1811 ; VI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 1812 ; VI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 1813 ; VI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 1814 ; VI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 1815 ; VI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 1816 ; VI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 1817 ; VI: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C7]](s32) 1818 ; VI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 1819 ; VI: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 1820 ; VI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 1821 ; VI: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 1822 ; VI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 1823 ; VI: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 1824 ; VI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 1825 ; VI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 1826 ; VI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 1827 ; VI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 1828 ; VI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 1829 ; VI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 1830 ; VI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 1831 ; VI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 1832 ; VI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 1833 ; VI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 1834 ; VI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 1835 ; VI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 1836 ; VI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 1837 ; VI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 1838 ; VI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 1839 ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32) 1840 ; VI: [[PTR_ADD7:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 1841 ; VI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p3) :: (load 1 + 8, addrspace 3) 1842 ; VI: [[PTR_ADD8:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 1843 ; VI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p3) :: (load 1 + 9, addrspace 3) 1844 ; VI: [[PTR_ADD9:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 1845 ; VI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p3) :: (load 1 + 10, addrspace 3) 1846 ; VI: [[PTR_ADD10:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 1847 ; VI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p3) :: (load 1 + 11, addrspace 3) 1848 ; VI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 1849 ; VI: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 1850 ; VI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 1851 ; VI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 1852 ; VI: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 1853 ; VI: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 1854 ; VI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 1855 ; VI: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 1856 ; VI: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 1857 ; VI: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 1858 ; VI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 1859 ; VI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 1860 ; VI: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 1861 ; VI: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 1862 ; VI: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF 1863 ; VI: [[INSERT:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[DEF]], [[BUILD_VECTOR]](<2 x s32>), 0 1864 ; VI: [[INSERT1:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT]], [[OR8]](s32), 64 1865 ; VI: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[INSERT1]](<3 x s32>) 1866 ; VI: $vgpr0_vgpr1_vgpr2 = COPY [[BITCAST]](s96) 1867 ; GFX9-LABEL: name: test_load_local_s96_align16 1868 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 1869 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 1870 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 1871 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 1872 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 1873 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 1874 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 1875 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 1876 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 1877 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 1878 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 1879 ; GFX9: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 1880 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 1881 ; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 1882 ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 1883 ; GFX9: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 1884 ; GFX9: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 1885 ; GFX9: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 1886 ; GFX9: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 1887 ; GFX9: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 1888 ; GFX9: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 1889 ; GFX9: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 1890 ; GFX9: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 1891 ; GFX9: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 1892 ; GFX9: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 1893 ; GFX9: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 1894 ; GFX9: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 1895 ; GFX9: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 1896 ; GFX9: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 1897 ; GFX9: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 1898 ; GFX9: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C7]](s32) 1899 ; GFX9: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 1900 ; GFX9: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 1901 ; GFX9: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 1902 ; GFX9: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 1903 ; GFX9: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 1904 ; GFX9: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 1905 ; GFX9: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 1906 ; GFX9: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 1907 ; GFX9: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 1908 ; GFX9: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 1909 ; GFX9: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 1910 ; GFX9: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 1911 ; GFX9: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 1912 ; GFX9: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 1913 ; GFX9: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 1914 ; GFX9: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 1915 ; GFX9: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 1916 ; GFX9: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 1917 ; GFX9: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 1918 ; GFX9: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 1919 ; GFX9: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 1920 ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32) 1921 ; GFX9: [[PTR_ADD7:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 1922 ; GFX9: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p3) :: (load 1 + 8, addrspace 3) 1923 ; GFX9: [[PTR_ADD8:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 1924 ; GFX9: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p3) :: (load 1 + 9, addrspace 3) 1925 ; GFX9: [[PTR_ADD9:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 1926 ; GFX9: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p3) :: (load 1 + 10, addrspace 3) 1927 ; GFX9: [[PTR_ADD10:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 1928 ; GFX9: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p3) :: (load 1 + 11, addrspace 3) 1929 ; GFX9: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 1930 ; GFX9: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 1931 ; GFX9: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 1932 ; GFX9: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 1933 ; GFX9: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 1934 ; GFX9: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 1935 ; GFX9: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 1936 ; GFX9: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 1937 ; GFX9: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 1938 ; GFX9: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 1939 ; GFX9: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 1940 ; GFX9: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 1941 ; GFX9: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 1942 ; GFX9: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 1943 ; GFX9: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF 1944 ; GFX9: [[INSERT:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[DEF]], [[BUILD_VECTOR]](<2 x s32>), 0 1945 ; GFX9: [[INSERT1:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT]], [[OR8]](s32), 64 1946 ; GFX9: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[INSERT1]](<3 x s32>) 1947 ; GFX9: $vgpr0_vgpr1_vgpr2 = COPY [[BITCAST]](s96) 1948 ; GFX9-UNALIGNED-LABEL: name: test_load_local_s96_align16 1949 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 1950 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(<3 x s32>) = G_LOAD [[COPY]](p3) :: (load 12, align 1, addrspace 3) 1951 ; GFX9-UNALIGNED: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[LOAD]](<3 x s32>) 1952 ; GFX9-UNALIGNED: $vgpr0_vgpr1_vgpr2 = COPY [[BITCAST]](s96) 1953 %0:_(p3) = COPY $vgpr0 1954 %1:_(s96) = G_LOAD %0 :: (load 12, align 1, addrspace 3) 1955 $vgpr0_vgpr1_vgpr2 = COPY %1 1956... 1957 1958--- 1959name: test_load_local_s96_align8 1960body: | 1961 bb.0: 1962 liveins: $vgpr0 1963 1964 ; SI-LABEL: name: test_load_local_s96_align8 1965 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 1966 ; SI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) 1967 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 1968 ; SI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 1969 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 4 + 8, align 8, addrspace 3) 1970 ; SI: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF 1971 ; SI: [[INSERT:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[DEF]], [[LOAD]](<2 x s32>), 0 1972 ; SI: [[INSERT1:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT]], [[LOAD1]](s32), 64 1973 ; SI: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[INSERT1]](<3 x s32>) 1974 ; SI: $vgpr0_vgpr1_vgpr2 = COPY [[BITCAST]](s96) 1975 ; CI-LABEL: name: test_load_local_s96_align8 1976 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 1977 ; CI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) 1978 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 1979 ; CI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 1980 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 4 + 8, align 8, addrspace 3) 1981 ; CI: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF 1982 ; CI: [[INSERT:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[DEF]], [[LOAD]](<2 x s32>), 0 1983 ; CI: [[INSERT1:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT]], [[LOAD1]](s32), 64 1984 ; CI: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[INSERT1]](<3 x s32>) 1985 ; CI: $vgpr0_vgpr1_vgpr2 = COPY [[BITCAST]](s96) 1986 ; CI-DS128-LABEL: name: test_load_local_s96_align8 1987 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 1988 ; CI-DS128: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) 1989 ; CI-DS128: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 1990 ; CI-DS128: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 1991 ; CI-DS128: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 4 + 8, align 8, addrspace 3) 1992 ; CI-DS128: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF 1993 ; CI-DS128: [[INSERT:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[DEF]], [[LOAD]](<2 x s32>), 0 1994 ; CI-DS128: [[INSERT1:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT]], [[LOAD1]](s32), 64 1995 ; CI-DS128: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[INSERT1]](<3 x s32>) 1996 ; CI-DS128: $vgpr0_vgpr1_vgpr2 = COPY [[BITCAST]](s96) 1997 ; VI-LABEL: name: test_load_local_s96_align8 1998 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 1999 ; VI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) 2000 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 2001 ; VI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 2002 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 4 + 8, align 8, addrspace 3) 2003 ; VI: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF 2004 ; VI: [[INSERT:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[DEF]], [[LOAD]](<2 x s32>), 0 2005 ; VI: [[INSERT1:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT]], [[LOAD1]](s32), 64 2006 ; VI: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[INSERT1]](<3 x s32>) 2007 ; VI: $vgpr0_vgpr1_vgpr2 = COPY [[BITCAST]](s96) 2008 ; GFX9-LABEL: name: test_load_local_s96_align8 2009 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 2010 ; GFX9: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) 2011 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 2012 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 2013 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 4 + 8, align 8, addrspace 3) 2014 ; GFX9: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF 2015 ; GFX9: [[INSERT:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[DEF]], [[LOAD]](<2 x s32>), 0 2016 ; GFX9: [[INSERT1:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT]], [[LOAD1]](s32), 64 2017 ; GFX9: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[INSERT1]](<3 x s32>) 2018 ; GFX9: $vgpr0_vgpr1_vgpr2 = COPY [[BITCAST]](s96) 2019 ; GFX9-UNALIGNED-LABEL: name: test_load_local_s96_align8 2020 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 2021 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(<3 x s32>) = G_LOAD [[COPY]](p3) :: (load 12, align 8, addrspace 3) 2022 ; GFX9-UNALIGNED: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[LOAD]](<3 x s32>) 2023 ; GFX9-UNALIGNED: $vgpr0_vgpr1_vgpr2 = COPY [[BITCAST]](s96) 2024 %0:_(p3) = COPY $vgpr0 2025 %1:_(s96) = G_LOAD %0 :: (load 12, align 8, addrspace 3) 2026 $vgpr0_vgpr1_vgpr2 = COPY %1 2027... 2028 2029--- 2030name: test_load_local_s96_align4 2031body: | 2032 bb.0: 2033 liveins: $vgpr0 2034 2035 ; SI-LABEL: name: test_load_local_s96_align4 2036 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 2037 ; SI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 8, align 4, addrspace 3) 2038 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 2039 ; SI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 2040 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 4 + 8, addrspace 3) 2041 ; SI: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF 2042 ; SI: [[INSERT:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[DEF]], [[LOAD]](<2 x s32>), 0 2043 ; SI: [[INSERT1:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT]], [[LOAD1]](s32), 64 2044 ; SI: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[INSERT1]](<3 x s32>) 2045 ; SI: $vgpr0_vgpr1_vgpr2 = COPY [[BITCAST]](s96) 2046 ; CI-LABEL: name: test_load_local_s96_align4 2047 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 2048 ; CI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 8, align 4, addrspace 3) 2049 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 2050 ; CI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 2051 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 4 + 8, addrspace 3) 2052 ; CI: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF 2053 ; CI: [[INSERT:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[DEF]], [[LOAD]](<2 x s32>), 0 2054 ; CI: [[INSERT1:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT]], [[LOAD1]](s32), 64 2055 ; CI: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[INSERT1]](<3 x s32>) 2056 ; CI: $vgpr0_vgpr1_vgpr2 = COPY [[BITCAST]](s96) 2057 ; CI-DS128-LABEL: name: test_load_local_s96_align4 2058 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 2059 ; CI-DS128: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 8, align 4, addrspace 3) 2060 ; CI-DS128: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 2061 ; CI-DS128: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 2062 ; CI-DS128: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 4 + 8, addrspace 3) 2063 ; CI-DS128: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF 2064 ; CI-DS128: [[INSERT:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[DEF]], [[LOAD]](<2 x s32>), 0 2065 ; CI-DS128: [[INSERT1:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT]], [[LOAD1]](s32), 64 2066 ; CI-DS128: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[INSERT1]](<3 x s32>) 2067 ; CI-DS128: $vgpr0_vgpr1_vgpr2 = COPY [[BITCAST]](s96) 2068 ; VI-LABEL: name: test_load_local_s96_align4 2069 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 2070 ; VI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 8, align 4, addrspace 3) 2071 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 2072 ; VI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 2073 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 4 + 8, addrspace 3) 2074 ; VI: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF 2075 ; VI: [[INSERT:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[DEF]], [[LOAD]](<2 x s32>), 0 2076 ; VI: [[INSERT1:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT]], [[LOAD1]](s32), 64 2077 ; VI: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[INSERT1]](<3 x s32>) 2078 ; VI: $vgpr0_vgpr1_vgpr2 = COPY [[BITCAST]](s96) 2079 ; GFX9-LABEL: name: test_load_local_s96_align4 2080 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 2081 ; GFX9: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 8, align 4, addrspace 3) 2082 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 2083 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 2084 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 4 + 8, addrspace 3) 2085 ; GFX9: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF 2086 ; GFX9: [[INSERT:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[DEF]], [[LOAD]](<2 x s32>), 0 2087 ; GFX9: [[INSERT1:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT]], [[LOAD1]](s32), 64 2088 ; GFX9: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[INSERT1]](<3 x s32>) 2089 ; GFX9: $vgpr0_vgpr1_vgpr2 = COPY [[BITCAST]](s96) 2090 ; GFX9-UNALIGNED-LABEL: name: test_load_local_s96_align4 2091 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 2092 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(<3 x s32>) = G_LOAD [[COPY]](p3) :: (load 12, align 4, addrspace 3) 2093 ; GFX9-UNALIGNED: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[LOAD]](<3 x s32>) 2094 ; GFX9-UNALIGNED: $vgpr0_vgpr1_vgpr2 = COPY [[BITCAST]](s96) 2095 %0:_(p3) = COPY $vgpr0 2096 %1:_(s96) = G_LOAD %0 :: (load 12, align 4, addrspace 3) 2097 $vgpr0_vgpr1_vgpr2 = COPY %1 2098... 2099 2100--- 2101name: test_load_local_s96_align2 2102body: | 2103 bb.0: 2104 liveins: $vgpr0 2105 2106 ; SI-LABEL: name: test_load_local_s96_align2 2107 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 2108 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 2109 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 2110 ; SI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 2111 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 2112 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 2113 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 2114 ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 2115 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 2116 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 2117 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 2118 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 2119 ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 2120 ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 2121 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C3]](s32) 2122 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 2 + 4, addrspace 3) 2123 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 2124 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 2 + 6, addrspace 3) 2125 ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 2126 ; SI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C1]] 2127 ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 2128 ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C1]] 2129 ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C2]](s32) 2130 ; SI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 2131 ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR]](s32), [[OR1]](s32) 2132 ; SI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 2133 ; SI: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 2134 ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 2 + 8, addrspace 3) 2135 ; SI: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 2136 ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 2 + 10, addrspace 3) 2137 ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 2138 ; SI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C1]] 2139 ; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 2140 ; SI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C1]] 2141 ; SI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C2]](s32) 2142 ; SI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL2]] 2143 ; SI: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF 2144 ; SI: [[INSERT:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[DEF]], [[BUILD_VECTOR]](<2 x s32>), 0 2145 ; SI: [[INSERT1:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT]], [[OR2]](s32), 64 2146 ; SI: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[INSERT1]](<3 x s32>) 2147 ; SI: $vgpr0_vgpr1_vgpr2 = COPY [[BITCAST]](s96) 2148 ; CI-LABEL: name: test_load_local_s96_align2 2149 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 2150 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 2151 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 2152 ; CI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 2153 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 2154 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 2155 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 2156 ; CI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 2157 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 2158 ; CI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 2159 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 2160 ; CI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 2161 ; CI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 2162 ; CI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 2163 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C3]](s32) 2164 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 2 + 4, addrspace 3) 2165 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 2166 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 2 + 6, addrspace 3) 2167 ; CI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 2168 ; CI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C1]] 2169 ; CI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 2170 ; CI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C1]] 2171 ; CI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C2]](s32) 2172 ; CI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 2173 ; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR]](s32), [[OR1]](s32) 2174 ; CI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 2175 ; CI: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 2176 ; CI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 2 + 8, addrspace 3) 2177 ; CI: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 2178 ; CI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 2 + 10, addrspace 3) 2179 ; CI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 2180 ; CI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C1]] 2181 ; CI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 2182 ; CI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C1]] 2183 ; CI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C2]](s32) 2184 ; CI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL2]] 2185 ; CI: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF 2186 ; CI: [[INSERT:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[DEF]], [[BUILD_VECTOR]](<2 x s32>), 0 2187 ; CI: [[INSERT1:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT]], [[OR2]](s32), 64 2188 ; CI: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[INSERT1]](<3 x s32>) 2189 ; CI: $vgpr0_vgpr1_vgpr2 = COPY [[BITCAST]](s96) 2190 ; CI-DS128-LABEL: name: test_load_local_s96_align2 2191 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 2192 ; CI-DS128: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 2193 ; CI-DS128: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 2194 ; CI-DS128: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 2195 ; CI-DS128: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 2196 ; CI-DS128: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 2197 ; CI-DS128: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 2198 ; CI-DS128: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 2199 ; CI-DS128: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 2200 ; CI-DS128: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 2201 ; CI-DS128: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 2202 ; CI-DS128: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 2203 ; CI-DS128: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 2204 ; CI-DS128: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 2205 ; CI-DS128: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C3]](s32) 2206 ; CI-DS128: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 2 + 4, addrspace 3) 2207 ; CI-DS128: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 2208 ; CI-DS128: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 2 + 6, addrspace 3) 2209 ; CI-DS128: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 2210 ; CI-DS128: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C1]] 2211 ; CI-DS128: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 2212 ; CI-DS128: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C1]] 2213 ; CI-DS128: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C2]](s32) 2214 ; CI-DS128: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 2215 ; CI-DS128: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR]](s32), [[OR1]](s32) 2216 ; CI-DS128: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 2217 ; CI-DS128: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 2218 ; CI-DS128: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 2 + 8, addrspace 3) 2219 ; CI-DS128: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 2220 ; CI-DS128: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 2 + 10, addrspace 3) 2221 ; CI-DS128: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 2222 ; CI-DS128: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C1]] 2223 ; CI-DS128: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 2224 ; CI-DS128: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C1]] 2225 ; CI-DS128: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C2]](s32) 2226 ; CI-DS128: [[OR2:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL2]] 2227 ; CI-DS128: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF 2228 ; CI-DS128: [[INSERT:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[DEF]], [[BUILD_VECTOR]](<2 x s32>), 0 2229 ; CI-DS128: [[INSERT1:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT]], [[OR2]](s32), 64 2230 ; CI-DS128: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[INSERT1]](<3 x s32>) 2231 ; CI-DS128: $vgpr0_vgpr1_vgpr2 = COPY [[BITCAST]](s96) 2232 ; VI-LABEL: name: test_load_local_s96_align2 2233 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 2234 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 2235 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 2236 ; VI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 2237 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 2238 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 2239 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 2240 ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 2241 ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 2242 ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 2243 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 2244 ; VI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 2245 ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 2246 ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 2247 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C3]](s32) 2248 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 2 + 4, addrspace 3) 2249 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 2250 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 2 + 6, addrspace 3) 2251 ; VI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 2252 ; VI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C1]] 2253 ; VI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 2254 ; VI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C1]] 2255 ; VI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C2]](s32) 2256 ; VI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 2257 ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR]](s32), [[OR1]](s32) 2258 ; VI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 2259 ; VI: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 2260 ; VI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 2 + 8, addrspace 3) 2261 ; VI: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 2262 ; VI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 2 + 10, addrspace 3) 2263 ; VI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 2264 ; VI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C1]] 2265 ; VI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 2266 ; VI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C1]] 2267 ; VI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C2]](s32) 2268 ; VI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL2]] 2269 ; VI: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF 2270 ; VI: [[INSERT:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[DEF]], [[BUILD_VECTOR]](<2 x s32>), 0 2271 ; VI: [[INSERT1:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT]], [[OR2]](s32), 64 2272 ; VI: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[INSERT1]](<3 x s32>) 2273 ; VI: $vgpr0_vgpr1_vgpr2 = COPY [[BITCAST]](s96) 2274 ; GFX9-LABEL: name: test_load_local_s96_align2 2275 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 2276 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 2277 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 2278 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 2279 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 2280 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 2281 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 2282 ; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 2283 ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 2284 ; GFX9: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 2285 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 2286 ; GFX9: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 2287 ; GFX9: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 2288 ; GFX9: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 2289 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C3]](s32) 2290 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 2 + 4, addrspace 3) 2291 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 2292 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 2 + 6, addrspace 3) 2293 ; GFX9: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 2294 ; GFX9: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C1]] 2295 ; GFX9: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 2296 ; GFX9: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C1]] 2297 ; GFX9: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C2]](s32) 2298 ; GFX9: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 2299 ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR]](s32), [[OR1]](s32) 2300 ; GFX9: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 2301 ; GFX9: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 2302 ; GFX9: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 2 + 8, addrspace 3) 2303 ; GFX9: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 2304 ; GFX9: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 2 + 10, addrspace 3) 2305 ; GFX9: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 2306 ; GFX9: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C1]] 2307 ; GFX9: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 2308 ; GFX9: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C1]] 2309 ; GFX9: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C2]](s32) 2310 ; GFX9: [[OR2:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL2]] 2311 ; GFX9: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF 2312 ; GFX9: [[INSERT:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[DEF]], [[BUILD_VECTOR]](<2 x s32>), 0 2313 ; GFX9: [[INSERT1:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT]], [[OR2]](s32), 64 2314 ; GFX9: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[INSERT1]](<3 x s32>) 2315 ; GFX9: $vgpr0_vgpr1_vgpr2 = COPY [[BITCAST]](s96) 2316 ; GFX9-UNALIGNED-LABEL: name: test_load_local_s96_align2 2317 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 2318 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(<3 x s32>) = G_LOAD [[COPY]](p3) :: (load 12, align 2, addrspace 3) 2319 ; GFX9-UNALIGNED: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[LOAD]](<3 x s32>) 2320 ; GFX9-UNALIGNED: $vgpr0_vgpr1_vgpr2 = COPY [[BITCAST]](s96) 2321 %0:_(p3) = COPY $vgpr0 2322 %1:_(s96) = G_LOAD %0 :: (load 12, align 2, addrspace 3) 2323 $vgpr0_vgpr1_vgpr2 = COPY %1 2324... 2325 2326--- 2327name: test_load_local_s96_align1 2328body: | 2329 bb.0: 2330 liveins: $vgpr0 2331 2332 ; SI-LABEL: name: test_load_local_s96_align1 2333 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 2334 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 2335 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 2336 ; SI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 2337 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 2338 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 2339 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 2340 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 2341 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 2342 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 2343 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 2344 ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 2345 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 2346 ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 2347 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 2348 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 2349 ; SI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 2350 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 2351 ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 2352 ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 2353 ; SI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 2354 ; SI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 2355 ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 2356 ; SI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 2357 ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 2358 ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 2359 ; SI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 2360 ; SI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 2361 ; SI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 2362 ; SI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 2363 ; SI: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C7]](s32) 2364 ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 2365 ; SI: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 2366 ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 2367 ; SI: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 2368 ; SI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 2369 ; SI: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 2370 ; SI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 2371 ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 2372 ; SI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 2373 ; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 2374 ; SI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 2375 ; SI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 2376 ; SI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 2377 ; SI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 2378 ; SI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 2379 ; SI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 2380 ; SI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 2381 ; SI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 2382 ; SI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 2383 ; SI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 2384 ; SI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 2385 ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32) 2386 ; SI: [[PTR_ADD7:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 2387 ; SI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p3) :: (load 1 + 8, addrspace 3) 2388 ; SI: [[PTR_ADD8:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 2389 ; SI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p3) :: (load 1 + 9, addrspace 3) 2390 ; SI: [[PTR_ADD9:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 2391 ; SI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p3) :: (load 1 + 10, addrspace 3) 2392 ; SI: [[PTR_ADD10:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 2393 ; SI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p3) :: (load 1 + 11, addrspace 3) 2394 ; SI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 2395 ; SI: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 2396 ; SI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 2397 ; SI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 2398 ; SI: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 2399 ; SI: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 2400 ; SI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 2401 ; SI: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 2402 ; SI: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 2403 ; SI: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 2404 ; SI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 2405 ; SI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 2406 ; SI: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 2407 ; SI: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 2408 ; SI: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF 2409 ; SI: [[INSERT:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[DEF]], [[BUILD_VECTOR]](<2 x s32>), 0 2410 ; SI: [[INSERT1:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT]], [[OR8]](s32), 64 2411 ; SI: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[INSERT1]](<3 x s32>) 2412 ; SI: $vgpr0_vgpr1_vgpr2 = COPY [[BITCAST]](s96) 2413 ; CI-LABEL: name: test_load_local_s96_align1 2414 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 2415 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 2416 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 2417 ; CI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 2418 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 2419 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 2420 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 2421 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 2422 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 2423 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 2424 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 2425 ; CI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 2426 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 2427 ; CI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 2428 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 2429 ; CI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 2430 ; CI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 2431 ; CI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 2432 ; CI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 2433 ; CI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 2434 ; CI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 2435 ; CI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 2436 ; CI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 2437 ; CI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 2438 ; CI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 2439 ; CI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 2440 ; CI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 2441 ; CI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 2442 ; CI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 2443 ; CI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 2444 ; CI: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C7]](s32) 2445 ; CI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 2446 ; CI: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 2447 ; CI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 2448 ; CI: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 2449 ; CI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 2450 ; CI: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 2451 ; CI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 2452 ; CI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 2453 ; CI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 2454 ; CI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 2455 ; CI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 2456 ; CI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 2457 ; CI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 2458 ; CI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 2459 ; CI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 2460 ; CI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 2461 ; CI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 2462 ; CI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 2463 ; CI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 2464 ; CI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 2465 ; CI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 2466 ; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32) 2467 ; CI: [[PTR_ADD7:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 2468 ; CI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p3) :: (load 1 + 8, addrspace 3) 2469 ; CI: [[PTR_ADD8:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 2470 ; CI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p3) :: (load 1 + 9, addrspace 3) 2471 ; CI: [[PTR_ADD9:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 2472 ; CI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p3) :: (load 1 + 10, addrspace 3) 2473 ; CI: [[PTR_ADD10:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 2474 ; CI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p3) :: (load 1 + 11, addrspace 3) 2475 ; CI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 2476 ; CI: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 2477 ; CI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 2478 ; CI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 2479 ; CI: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 2480 ; CI: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 2481 ; CI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 2482 ; CI: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 2483 ; CI: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 2484 ; CI: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 2485 ; CI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 2486 ; CI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 2487 ; CI: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 2488 ; CI: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 2489 ; CI: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF 2490 ; CI: [[INSERT:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[DEF]], [[BUILD_VECTOR]](<2 x s32>), 0 2491 ; CI: [[INSERT1:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT]], [[OR8]](s32), 64 2492 ; CI: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[INSERT1]](<3 x s32>) 2493 ; CI: $vgpr0_vgpr1_vgpr2 = COPY [[BITCAST]](s96) 2494 ; CI-DS128-LABEL: name: test_load_local_s96_align1 2495 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 2496 ; CI-DS128: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 2497 ; CI-DS128: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 2498 ; CI-DS128: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 2499 ; CI-DS128: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 2500 ; CI-DS128: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 2501 ; CI-DS128: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 2502 ; CI-DS128: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 2503 ; CI-DS128: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 2504 ; CI-DS128: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 2505 ; CI-DS128: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 2506 ; CI-DS128: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 2507 ; CI-DS128: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 2508 ; CI-DS128: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 2509 ; CI-DS128: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 2510 ; CI-DS128: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 2511 ; CI-DS128: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 2512 ; CI-DS128: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 2513 ; CI-DS128: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 2514 ; CI-DS128: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 2515 ; CI-DS128: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 2516 ; CI-DS128: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 2517 ; CI-DS128: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 2518 ; CI-DS128: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 2519 ; CI-DS128: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 2520 ; CI-DS128: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 2521 ; CI-DS128: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 2522 ; CI-DS128: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 2523 ; CI-DS128: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 2524 ; CI-DS128: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 2525 ; CI-DS128: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C7]](s32) 2526 ; CI-DS128: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 2527 ; CI-DS128: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 2528 ; CI-DS128: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 2529 ; CI-DS128: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 2530 ; CI-DS128: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 2531 ; CI-DS128: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 2532 ; CI-DS128: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 2533 ; CI-DS128: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 2534 ; CI-DS128: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 2535 ; CI-DS128: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 2536 ; CI-DS128: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 2537 ; CI-DS128: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 2538 ; CI-DS128: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 2539 ; CI-DS128: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 2540 ; CI-DS128: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 2541 ; CI-DS128: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 2542 ; CI-DS128: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 2543 ; CI-DS128: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 2544 ; CI-DS128: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 2545 ; CI-DS128: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 2546 ; CI-DS128: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 2547 ; CI-DS128: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32) 2548 ; CI-DS128: [[PTR_ADD7:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 2549 ; CI-DS128: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p3) :: (load 1 + 8, addrspace 3) 2550 ; CI-DS128: [[PTR_ADD8:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 2551 ; CI-DS128: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p3) :: (load 1 + 9, addrspace 3) 2552 ; CI-DS128: [[PTR_ADD9:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 2553 ; CI-DS128: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p3) :: (load 1 + 10, addrspace 3) 2554 ; CI-DS128: [[PTR_ADD10:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 2555 ; CI-DS128: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p3) :: (load 1 + 11, addrspace 3) 2556 ; CI-DS128: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 2557 ; CI-DS128: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 2558 ; CI-DS128: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 2559 ; CI-DS128: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 2560 ; CI-DS128: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 2561 ; CI-DS128: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 2562 ; CI-DS128: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 2563 ; CI-DS128: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 2564 ; CI-DS128: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 2565 ; CI-DS128: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 2566 ; CI-DS128: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 2567 ; CI-DS128: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 2568 ; CI-DS128: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 2569 ; CI-DS128: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 2570 ; CI-DS128: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF 2571 ; CI-DS128: [[INSERT:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[DEF]], [[BUILD_VECTOR]](<2 x s32>), 0 2572 ; CI-DS128: [[INSERT1:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT]], [[OR8]](s32), 64 2573 ; CI-DS128: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[INSERT1]](<3 x s32>) 2574 ; CI-DS128: $vgpr0_vgpr1_vgpr2 = COPY [[BITCAST]](s96) 2575 ; VI-LABEL: name: test_load_local_s96_align1 2576 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 2577 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 2578 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 2579 ; VI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 2580 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 2581 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 2582 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 2583 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 2584 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 2585 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 2586 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 2587 ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 2588 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 2589 ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 2590 ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 2591 ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 2592 ; VI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 2593 ; VI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 2594 ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 2595 ; VI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 2596 ; VI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 2597 ; VI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 2598 ; VI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 2599 ; VI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 2600 ; VI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 2601 ; VI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 2602 ; VI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 2603 ; VI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 2604 ; VI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 2605 ; VI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 2606 ; VI: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C7]](s32) 2607 ; VI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 2608 ; VI: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 2609 ; VI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 2610 ; VI: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 2611 ; VI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 2612 ; VI: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 2613 ; VI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 2614 ; VI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 2615 ; VI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 2616 ; VI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 2617 ; VI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 2618 ; VI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 2619 ; VI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 2620 ; VI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 2621 ; VI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 2622 ; VI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 2623 ; VI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 2624 ; VI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 2625 ; VI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 2626 ; VI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 2627 ; VI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 2628 ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32) 2629 ; VI: [[PTR_ADD7:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 2630 ; VI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p3) :: (load 1 + 8, addrspace 3) 2631 ; VI: [[PTR_ADD8:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 2632 ; VI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p3) :: (load 1 + 9, addrspace 3) 2633 ; VI: [[PTR_ADD9:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 2634 ; VI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p3) :: (load 1 + 10, addrspace 3) 2635 ; VI: [[PTR_ADD10:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 2636 ; VI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p3) :: (load 1 + 11, addrspace 3) 2637 ; VI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 2638 ; VI: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 2639 ; VI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 2640 ; VI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 2641 ; VI: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 2642 ; VI: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 2643 ; VI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 2644 ; VI: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 2645 ; VI: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 2646 ; VI: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 2647 ; VI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 2648 ; VI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 2649 ; VI: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 2650 ; VI: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 2651 ; VI: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF 2652 ; VI: [[INSERT:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[DEF]], [[BUILD_VECTOR]](<2 x s32>), 0 2653 ; VI: [[INSERT1:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT]], [[OR8]](s32), 64 2654 ; VI: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[INSERT1]](<3 x s32>) 2655 ; VI: $vgpr0_vgpr1_vgpr2 = COPY [[BITCAST]](s96) 2656 ; GFX9-LABEL: name: test_load_local_s96_align1 2657 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 2658 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 2659 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 2660 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 2661 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 2662 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 2663 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 2664 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 2665 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 2666 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 2667 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 2668 ; GFX9: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 2669 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 2670 ; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 2671 ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 2672 ; GFX9: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 2673 ; GFX9: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 2674 ; GFX9: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 2675 ; GFX9: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 2676 ; GFX9: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 2677 ; GFX9: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 2678 ; GFX9: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 2679 ; GFX9: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 2680 ; GFX9: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 2681 ; GFX9: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 2682 ; GFX9: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 2683 ; GFX9: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 2684 ; GFX9: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 2685 ; GFX9: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 2686 ; GFX9: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 2687 ; GFX9: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C7]](s32) 2688 ; GFX9: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 2689 ; GFX9: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 2690 ; GFX9: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 2691 ; GFX9: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 2692 ; GFX9: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 2693 ; GFX9: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 2694 ; GFX9: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 2695 ; GFX9: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 2696 ; GFX9: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 2697 ; GFX9: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 2698 ; GFX9: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 2699 ; GFX9: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 2700 ; GFX9: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 2701 ; GFX9: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 2702 ; GFX9: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 2703 ; GFX9: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 2704 ; GFX9: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 2705 ; GFX9: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 2706 ; GFX9: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 2707 ; GFX9: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 2708 ; GFX9: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 2709 ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32) 2710 ; GFX9: [[PTR_ADD7:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 2711 ; GFX9: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p3) :: (load 1 + 8, addrspace 3) 2712 ; GFX9: [[PTR_ADD8:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 2713 ; GFX9: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p3) :: (load 1 + 9, addrspace 3) 2714 ; GFX9: [[PTR_ADD9:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 2715 ; GFX9: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p3) :: (load 1 + 10, addrspace 3) 2716 ; GFX9: [[PTR_ADD10:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 2717 ; GFX9: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p3) :: (load 1 + 11, addrspace 3) 2718 ; GFX9: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 2719 ; GFX9: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 2720 ; GFX9: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 2721 ; GFX9: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 2722 ; GFX9: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 2723 ; GFX9: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 2724 ; GFX9: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 2725 ; GFX9: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 2726 ; GFX9: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 2727 ; GFX9: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 2728 ; GFX9: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 2729 ; GFX9: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 2730 ; GFX9: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 2731 ; GFX9: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 2732 ; GFX9: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF 2733 ; GFX9: [[INSERT:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[DEF]], [[BUILD_VECTOR]](<2 x s32>), 0 2734 ; GFX9: [[INSERT1:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT]], [[OR8]](s32), 64 2735 ; GFX9: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[INSERT1]](<3 x s32>) 2736 ; GFX9: $vgpr0_vgpr1_vgpr2 = COPY [[BITCAST]](s96) 2737 ; GFX9-UNALIGNED-LABEL: name: test_load_local_s96_align1 2738 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 2739 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(<3 x s32>) = G_LOAD [[COPY]](p3) :: (load 12, align 1, addrspace 3) 2740 ; GFX9-UNALIGNED: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[LOAD]](<3 x s32>) 2741 ; GFX9-UNALIGNED: $vgpr0_vgpr1_vgpr2 = COPY [[BITCAST]](s96) 2742 %0:_(p3) = COPY $vgpr0 2743 %1:_(s96) = G_LOAD %0 :: (load 12, align 1, addrspace 3) 2744 $vgpr0_vgpr1_vgpr2 = COPY %1 2745... 2746 2747--- 2748name: test_load_local_s128_align16 2749body: | 2750 bb.0: 2751 liveins: $vgpr0 2752 2753 ; SI-LABEL: name: test_load_local_s128_align16 2754 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 2755 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 2756 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 2757 ; SI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 2758 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 2759 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 2760 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 2761 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 2762 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 2763 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 2764 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 2765 ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 2766 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 2767 ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 2768 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 2769 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 2770 ; SI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 2771 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 2772 ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 2773 ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 2774 ; SI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 2775 ; SI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 2776 ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 2777 ; SI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 2778 ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 2779 ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 2780 ; SI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 2781 ; SI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 2782 ; SI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 2783 ; SI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 2784 ; SI: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C7]](s32) 2785 ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 2786 ; SI: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 2787 ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 2788 ; SI: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 2789 ; SI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 2790 ; SI: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 2791 ; SI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 2792 ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 2793 ; SI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 2794 ; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 2795 ; SI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 2796 ; SI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 2797 ; SI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 2798 ; SI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 2799 ; SI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 2800 ; SI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 2801 ; SI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 2802 ; SI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 2803 ; SI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 2804 ; SI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 2805 ; SI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 2806 ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32) 2807 ; SI: [[PTR_ADD7:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 2808 ; SI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p3) :: (load 1 + 8, addrspace 3) 2809 ; SI: [[PTR_ADD8:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 2810 ; SI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p3) :: (load 1 + 9, addrspace 3) 2811 ; SI: [[PTR_ADD9:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 2812 ; SI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p3) :: (load 1 + 10, addrspace 3) 2813 ; SI: [[PTR_ADD10:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 2814 ; SI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p3) :: (load 1 + 11, addrspace 3) 2815 ; SI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 2816 ; SI: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 2817 ; SI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 2818 ; SI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 2819 ; SI: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 2820 ; SI: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 2821 ; SI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 2822 ; SI: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 2823 ; SI: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 2824 ; SI: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 2825 ; SI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 2826 ; SI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 2827 ; SI: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 2828 ; SI: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 2829 ; SI: [[PTR_ADD11:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C7]](s32) 2830 ; SI: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p3) :: (load 1 + 12, addrspace 3) 2831 ; SI: [[PTR_ADD12:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C]](s32) 2832 ; SI: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p3) :: (load 1 + 13, addrspace 3) 2833 ; SI: [[PTR_ADD13:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C1]](s32) 2834 ; SI: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p3) :: (load 1 + 14, addrspace 3) 2835 ; SI: [[PTR_ADD14:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C2]](s32) 2836 ; SI: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p3) :: (load 1 + 15, addrspace 3) 2837 ; SI: [[COPY13:%[0-9]+]]:_(s32) = COPY [[LOAD12]](s32) 2838 ; SI: [[AND12:%[0-9]+]]:_(s32) = G_AND [[COPY13]], [[C3]] 2839 ; SI: [[COPY14:%[0-9]+]]:_(s32) = COPY [[LOAD13]](s32) 2840 ; SI: [[AND13:%[0-9]+]]:_(s32) = G_AND [[COPY14]], [[C3]] 2841 ; SI: [[SHL9:%[0-9]+]]:_(s32) = G_SHL [[AND13]], [[C4]](s32) 2842 ; SI: [[OR9:%[0-9]+]]:_(s32) = G_OR [[AND12]], [[SHL9]] 2843 ; SI: [[COPY15:%[0-9]+]]:_(s32) = COPY [[LOAD14]](s32) 2844 ; SI: [[AND14:%[0-9]+]]:_(s32) = G_AND [[COPY15]], [[C3]] 2845 ; SI: [[SHL10:%[0-9]+]]:_(s32) = G_SHL [[AND14]], [[C5]](s32) 2846 ; SI: [[OR10:%[0-9]+]]:_(s32) = G_OR [[OR9]], [[SHL10]] 2847 ; SI: [[COPY16:%[0-9]+]]:_(s32) = COPY [[LOAD15]](s32) 2848 ; SI: [[AND15:%[0-9]+]]:_(s32) = G_AND [[COPY16]], [[C3]] 2849 ; SI: [[SHL11:%[0-9]+]]:_(s32) = G_SHL [[AND15]], [[C6]](s32) 2850 ; SI: [[OR11:%[0-9]+]]:_(s32) = G_OR [[OR10]], [[SHL11]] 2851 ; SI: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR8]](s32), [[OR11]](s32) 2852 ; SI: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s32>) = G_CONCAT_VECTORS [[BUILD_VECTOR]](<2 x s32>), [[BUILD_VECTOR1]](<2 x s32>) 2853 ; SI: [[BITCAST:%[0-9]+]]:_(s128) = G_BITCAST [[CONCAT_VECTORS]](<4 x s32>) 2854 ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BITCAST]](s128) 2855 ; CI-LABEL: name: test_load_local_s128_align16 2856 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 2857 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 2858 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 2859 ; CI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 2860 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 2861 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 2862 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 2863 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 2864 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 2865 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 2866 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 2867 ; CI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 2868 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 2869 ; CI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 2870 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 2871 ; CI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 2872 ; CI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 2873 ; CI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 2874 ; CI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 2875 ; CI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 2876 ; CI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 2877 ; CI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 2878 ; CI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 2879 ; CI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 2880 ; CI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 2881 ; CI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 2882 ; CI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 2883 ; CI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 2884 ; CI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 2885 ; CI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 2886 ; CI: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C7]](s32) 2887 ; CI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 2888 ; CI: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 2889 ; CI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 2890 ; CI: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 2891 ; CI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 2892 ; CI: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 2893 ; CI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 2894 ; CI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 2895 ; CI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 2896 ; CI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 2897 ; CI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 2898 ; CI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 2899 ; CI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 2900 ; CI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 2901 ; CI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 2902 ; CI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 2903 ; CI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 2904 ; CI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 2905 ; CI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 2906 ; CI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 2907 ; CI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 2908 ; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32) 2909 ; CI: [[PTR_ADD7:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 2910 ; CI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p3) :: (load 1 + 8, addrspace 3) 2911 ; CI: [[PTR_ADD8:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 2912 ; CI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p3) :: (load 1 + 9, addrspace 3) 2913 ; CI: [[PTR_ADD9:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 2914 ; CI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p3) :: (load 1 + 10, addrspace 3) 2915 ; CI: [[PTR_ADD10:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 2916 ; CI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p3) :: (load 1 + 11, addrspace 3) 2917 ; CI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 2918 ; CI: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 2919 ; CI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 2920 ; CI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 2921 ; CI: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 2922 ; CI: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 2923 ; CI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 2924 ; CI: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 2925 ; CI: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 2926 ; CI: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 2927 ; CI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 2928 ; CI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 2929 ; CI: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 2930 ; CI: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 2931 ; CI: [[PTR_ADD11:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C7]](s32) 2932 ; CI: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p3) :: (load 1 + 12, addrspace 3) 2933 ; CI: [[PTR_ADD12:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C]](s32) 2934 ; CI: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p3) :: (load 1 + 13, addrspace 3) 2935 ; CI: [[PTR_ADD13:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C1]](s32) 2936 ; CI: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p3) :: (load 1 + 14, addrspace 3) 2937 ; CI: [[PTR_ADD14:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C2]](s32) 2938 ; CI: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p3) :: (load 1 + 15, addrspace 3) 2939 ; CI: [[COPY13:%[0-9]+]]:_(s32) = COPY [[LOAD12]](s32) 2940 ; CI: [[AND12:%[0-9]+]]:_(s32) = G_AND [[COPY13]], [[C3]] 2941 ; CI: [[COPY14:%[0-9]+]]:_(s32) = COPY [[LOAD13]](s32) 2942 ; CI: [[AND13:%[0-9]+]]:_(s32) = G_AND [[COPY14]], [[C3]] 2943 ; CI: [[SHL9:%[0-9]+]]:_(s32) = G_SHL [[AND13]], [[C4]](s32) 2944 ; CI: [[OR9:%[0-9]+]]:_(s32) = G_OR [[AND12]], [[SHL9]] 2945 ; CI: [[COPY15:%[0-9]+]]:_(s32) = COPY [[LOAD14]](s32) 2946 ; CI: [[AND14:%[0-9]+]]:_(s32) = G_AND [[COPY15]], [[C3]] 2947 ; CI: [[SHL10:%[0-9]+]]:_(s32) = G_SHL [[AND14]], [[C5]](s32) 2948 ; CI: [[OR10:%[0-9]+]]:_(s32) = G_OR [[OR9]], [[SHL10]] 2949 ; CI: [[COPY16:%[0-9]+]]:_(s32) = COPY [[LOAD15]](s32) 2950 ; CI: [[AND15:%[0-9]+]]:_(s32) = G_AND [[COPY16]], [[C3]] 2951 ; CI: [[SHL11:%[0-9]+]]:_(s32) = G_SHL [[AND15]], [[C6]](s32) 2952 ; CI: [[OR11:%[0-9]+]]:_(s32) = G_OR [[OR10]], [[SHL11]] 2953 ; CI: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR8]](s32), [[OR11]](s32) 2954 ; CI: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s32>) = G_CONCAT_VECTORS [[BUILD_VECTOR]](<2 x s32>), [[BUILD_VECTOR1]](<2 x s32>) 2955 ; CI: [[BITCAST:%[0-9]+]]:_(s128) = G_BITCAST [[CONCAT_VECTORS]](<4 x s32>) 2956 ; CI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BITCAST]](s128) 2957 ; CI-DS128-LABEL: name: test_load_local_s128_align16 2958 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 2959 ; CI-DS128: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 2960 ; CI-DS128: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 2961 ; CI-DS128: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 2962 ; CI-DS128: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 2963 ; CI-DS128: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 2964 ; CI-DS128: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 2965 ; CI-DS128: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 2966 ; CI-DS128: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 2967 ; CI-DS128: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 2968 ; CI-DS128: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 2969 ; CI-DS128: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 2970 ; CI-DS128: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 2971 ; CI-DS128: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 2972 ; CI-DS128: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 2973 ; CI-DS128: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 2974 ; CI-DS128: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 2975 ; CI-DS128: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 2976 ; CI-DS128: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 2977 ; CI-DS128: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 2978 ; CI-DS128: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 2979 ; CI-DS128: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 2980 ; CI-DS128: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 2981 ; CI-DS128: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 2982 ; CI-DS128: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 2983 ; CI-DS128: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 2984 ; CI-DS128: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 2985 ; CI-DS128: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 2986 ; CI-DS128: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 2987 ; CI-DS128: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 2988 ; CI-DS128: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C7]](s32) 2989 ; CI-DS128: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 2990 ; CI-DS128: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 2991 ; CI-DS128: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 2992 ; CI-DS128: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 2993 ; CI-DS128: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 2994 ; CI-DS128: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 2995 ; CI-DS128: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 2996 ; CI-DS128: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 2997 ; CI-DS128: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 2998 ; CI-DS128: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 2999 ; CI-DS128: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 3000 ; CI-DS128: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 3001 ; CI-DS128: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 3002 ; CI-DS128: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 3003 ; CI-DS128: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 3004 ; CI-DS128: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 3005 ; CI-DS128: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 3006 ; CI-DS128: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 3007 ; CI-DS128: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 3008 ; CI-DS128: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 3009 ; CI-DS128: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 3010 ; CI-DS128: [[PTR_ADD7:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 3011 ; CI-DS128: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p3) :: (load 1 + 8, addrspace 3) 3012 ; CI-DS128: [[PTR_ADD8:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 3013 ; CI-DS128: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p3) :: (load 1 + 9, addrspace 3) 3014 ; CI-DS128: [[PTR_ADD9:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 3015 ; CI-DS128: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p3) :: (load 1 + 10, addrspace 3) 3016 ; CI-DS128: [[PTR_ADD10:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 3017 ; CI-DS128: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p3) :: (load 1 + 11, addrspace 3) 3018 ; CI-DS128: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 3019 ; CI-DS128: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 3020 ; CI-DS128: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 3021 ; CI-DS128: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 3022 ; CI-DS128: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 3023 ; CI-DS128: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 3024 ; CI-DS128: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 3025 ; CI-DS128: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 3026 ; CI-DS128: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 3027 ; CI-DS128: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 3028 ; CI-DS128: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 3029 ; CI-DS128: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 3030 ; CI-DS128: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 3031 ; CI-DS128: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 3032 ; CI-DS128: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 3033 ; CI-DS128: [[PTR_ADD11:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C8]](s32) 3034 ; CI-DS128: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p3) :: (load 1 + 12, addrspace 3) 3035 ; CI-DS128: [[PTR_ADD12:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C]](s32) 3036 ; CI-DS128: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p3) :: (load 1 + 13, addrspace 3) 3037 ; CI-DS128: [[PTR_ADD13:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C1]](s32) 3038 ; CI-DS128: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p3) :: (load 1 + 14, addrspace 3) 3039 ; CI-DS128: [[PTR_ADD14:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C2]](s32) 3040 ; CI-DS128: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p3) :: (load 1 + 15, addrspace 3) 3041 ; CI-DS128: [[COPY13:%[0-9]+]]:_(s32) = COPY [[LOAD12]](s32) 3042 ; CI-DS128: [[AND12:%[0-9]+]]:_(s32) = G_AND [[COPY13]], [[C3]] 3043 ; CI-DS128: [[COPY14:%[0-9]+]]:_(s32) = COPY [[LOAD13]](s32) 3044 ; CI-DS128: [[AND13:%[0-9]+]]:_(s32) = G_AND [[COPY14]], [[C3]] 3045 ; CI-DS128: [[SHL9:%[0-9]+]]:_(s32) = G_SHL [[AND13]], [[C4]](s32) 3046 ; CI-DS128: [[OR9:%[0-9]+]]:_(s32) = G_OR [[AND12]], [[SHL9]] 3047 ; CI-DS128: [[COPY15:%[0-9]+]]:_(s32) = COPY [[LOAD14]](s32) 3048 ; CI-DS128: [[AND14:%[0-9]+]]:_(s32) = G_AND [[COPY15]], [[C3]] 3049 ; CI-DS128: [[SHL10:%[0-9]+]]:_(s32) = G_SHL [[AND14]], [[C5]](s32) 3050 ; CI-DS128: [[OR10:%[0-9]+]]:_(s32) = G_OR [[OR9]], [[SHL10]] 3051 ; CI-DS128: [[COPY16:%[0-9]+]]:_(s32) = COPY [[LOAD15]](s32) 3052 ; CI-DS128: [[AND15:%[0-9]+]]:_(s32) = G_AND [[COPY16]], [[C3]] 3053 ; CI-DS128: [[SHL11:%[0-9]+]]:_(s32) = G_SHL [[AND15]], [[C6]](s32) 3054 ; CI-DS128: [[OR11:%[0-9]+]]:_(s32) = G_OR [[OR10]], [[SHL11]] 3055 ; CI-DS128: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32), [[OR8]](s32), [[OR11]](s32) 3056 ; CI-DS128: [[BITCAST:%[0-9]+]]:_(s128) = G_BITCAST [[BUILD_VECTOR]](<4 x s32>) 3057 ; CI-DS128: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BITCAST]](s128) 3058 ; VI-LABEL: name: test_load_local_s128_align16 3059 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 3060 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 3061 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 3062 ; VI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 3063 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 3064 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 3065 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 3066 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 3067 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 3068 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 3069 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 3070 ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 3071 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 3072 ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 3073 ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 3074 ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 3075 ; VI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 3076 ; VI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 3077 ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 3078 ; VI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 3079 ; VI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 3080 ; VI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 3081 ; VI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 3082 ; VI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 3083 ; VI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 3084 ; VI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 3085 ; VI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 3086 ; VI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 3087 ; VI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 3088 ; VI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 3089 ; VI: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C7]](s32) 3090 ; VI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 3091 ; VI: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 3092 ; VI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 3093 ; VI: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 3094 ; VI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 3095 ; VI: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 3096 ; VI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 3097 ; VI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 3098 ; VI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 3099 ; VI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 3100 ; VI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 3101 ; VI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 3102 ; VI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 3103 ; VI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 3104 ; VI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 3105 ; VI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 3106 ; VI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 3107 ; VI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 3108 ; VI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 3109 ; VI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 3110 ; VI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 3111 ; VI: [[PTR_ADD7:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 3112 ; VI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p3) :: (load 1 + 8, addrspace 3) 3113 ; VI: [[PTR_ADD8:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 3114 ; VI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p3) :: (load 1 + 9, addrspace 3) 3115 ; VI: [[PTR_ADD9:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 3116 ; VI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p3) :: (load 1 + 10, addrspace 3) 3117 ; VI: [[PTR_ADD10:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 3118 ; VI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p3) :: (load 1 + 11, addrspace 3) 3119 ; VI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 3120 ; VI: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 3121 ; VI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 3122 ; VI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 3123 ; VI: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 3124 ; VI: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 3125 ; VI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 3126 ; VI: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 3127 ; VI: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 3128 ; VI: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 3129 ; VI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 3130 ; VI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 3131 ; VI: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 3132 ; VI: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 3133 ; VI: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 3134 ; VI: [[PTR_ADD11:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C8]](s32) 3135 ; VI: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p3) :: (load 1 + 12, addrspace 3) 3136 ; VI: [[PTR_ADD12:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C]](s32) 3137 ; VI: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p3) :: (load 1 + 13, addrspace 3) 3138 ; VI: [[PTR_ADD13:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C1]](s32) 3139 ; VI: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p3) :: (load 1 + 14, addrspace 3) 3140 ; VI: [[PTR_ADD14:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C2]](s32) 3141 ; VI: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p3) :: (load 1 + 15, addrspace 3) 3142 ; VI: [[COPY13:%[0-9]+]]:_(s32) = COPY [[LOAD12]](s32) 3143 ; VI: [[AND12:%[0-9]+]]:_(s32) = G_AND [[COPY13]], [[C3]] 3144 ; VI: [[COPY14:%[0-9]+]]:_(s32) = COPY [[LOAD13]](s32) 3145 ; VI: [[AND13:%[0-9]+]]:_(s32) = G_AND [[COPY14]], [[C3]] 3146 ; VI: [[SHL9:%[0-9]+]]:_(s32) = G_SHL [[AND13]], [[C4]](s32) 3147 ; VI: [[OR9:%[0-9]+]]:_(s32) = G_OR [[AND12]], [[SHL9]] 3148 ; VI: [[COPY15:%[0-9]+]]:_(s32) = COPY [[LOAD14]](s32) 3149 ; VI: [[AND14:%[0-9]+]]:_(s32) = G_AND [[COPY15]], [[C3]] 3150 ; VI: [[SHL10:%[0-9]+]]:_(s32) = G_SHL [[AND14]], [[C5]](s32) 3151 ; VI: [[OR10:%[0-9]+]]:_(s32) = G_OR [[OR9]], [[SHL10]] 3152 ; VI: [[COPY16:%[0-9]+]]:_(s32) = COPY [[LOAD15]](s32) 3153 ; VI: [[AND15:%[0-9]+]]:_(s32) = G_AND [[COPY16]], [[C3]] 3154 ; VI: [[SHL11:%[0-9]+]]:_(s32) = G_SHL [[AND15]], [[C6]](s32) 3155 ; VI: [[OR11:%[0-9]+]]:_(s32) = G_OR [[OR10]], [[SHL11]] 3156 ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32), [[OR8]](s32), [[OR11]](s32) 3157 ; VI: [[BITCAST:%[0-9]+]]:_(s128) = G_BITCAST [[BUILD_VECTOR]](<4 x s32>) 3158 ; VI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BITCAST]](s128) 3159 ; GFX9-LABEL: name: test_load_local_s128_align16 3160 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 3161 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 3162 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 3163 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 3164 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 3165 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 3166 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 3167 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 3168 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 3169 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 3170 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 3171 ; GFX9: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 3172 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 3173 ; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 3174 ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 3175 ; GFX9: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 3176 ; GFX9: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 3177 ; GFX9: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 3178 ; GFX9: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 3179 ; GFX9: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 3180 ; GFX9: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 3181 ; GFX9: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 3182 ; GFX9: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 3183 ; GFX9: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 3184 ; GFX9: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 3185 ; GFX9: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 3186 ; GFX9: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 3187 ; GFX9: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 3188 ; GFX9: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 3189 ; GFX9: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 3190 ; GFX9: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C7]](s32) 3191 ; GFX9: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 3192 ; GFX9: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 3193 ; GFX9: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 3194 ; GFX9: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 3195 ; GFX9: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 3196 ; GFX9: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 3197 ; GFX9: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 3198 ; GFX9: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 3199 ; GFX9: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 3200 ; GFX9: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 3201 ; GFX9: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 3202 ; GFX9: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 3203 ; GFX9: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 3204 ; GFX9: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 3205 ; GFX9: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 3206 ; GFX9: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 3207 ; GFX9: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 3208 ; GFX9: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 3209 ; GFX9: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 3210 ; GFX9: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 3211 ; GFX9: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 3212 ; GFX9: [[PTR_ADD7:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 3213 ; GFX9: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p3) :: (load 1 + 8, addrspace 3) 3214 ; GFX9: [[PTR_ADD8:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 3215 ; GFX9: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p3) :: (load 1 + 9, addrspace 3) 3216 ; GFX9: [[PTR_ADD9:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 3217 ; GFX9: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p3) :: (load 1 + 10, addrspace 3) 3218 ; GFX9: [[PTR_ADD10:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 3219 ; GFX9: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p3) :: (load 1 + 11, addrspace 3) 3220 ; GFX9: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 3221 ; GFX9: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 3222 ; GFX9: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 3223 ; GFX9: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 3224 ; GFX9: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 3225 ; GFX9: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 3226 ; GFX9: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 3227 ; GFX9: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 3228 ; GFX9: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 3229 ; GFX9: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 3230 ; GFX9: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 3231 ; GFX9: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 3232 ; GFX9: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 3233 ; GFX9: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 3234 ; GFX9: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 3235 ; GFX9: [[PTR_ADD11:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C8]](s32) 3236 ; GFX9: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p3) :: (load 1 + 12, addrspace 3) 3237 ; GFX9: [[PTR_ADD12:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C]](s32) 3238 ; GFX9: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p3) :: (load 1 + 13, addrspace 3) 3239 ; GFX9: [[PTR_ADD13:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C1]](s32) 3240 ; GFX9: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p3) :: (load 1 + 14, addrspace 3) 3241 ; GFX9: [[PTR_ADD14:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C2]](s32) 3242 ; GFX9: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p3) :: (load 1 + 15, addrspace 3) 3243 ; GFX9: [[COPY13:%[0-9]+]]:_(s32) = COPY [[LOAD12]](s32) 3244 ; GFX9: [[AND12:%[0-9]+]]:_(s32) = G_AND [[COPY13]], [[C3]] 3245 ; GFX9: [[COPY14:%[0-9]+]]:_(s32) = COPY [[LOAD13]](s32) 3246 ; GFX9: [[AND13:%[0-9]+]]:_(s32) = G_AND [[COPY14]], [[C3]] 3247 ; GFX9: [[SHL9:%[0-9]+]]:_(s32) = G_SHL [[AND13]], [[C4]](s32) 3248 ; GFX9: [[OR9:%[0-9]+]]:_(s32) = G_OR [[AND12]], [[SHL9]] 3249 ; GFX9: [[COPY15:%[0-9]+]]:_(s32) = COPY [[LOAD14]](s32) 3250 ; GFX9: [[AND14:%[0-9]+]]:_(s32) = G_AND [[COPY15]], [[C3]] 3251 ; GFX9: [[SHL10:%[0-9]+]]:_(s32) = G_SHL [[AND14]], [[C5]](s32) 3252 ; GFX9: [[OR10:%[0-9]+]]:_(s32) = G_OR [[OR9]], [[SHL10]] 3253 ; GFX9: [[COPY16:%[0-9]+]]:_(s32) = COPY [[LOAD15]](s32) 3254 ; GFX9: [[AND15:%[0-9]+]]:_(s32) = G_AND [[COPY16]], [[C3]] 3255 ; GFX9: [[SHL11:%[0-9]+]]:_(s32) = G_SHL [[AND15]], [[C6]](s32) 3256 ; GFX9: [[OR11:%[0-9]+]]:_(s32) = G_OR [[OR10]], [[SHL11]] 3257 ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32), [[OR8]](s32), [[OR11]](s32) 3258 ; GFX9: [[BITCAST:%[0-9]+]]:_(s128) = G_BITCAST [[BUILD_VECTOR]](<4 x s32>) 3259 ; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BITCAST]](s128) 3260 ; GFX9-UNALIGNED-LABEL: name: test_load_local_s128_align16 3261 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 3262 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[COPY]](p3) :: (load 16, align 1, addrspace 3) 3263 ; GFX9-UNALIGNED: [[BITCAST:%[0-9]+]]:_(s128) = G_BITCAST [[LOAD]](<4 x s32>) 3264 ; GFX9-UNALIGNED: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BITCAST]](s128) 3265 %0:_(p3) = COPY $vgpr0 3266 %1:_(s128) = G_LOAD %0 :: (load 16, align 1, addrspace 3) 3267 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1 3268... 3269 3270--- 3271name: test_load_local_s128_align8 3272body: | 3273 bb.0: 3274 liveins: $vgpr0 3275 3276 ; SI-LABEL: name: test_load_local_s128_align8 3277 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 3278 ; SI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) 3279 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 3280 ; SI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 3281 ; SI: [[LOAD1:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[PTR_ADD]](p3) :: (load 8 + 8, addrspace 3) 3282 ; SI: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s32>) = G_CONCAT_VECTORS [[LOAD]](<2 x s32>), [[LOAD1]](<2 x s32>) 3283 ; SI: [[BITCAST:%[0-9]+]]:_(s128) = G_BITCAST [[CONCAT_VECTORS]](<4 x s32>) 3284 ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BITCAST]](s128) 3285 ; CI-LABEL: name: test_load_local_s128_align8 3286 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 3287 ; CI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) 3288 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 3289 ; CI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 3290 ; CI: [[LOAD1:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[PTR_ADD]](p3) :: (load 8 + 8, addrspace 3) 3291 ; CI: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s32>) = G_CONCAT_VECTORS [[LOAD]](<2 x s32>), [[LOAD1]](<2 x s32>) 3292 ; CI: [[BITCAST:%[0-9]+]]:_(s128) = G_BITCAST [[CONCAT_VECTORS]](<4 x s32>) 3293 ; CI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BITCAST]](s128) 3294 ; CI-DS128-LABEL: name: test_load_local_s128_align8 3295 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 3296 ; CI-DS128: [[LOAD:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[COPY]](p3) :: (load 16, align 8, addrspace 3) 3297 ; CI-DS128: [[BITCAST:%[0-9]+]]:_(s128) = G_BITCAST [[LOAD]](<4 x s32>) 3298 ; CI-DS128: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BITCAST]](s128) 3299 ; VI-LABEL: name: test_load_local_s128_align8 3300 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 3301 ; VI: [[LOAD:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[COPY]](p3) :: (load 16, align 8, addrspace 3) 3302 ; VI: [[BITCAST:%[0-9]+]]:_(s128) = G_BITCAST [[LOAD]](<4 x s32>) 3303 ; VI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BITCAST]](s128) 3304 ; GFX9-LABEL: name: test_load_local_s128_align8 3305 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 3306 ; GFX9: [[LOAD:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[COPY]](p3) :: (load 16, align 8, addrspace 3) 3307 ; GFX9: [[BITCAST:%[0-9]+]]:_(s128) = G_BITCAST [[LOAD]](<4 x s32>) 3308 ; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BITCAST]](s128) 3309 ; GFX9-UNALIGNED-LABEL: name: test_load_local_s128_align8 3310 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 3311 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[COPY]](p3) :: (load 16, align 8, addrspace 3) 3312 ; GFX9-UNALIGNED: [[BITCAST:%[0-9]+]]:_(s128) = G_BITCAST [[LOAD]](<4 x s32>) 3313 ; GFX9-UNALIGNED: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BITCAST]](s128) 3314 %0:_(p3) = COPY $vgpr0 3315 %1:_(s128) = G_LOAD %0 :: (load 16, align 8, addrspace 3) 3316 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1 3317... 3318 3319--- 3320name: test_load_local_s128_align4 3321body: | 3322 bb.0: 3323 liveins: $vgpr0 3324 3325 ; SI-LABEL: name: test_load_local_s128_align4 3326 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 3327 ; SI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 8, align 4, addrspace 3) 3328 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 3329 ; SI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 3330 ; SI: [[LOAD1:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[PTR_ADD]](p3) :: (load 8 + 8, align 4, addrspace 3) 3331 ; SI: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s32>) = G_CONCAT_VECTORS [[LOAD]](<2 x s32>), [[LOAD1]](<2 x s32>) 3332 ; SI: [[BITCAST:%[0-9]+]]:_(s128) = G_BITCAST [[CONCAT_VECTORS]](<4 x s32>) 3333 ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BITCAST]](s128) 3334 ; CI-LABEL: name: test_load_local_s128_align4 3335 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 3336 ; CI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 8, align 4, addrspace 3) 3337 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 3338 ; CI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 3339 ; CI: [[LOAD1:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[PTR_ADD]](p3) :: (load 8 + 8, align 4, addrspace 3) 3340 ; CI: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s32>) = G_CONCAT_VECTORS [[LOAD]](<2 x s32>), [[LOAD1]](<2 x s32>) 3341 ; CI: [[BITCAST:%[0-9]+]]:_(s128) = G_BITCAST [[CONCAT_VECTORS]](<4 x s32>) 3342 ; CI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BITCAST]](s128) 3343 ; CI-DS128-LABEL: name: test_load_local_s128_align4 3344 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 3345 ; CI-DS128: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) 3346 ; CI-DS128: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 3347 ; CI-DS128: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 3348 ; CI-DS128: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 4 + 4, addrspace 3) 3349 ; CI-DS128: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 3350 ; CI-DS128: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 3351 ; CI-DS128: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 4 + 8, addrspace 3) 3352 ; CI-DS128: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 3353 ; CI-DS128: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 3354 ; CI-DS128: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 4 + 12, addrspace 3) 3355 ; CI-DS128: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32) 3356 ; CI-DS128: [[BITCAST:%[0-9]+]]:_(s128) = G_BITCAST [[BUILD_VECTOR]](<4 x s32>) 3357 ; CI-DS128: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BITCAST]](s128) 3358 ; VI-LABEL: name: test_load_local_s128_align4 3359 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 3360 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) 3361 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 3362 ; VI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 3363 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 4 + 4, addrspace 3) 3364 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 3365 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 3366 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 4 + 8, addrspace 3) 3367 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 3368 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 3369 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 4 + 12, addrspace 3) 3370 ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32) 3371 ; VI: [[BITCAST:%[0-9]+]]:_(s128) = G_BITCAST [[BUILD_VECTOR]](<4 x s32>) 3372 ; VI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BITCAST]](s128) 3373 ; GFX9-LABEL: name: test_load_local_s128_align4 3374 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 3375 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) 3376 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 3377 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 3378 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 4 + 4, addrspace 3) 3379 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 3380 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 3381 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 4 + 8, addrspace 3) 3382 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 3383 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 3384 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 4 + 12, addrspace 3) 3385 ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32) 3386 ; GFX9: [[BITCAST:%[0-9]+]]:_(s128) = G_BITCAST [[BUILD_VECTOR]](<4 x s32>) 3387 ; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BITCAST]](s128) 3388 ; GFX9-UNALIGNED-LABEL: name: test_load_local_s128_align4 3389 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 3390 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[COPY]](p3) :: (load 16, align 4, addrspace 3) 3391 ; GFX9-UNALIGNED: [[BITCAST:%[0-9]+]]:_(s128) = G_BITCAST [[LOAD]](<4 x s32>) 3392 ; GFX9-UNALIGNED: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BITCAST]](s128) 3393 %0:_(p3) = COPY $vgpr0 3394 %1:_(s128) = G_LOAD %0 :: (load 16, align 4, addrspace 3) 3395 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1 3396... 3397 3398--- 3399name: test_load_local_s128_align2 3400body: | 3401 bb.0: 3402 liveins: $vgpr0 3403 3404 ; SI-LABEL: name: test_load_local_s128_align2 3405 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 3406 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 3407 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 3408 ; SI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 3409 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 3410 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 3411 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 3412 ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 3413 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 3414 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 3415 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 3416 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 3417 ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 3418 ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 3419 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C3]](s32) 3420 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 2 + 4, addrspace 3) 3421 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 3422 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 2 + 6, addrspace 3) 3423 ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 3424 ; SI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C1]] 3425 ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 3426 ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C1]] 3427 ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C2]](s32) 3428 ; SI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 3429 ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR]](s32), [[OR1]](s32) 3430 ; SI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 3431 ; SI: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 3432 ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 2 + 8, addrspace 3) 3433 ; SI: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 3434 ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 2 + 10, addrspace 3) 3435 ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 3436 ; SI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C1]] 3437 ; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 3438 ; SI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C1]] 3439 ; SI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C2]](s32) 3440 ; SI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL2]] 3441 ; SI: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C3]](s32) 3442 ; SI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 2 + 12, addrspace 3) 3443 ; SI: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD5]], [[C]](s32) 3444 ; SI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 2 + 14, addrspace 3) 3445 ; SI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 3446 ; SI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C1]] 3447 ; SI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 3448 ; SI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C1]] 3449 ; SI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C2]](s32) 3450 ; SI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND6]], [[SHL3]] 3451 ; SI: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR3]](s32) 3452 ; SI: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s32>) = G_CONCAT_VECTORS [[BUILD_VECTOR]](<2 x s32>), [[BUILD_VECTOR1]](<2 x s32>) 3453 ; SI: [[BITCAST:%[0-9]+]]:_(s128) = G_BITCAST [[CONCAT_VECTORS]](<4 x s32>) 3454 ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BITCAST]](s128) 3455 ; CI-LABEL: name: test_load_local_s128_align2 3456 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 3457 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 3458 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 3459 ; CI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 3460 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 3461 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 3462 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 3463 ; CI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 3464 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 3465 ; CI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 3466 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 3467 ; CI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 3468 ; CI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 3469 ; CI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 3470 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C3]](s32) 3471 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 2 + 4, addrspace 3) 3472 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 3473 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 2 + 6, addrspace 3) 3474 ; CI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 3475 ; CI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C1]] 3476 ; CI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 3477 ; CI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C1]] 3478 ; CI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C2]](s32) 3479 ; CI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 3480 ; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR]](s32), [[OR1]](s32) 3481 ; CI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 3482 ; CI: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 3483 ; CI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 2 + 8, addrspace 3) 3484 ; CI: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 3485 ; CI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 2 + 10, addrspace 3) 3486 ; CI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 3487 ; CI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C1]] 3488 ; CI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 3489 ; CI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C1]] 3490 ; CI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C2]](s32) 3491 ; CI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL2]] 3492 ; CI: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C3]](s32) 3493 ; CI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 2 + 12, addrspace 3) 3494 ; CI: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD5]], [[C]](s32) 3495 ; CI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 2 + 14, addrspace 3) 3496 ; CI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 3497 ; CI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C1]] 3498 ; CI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 3499 ; CI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C1]] 3500 ; CI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C2]](s32) 3501 ; CI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND6]], [[SHL3]] 3502 ; CI: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR3]](s32) 3503 ; CI: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s32>) = G_CONCAT_VECTORS [[BUILD_VECTOR]](<2 x s32>), [[BUILD_VECTOR1]](<2 x s32>) 3504 ; CI: [[BITCAST:%[0-9]+]]:_(s128) = G_BITCAST [[CONCAT_VECTORS]](<4 x s32>) 3505 ; CI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BITCAST]](s128) 3506 ; CI-DS128-LABEL: name: test_load_local_s128_align2 3507 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 3508 ; CI-DS128: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 3509 ; CI-DS128: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 3510 ; CI-DS128: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 3511 ; CI-DS128: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 3512 ; CI-DS128: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 3513 ; CI-DS128: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 3514 ; CI-DS128: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 3515 ; CI-DS128: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 3516 ; CI-DS128: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 3517 ; CI-DS128: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 3518 ; CI-DS128: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 3519 ; CI-DS128: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 3520 ; CI-DS128: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 3521 ; CI-DS128: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C3]](s32) 3522 ; CI-DS128: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 2 + 4, addrspace 3) 3523 ; CI-DS128: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 3524 ; CI-DS128: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 2 + 6, addrspace 3) 3525 ; CI-DS128: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 3526 ; CI-DS128: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C1]] 3527 ; CI-DS128: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 3528 ; CI-DS128: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C1]] 3529 ; CI-DS128: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C2]](s32) 3530 ; CI-DS128: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 3531 ; CI-DS128: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR]](s32), [[OR1]](s32) 3532 ; CI-DS128: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 3533 ; CI-DS128: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 3534 ; CI-DS128: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 2 + 8, addrspace 3) 3535 ; CI-DS128: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 3536 ; CI-DS128: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 2 + 10, addrspace 3) 3537 ; CI-DS128: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 3538 ; CI-DS128: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C1]] 3539 ; CI-DS128: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 3540 ; CI-DS128: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C1]] 3541 ; CI-DS128: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C2]](s32) 3542 ; CI-DS128: [[OR2:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL2]] 3543 ; CI-DS128: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C3]](s32) 3544 ; CI-DS128: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 2 + 12, addrspace 3) 3545 ; CI-DS128: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD5]], [[C]](s32) 3546 ; CI-DS128: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 2 + 14, addrspace 3) 3547 ; CI-DS128: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 3548 ; CI-DS128: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C1]] 3549 ; CI-DS128: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 3550 ; CI-DS128: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C1]] 3551 ; CI-DS128: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C2]](s32) 3552 ; CI-DS128: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND6]], [[SHL3]] 3553 ; CI-DS128: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR3]](s32) 3554 ; CI-DS128: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s32>) = G_CONCAT_VECTORS [[BUILD_VECTOR]](<2 x s32>), [[BUILD_VECTOR1]](<2 x s32>) 3555 ; CI-DS128: [[BITCAST:%[0-9]+]]:_(s128) = G_BITCAST [[CONCAT_VECTORS]](<4 x s32>) 3556 ; CI-DS128: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BITCAST]](s128) 3557 ; VI-LABEL: name: test_load_local_s128_align2 3558 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 3559 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 3560 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 3561 ; VI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 3562 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 3563 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 3564 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 3565 ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 3566 ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 3567 ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 3568 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 3569 ; VI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 3570 ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 3571 ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 3572 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C3]](s32) 3573 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 2 + 4, addrspace 3) 3574 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 3575 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 2 + 6, addrspace 3) 3576 ; VI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 3577 ; VI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C1]] 3578 ; VI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 3579 ; VI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C1]] 3580 ; VI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C2]](s32) 3581 ; VI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 3582 ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR]](s32), [[OR1]](s32) 3583 ; VI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 3584 ; VI: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 3585 ; VI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 2 + 8, addrspace 3) 3586 ; VI: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 3587 ; VI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 2 + 10, addrspace 3) 3588 ; VI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 3589 ; VI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C1]] 3590 ; VI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 3591 ; VI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C1]] 3592 ; VI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C2]](s32) 3593 ; VI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL2]] 3594 ; VI: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C3]](s32) 3595 ; VI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 2 + 12, addrspace 3) 3596 ; VI: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD5]], [[C]](s32) 3597 ; VI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 2 + 14, addrspace 3) 3598 ; VI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 3599 ; VI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C1]] 3600 ; VI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 3601 ; VI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C1]] 3602 ; VI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C2]](s32) 3603 ; VI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND6]], [[SHL3]] 3604 ; VI: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR3]](s32) 3605 ; VI: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s32>) = G_CONCAT_VECTORS [[BUILD_VECTOR]](<2 x s32>), [[BUILD_VECTOR1]](<2 x s32>) 3606 ; VI: [[BITCAST:%[0-9]+]]:_(s128) = G_BITCAST [[CONCAT_VECTORS]](<4 x s32>) 3607 ; VI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BITCAST]](s128) 3608 ; GFX9-LABEL: name: test_load_local_s128_align2 3609 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 3610 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 3611 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 3612 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 3613 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 3614 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 3615 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 3616 ; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 3617 ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 3618 ; GFX9: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 3619 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 3620 ; GFX9: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 3621 ; GFX9: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 3622 ; GFX9: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 3623 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C3]](s32) 3624 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 2 + 4, addrspace 3) 3625 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 3626 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 2 + 6, addrspace 3) 3627 ; GFX9: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 3628 ; GFX9: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C1]] 3629 ; GFX9: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 3630 ; GFX9: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C1]] 3631 ; GFX9: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C2]](s32) 3632 ; GFX9: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 3633 ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR]](s32), [[OR1]](s32) 3634 ; GFX9: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 3635 ; GFX9: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 3636 ; GFX9: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 2 + 8, addrspace 3) 3637 ; GFX9: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 3638 ; GFX9: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 2 + 10, addrspace 3) 3639 ; GFX9: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 3640 ; GFX9: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C1]] 3641 ; GFX9: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 3642 ; GFX9: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C1]] 3643 ; GFX9: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C2]](s32) 3644 ; GFX9: [[OR2:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL2]] 3645 ; GFX9: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C3]](s32) 3646 ; GFX9: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 2 + 12, addrspace 3) 3647 ; GFX9: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD5]], [[C]](s32) 3648 ; GFX9: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 2 + 14, addrspace 3) 3649 ; GFX9: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 3650 ; GFX9: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C1]] 3651 ; GFX9: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 3652 ; GFX9: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C1]] 3653 ; GFX9: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C2]](s32) 3654 ; GFX9: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND6]], [[SHL3]] 3655 ; GFX9: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR3]](s32) 3656 ; GFX9: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s32>) = G_CONCAT_VECTORS [[BUILD_VECTOR]](<2 x s32>), [[BUILD_VECTOR1]](<2 x s32>) 3657 ; GFX9: [[BITCAST:%[0-9]+]]:_(s128) = G_BITCAST [[CONCAT_VECTORS]](<4 x s32>) 3658 ; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BITCAST]](s128) 3659 ; GFX9-UNALIGNED-LABEL: name: test_load_local_s128_align2 3660 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 3661 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[COPY]](p3) :: (load 16, align 2, addrspace 3) 3662 ; GFX9-UNALIGNED: [[BITCAST:%[0-9]+]]:_(s128) = G_BITCAST [[LOAD]](<4 x s32>) 3663 ; GFX9-UNALIGNED: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BITCAST]](s128) 3664 %0:_(p3) = COPY $vgpr0 3665 %1:_(s128) = G_LOAD %0 :: (load 16, align 2, addrspace 3) 3666 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1 3667... 3668 3669--- 3670name: test_load_local_s128_align1 3671body: | 3672 bb.0: 3673 liveins: $vgpr0 3674 3675 ; SI-LABEL: name: test_load_local_s128_align1 3676 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 3677 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 3678 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 3679 ; SI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 3680 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 3681 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 3682 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 3683 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 3684 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 3685 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 3686 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 3687 ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 3688 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 3689 ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 3690 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 3691 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 3692 ; SI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 3693 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 3694 ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 3695 ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 3696 ; SI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 3697 ; SI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 3698 ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 3699 ; SI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 3700 ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 3701 ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 3702 ; SI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 3703 ; SI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 3704 ; SI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 3705 ; SI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 3706 ; SI: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C7]](s32) 3707 ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 3708 ; SI: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 3709 ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 3710 ; SI: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 3711 ; SI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 3712 ; SI: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 3713 ; SI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 3714 ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 3715 ; SI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 3716 ; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 3717 ; SI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 3718 ; SI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 3719 ; SI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 3720 ; SI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 3721 ; SI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 3722 ; SI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 3723 ; SI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 3724 ; SI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 3725 ; SI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 3726 ; SI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 3727 ; SI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 3728 ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32) 3729 ; SI: [[PTR_ADD7:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 3730 ; SI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p3) :: (load 1 + 8, addrspace 3) 3731 ; SI: [[PTR_ADD8:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 3732 ; SI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p3) :: (load 1 + 9, addrspace 3) 3733 ; SI: [[PTR_ADD9:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 3734 ; SI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p3) :: (load 1 + 10, addrspace 3) 3735 ; SI: [[PTR_ADD10:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 3736 ; SI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p3) :: (load 1 + 11, addrspace 3) 3737 ; SI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 3738 ; SI: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 3739 ; SI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 3740 ; SI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 3741 ; SI: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 3742 ; SI: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 3743 ; SI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 3744 ; SI: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 3745 ; SI: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 3746 ; SI: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 3747 ; SI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 3748 ; SI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 3749 ; SI: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 3750 ; SI: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 3751 ; SI: [[PTR_ADD11:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C7]](s32) 3752 ; SI: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p3) :: (load 1 + 12, addrspace 3) 3753 ; SI: [[PTR_ADD12:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C]](s32) 3754 ; SI: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p3) :: (load 1 + 13, addrspace 3) 3755 ; SI: [[PTR_ADD13:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C1]](s32) 3756 ; SI: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p3) :: (load 1 + 14, addrspace 3) 3757 ; SI: [[PTR_ADD14:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C2]](s32) 3758 ; SI: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p3) :: (load 1 + 15, addrspace 3) 3759 ; SI: [[COPY13:%[0-9]+]]:_(s32) = COPY [[LOAD12]](s32) 3760 ; SI: [[AND12:%[0-9]+]]:_(s32) = G_AND [[COPY13]], [[C3]] 3761 ; SI: [[COPY14:%[0-9]+]]:_(s32) = COPY [[LOAD13]](s32) 3762 ; SI: [[AND13:%[0-9]+]]:_(s32) = G_AND [[COPY14]], [[C3]] 3763 ; SI: [[SHL9:%[0-9]+]]:_(s32) = G_SHL [[AND13]], [[C4]](s32) 3764 ; SI: [[OR9:%[0-9]+]]:_(s32) = G_OR [[AND12]], [[SHL9]] 3765 ; SI: [[COPY15:%[0-9]+]]:_(s32) = COPY [[LOAD14]](s32) 3766 ; SI: [[AND14:%[0-9]+]]:_(s32) = G_AND [[COPY15]], [[C3]] 3767 ; SI: [[SHL10:%[0-9]+]]:_(s32) = G_SHL [[AND14]], [[C5]](s32) 3768 ; SI: [[OR10:%[0-9]+]]:_(s32) = G_OR [[OR9]], [[SHL10]] 3769 ; SI: [[COPY16:%[0-9]+]]:_(s32) = COPY [[LOAD15]](s32) 3770 ; SI: [[AND15:%[0-9]+]]:_(s32) = G_AND [[COPY16]], [[C3]] 3771 ; SI: [[SHL11:%[0-9]+]]:_(s32) = G_SHL [[AND15]], [[C6]](s32) 3772 ; SI: [[OR11:%[0-9]+]]:_(s32) = G_OR [[OR10]], [[SHL11]] 3773 ; SI: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR8]](s32), [[OR11]](s32) 3774 ; SI: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s32>) = G_CONCAT_VECTORS [[BUILD_VECTOR]](<2 x s32>), [[BUILD_VECTOR1]](<2 x s32>) 3775 ; SI: [[BITCAST:%[0-9]+]]:_(s128) = G_BITCAST [[CONCAT_VECTORS]](<4 x s32>) 3776 ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BITCAST]](s128) 3777 ; CI-LABEL: name: test_load_local_s128_align1 3778 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 3779 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 3780 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 3781 ; CI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 3782 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 3783 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 3784 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 3785 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 3786 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 3787 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 3788 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 3789 ; CI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 3790 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 3791 ; CI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 3792 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 3793 ; CI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 3794 ; CI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 3795 ; CI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 3796 ; CI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 3797 ; CI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 3798 ; CI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 3799 ; CI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 3800 ; CI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 3801 ; CI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 3802 ; CI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 3803 ; CI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 3804 ; CI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 3805 ; CI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 3806 ; CI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 3807 ; CI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 3808 ; CI: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C7]](s32) 3809 ; CI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 3810 ; CI: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 3811 ; CI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 3812 ; CI: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 3813 ; CI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 3814 ; CI: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 3815 ; CI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 3816 ; CI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 3817 ; CI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 3818 ; CI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 3819 ; CI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 3820 ; CI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 3821 ; CI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 3822 ; CI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 3823 ; CI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 3824 ; CI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 3825 ; CI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 3826 ; CI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 3827 ; CI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 3828 ; CI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 3829 ; CI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 3830 ; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32) 3831 ; CI: [[PTR_ADD7:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 3832 ; CI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p3) :: (load 1 + 8, addrspace 3) 3833 ; CI: [[PTR_ADD8:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 3834 ; CI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p3) :: (load 1 + 9, addrspace 3) 3835 ; CI: [[PTR_ADD9:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 3836 ; CI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p3) :: (load 1 + 10, addrspace 3) 3837 ; CI: [[PTR_ADD10:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 3838 ; CI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p3) :: (load 1 + 11, addrspace 3) 3839 ; CI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 3840 ; CI: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 3841 ; CI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 3842 ; CI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 3843 ; CI: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 3844 ; CI: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 3845 ; CI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 3846 ; CI: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 3847 ; CI: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 3848 ; CI: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 3849 ; CI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 3850 ; CI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 3851 ; CI: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 3852 ; CI: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 3853 ; CI: [[PTR_ADD11:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C7]](s32) 3854 ; CI: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p3) :: (load 1 + 12, addrspace 3) 3855 ; CI: [[PTR_ADD12:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C]](s32) 3856 ; CI: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p3) :: (load 1 + 13, addrspace 3) 3857 ; CI: [[PTR_ADD13:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C1]](s32) 3858 ; CI: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p3) :: (load 1 + 14, addrspace 3) 3859 ; CI: [[PTR_ADD14:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C2]](s32) 3860 ; CI: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p3) :: (load 1 + 15, addrspace 3) 3861 ; CI: [[COPY13:%[0-9]+]]:_(s32) = COPY [[LOAD12]](s32) 3862 ; CI: [[AND12:%[0-9]+]]:_(s32) = G_AND [[COPY13]], [[C3]] 3863 ; CI: [[COPY14:%[0-9]+]]:_(s32) = COPY [[LOAD13]](s32) 3864 ; CI: [[AND13:%[0-9]+]]:_(s32) = G_AND [[COPY14]], [[C3]] 3865 ; CI: [[SHL9:%[0-9]+]]:_(s32) = G_SHL [[AND13]], [[C4]](s32) 3866 ; CI: [[OR9:%[0-9]+]]:_(s32) = G_OR [[AND12]], [[SHL9]] 3867 ; CI: [[COPY15:%[0-9]+]]:_(s32) = COPY [[LOAD14]](s32) 3868 ; CI: [[AND14:%[0-9]+]]:_(s32) = G_AND [[COPY15]], [[C3]] 3869 ; CI: [[SHL10:%[0-9]+]]:_(s32) = G_SHL [[AND14]], [[C5]](s32) 3870 ; CI: [[OR10:%[0-9]+]]:_(s32) = G_OR [[OR9]], [[SHL10]] 3871 ; CI: [[COPY16:%[0-9]+]]:_(s32) = COPY [[LOAD15]](s32) 3872 ; CI: [[AND15:%[0-9]+]]:_(s32) = G_AND [[COPY16]], [[C3]] 3873 ; CI: [[SHL11:%[0-9]+]]:_(s32) = G_SHL [[AND15]], [[C6]](s32) 3874 ; CI: [[OR11:%[0-9]+]]:_(s32) = G_OR [[OR10]], [[SHL11]] 3875 ; CI: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR8]](s32), [[OR11]](s32) 3876 ; CI: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s32>) = G_CONCAT_VECTORS [[BUILD_VECTOR]](<2 x s32>), [[BUILD_VECTOR1]](<2 x s32>) 3877 ; CI: [[BITCAST:%[0-9]+]]:_(s128) = G_BITCAST [[CONCAT_VECTORS]](<4 x s32>) 3878 ; CI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BITCAST]](s128) 3879 ; CI-DS128-LABEL: name: test_load_local_s128_align1 3880 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 3881 ; CI-DS128: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 3882 ; CI-DS128: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 3883 ; CI-DS128: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 3884 ; CI-DS128: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 3885 ; CI-DS128: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 3886 ; CI-DS128: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 3887 ; CI-DS128: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 3888 ; CI-DS128: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 3889 ; CI-DS128: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 3890 ; CI-DS128: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 3891 ; CI-DS128: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 3892 ; CI-DS128: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 3893 ; CI-DS128: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 3894 ; CI-DS128: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 3895 ; CI-DS128: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 3896 ; CI-DS128: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 3897 ; CI-DS128: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 3898 ; CI-DS128: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 3899 ; CI-DS128: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 3900 ; CI-DS128: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 3901 ; CI-DS128: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 3902 ; CI-DS128: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 3903 ; CI-DS128: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 3904 ; CI-DS128: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 3905 ; CI-DS128: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 3906 ; CI-DS128: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 3907 ; CI-DS128: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 3908 ; CI-DS128: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 3909 ; CI-DS128: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 3910 ; CI-DS128: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C7]](s32) 3911 ; CI-DS128: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 3912 ; CI-DS128: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 3913 ; CI-DS128: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 3914 ; CI-DS128: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 3915 ; CI-DS128: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 3916 ; CI-DS128: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 3917 ; CI-DS128: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 3918 ; CI-DS128: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 3919 ; CI-DS128: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 3920 ; CI-DS128: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 3921 ; CI-DS128: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 3922 ; CI-DS128: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 3923 ; CI-DS128: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 3924 ; CI-DS128: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 3925 ; CI-DS128: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 3926 ; CI-DS128: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 3927 ; CI-DS128: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 3928 ; CI-DS128: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 3929 ; CI-DS128: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 3930 ; CI-DS128: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 3931 ; CI-DS128: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 3932 ; CI-DS128: [[PTR_ADD7:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 3933 ; CI-DS128: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p3) :: (load 1 + 8, addrspace 3) 3934 ; CI-DS128: [[PTR_ADD8:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 3935 ; CI-DS128: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p3) :: (load 1 + 9, addrspace 3) 3936 ; CI-DS128: [[PTR_ADD9:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 3937 ; CI-DS128: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p3) :: (load 1 + 10, addrspace 3) 3938 ; CI-DS128: [[PTR_ADD10:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 3939 ; CI-DS128: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p3) :: (load 1 + 11, addrspace 3) 3940 ; CI-DS128: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 3941 ; CI-DS128: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 3942 ; CI-DS128: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 3943 ; CI-DS128: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 3944 ; CI-DS128: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 3945 ; CI-DS128: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 3946 ; CI-DS128: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 3947 ; CI-DS128: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 3948 ; CI-DS128: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 3949 ; CI-DS128: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 3950 ; CI-DS128: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 3951 ; CI-DS128: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 3952 ; CI-DS128: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 3953 ; CI-DS128: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 3954 ; CI-DS128: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 3955 ; CI-DS128: [[PTR_ADD11:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C8]](s32) 3956 ; CI-DS128: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p3) :: (load 1 + 12, addrspace 3) 3957 ; CI-DS128: [[PTR_ADD12:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C]](s32) 3958 ; CI-DS128: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p3) :: (load 1 + 13, addrspace 3) 3959 ; CI-DS128: [[PTR_ADD13:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C1]](s32) 3960 ; CI-DS128: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p3) :: (load 1 + 14, addrspace 3) 3961 ; CI-DS128: [[PTR_ADD14:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C2]](s32) 3962 ; CI-DS128: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p3) :: (load 1 + 15, addrspace 3) 3963 ; CI-DS128: [[COPY13:%[0-9]+]]:_(s32) = COPY [[LOAD12]](s32) 3964 ; CI-DS128: [[AND12:%[0-9]+]]:_(s32) = G_AND [[COPY13]], [[C3]] 3965 ; CI-DS128: [[COPY14:%[0-9]+]]:_(s32) = COPY [[LOAD13]](s32) 3966 ; CI-DS128: [[AND13:%[0-9]+]]:_(s32) = G_AND [[COPY14]], [[C3]] 3967 ; CI-DS128: [[SHL9:%[0-9]+]]:_(s32) = G_SHL [[AND13]], [[C4]](s32) 3968 ; CI-DS128: [[OR9:%[0-9]+]]:_(s32) = G_OR [[AND12]], [[SHL9]] 3969 ; CI-DS128: [[COPY15:%[0-9]+]]:_(s32) = COPY [[LOAD14]](s32) 3970 ; CI-DS128: [[AND14:%[0-9]+]]:_(s32) = G_AND [[COPY15]], [[C3]] 3971 ; CI-DS128: [[SHL10:%[0-9]+]]:_(s32) = G_SHL [[AND14]], [[C5]](s32) 3972 ; CI-DS128: [[OR10:%[0-9]+]]:_(s32) = G_OR [[OR9]], [[SHL10]] 3973 ; CI-DS128: [[COPY16:%[0-9]+]]:_(s32) = COPY [[LOAD15]](s32) 3974 ; CI-DS128: [[AND15:%[0-9]+]]:_(s32) = G_AND [[COPY16]], [[C3]] 3975 ; CI-DS128: [[SHL11:%[0-9]+]]:_(s32) = G_SHL [[AND15]], [[C6]](s32) 3976 ; CI-DS128: [[OR11:%[0-9]+]]:_(s32) = G_OR [[OR10]], [[SHL11]] 3977 ; CI-DS128: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32), [[OR8]](s32), [[OR11]](s32) 3978 ; CI-DS128: [[BITCAST:%[0-9]+]]:_(s128) = G_BITCAST [[BUILD_VECTOR]](<4 x s32>) 3979 ; CI-DS128: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BITCAST]](s128) 3980 ; VI-LABEL: name: test_load_local_s128_align1 3981 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 3982 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 3983 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 3984 ; VI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 3985 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 3986 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 3987 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 3988 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 3989 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 3990 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 3991 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 3992 ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 3993 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 3994 ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 3995 ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 3996 ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 3997 ; VI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 3998 ; VI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 3999 ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 4000 ; VI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 4001 ; VI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 4002 ; VI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 4003 ; VI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 4004 ; VI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 4005 ; VI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 4006 ; VI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 4007 ; VI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 4008 ; VI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 4009 ; VI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 4010 ; VI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 4011 ; VI: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C7]](s32) 4012 ; VI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 4013 ; VI: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 4014 ; VI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 4015 ; VI: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 4016 ; VI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 4017 ; VI: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 4018 ; VI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 4019 ; VI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 4020 ; VI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 4021 ; VI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 4022 ; VI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 4023 ; VI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 4024 ; VI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 4025 ; VI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 4026 ; VI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 4027 ; VI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 4028 ; VI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 4029 ; VI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 4030 ; VI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 4031 ; VI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 4032 ; VI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 4033 ; VI: [[PTR_ADD7:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 4034 ; VI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p3) :: (load 1 + 8, addrspace 3) 4035 ; VI: [[PTR_ADD8:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 4036 ; VI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p3) :: (load 1 + 9, addrspace 3) 4037 ; VI: [[PTR_ADD9:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 4038 ; VI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p3) :: (load 1 + 10, addrspace 3) 4039 ; VI: [[PTR_ADD10:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 4040 ; VI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p3) :: (load 1 + 11, addrspace 3) 4041 ; VI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 4042 ; VI: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 4043 ; VI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 4044 ; VI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 4045 ; VI: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 4046 ; VI: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 4047 ; VI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 4048 ; VI: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 4049 ; VI: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 4050 ; VI: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 4051 ; VI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 4052 ; VI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 4053 ; VI: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 4054 ; VI: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 4055 ; VI: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 4056 ; VI: [[PTR_ADD11:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C8]](s32) 4057 ; VI: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p3) :: (load 1 + 12, addrspace 3) 4058 ; VI: [[PTR_ADD12:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C]](s32) 4059 ; VI: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p3) :: (load 1 + 13, addrspace 3) 4060 ; VI: [[PTR_ADD13:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C1]](s32) 4061 ; VI: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p3) :: (load 1 + 14, addrspace 3) 4062 ; VI: [[PTR_ADD14:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C2]](s32) 4063 ; VI: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p3) :: (load 1 + 15, addrspace 3) 4064 ; VI: [[COPY13:%[0-9]+]]:_(s32) = COPY [[LOAD12]](s32) 4065 ; VI: [[AND12:%[0-9]+]]:_(s32) = G_AND [[COPY13]], [[C3]] 4066 ; VI: [[COPY14:%[0-9]+]]:_(s32) = COPY [[LOAD13]](s32) 4067 ; VI: [[AND13:%[0-9]+]]:_(s32) = G_AND [[COPY14]], [[C3]] 4068 ; VI: [[SHL9:%[0-9]+]]:_(s32) = G_SHL [[AND13]], [[C4]](s32) 4069 ; VI: [[OR9:%[0-9]+]]:_(s32) = G_OR [[AND12]], [[SHL9]] 4070 ; VI: [[COPY15:%[0-9]+]]:_(s32) = COPY [[LOAD14]](s32) 4071 ; VI: [[AND14:%[0-9]+]]:_(s32) = G_AND [[COPY15]], [[C3]] 4072 ; VI: [[SHL10:%[0-9]+]]:_(s32) = G_SHL [[AND14]], [[C5]](s32) 4073 ; VI: [[OR10:%[0-9]+]]:_(s32) = G_OR [[OR9]], [[SHL10]] 4074 ; VI: [[COPY16:%[0-9]+]]:_(s32) = COPY [[LOAD15]](s32) 4075 ; VI: [[AND15:%[0-9]+]]:_(s32) = G_AND [[COPY16]], [[C3]] 4076 ; VI: [[SHL11:%[0-9]+]]:_(s32) = G_SHL [[AND15]], [[C6]](s32) 4077 ; VI: [[OR11:%[0-9]+]]:_(s32) = G_OR [[OR10]], [[SHL11]] 4078 ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32), [[OR8]](s32), [[OR11]](s32) 4079 ; VI: [[BITCAST:%[0-9]+]]:_(s128) = G_BITCAST [[BUILD_VECTOR]](<4 x s32>) 4080 ; VI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BITCAST]](s128) 4081 ; GFX9-LABEL: name: test_load_local_s128_align1 4082 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 4083 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 4084 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 4085 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 4086 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 4087 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 4088 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 4089 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 4090 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 4091 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 4092 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 4093 ; GFX9: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 4094 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 4095 ; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 4096 ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 4097 ; GFX9: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 4098 ; GFX9: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 4099 ; GFX9: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 4100 ; GFX9: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 4101 ; GFX9: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 4102 ; GFX9: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 4103 ; GFX9: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 4104 ; GFX9: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 4105 ; GFX9: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 4106 ; GFX9: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 4107 ; GFX9: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 4108 ; GFX9: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 4109 ; GFX9: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 4110 ; GFX9: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 4111 ; GFX9: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 4112 ; GFX9: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C7]](s32) 4113 ; GFX9: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 4114 ; GFX9: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 4115 ; GFX9: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 4116 ; GFX9: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 4117 ; GFX9: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 4118 ; GFX9: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 4119 ; GFX9: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 4120 ; GFX9: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 4121 ; GFX9: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 4122 ; GFX9: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 4123 ; GFX9: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 4124 ; GFX9: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 4125 ; GFX9: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 4126 ; GFX9: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 4127 ; GFX9: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 4128 ; GFX9: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 4129 ; GFX9: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 4130 ; GFX9: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 4131 ; GFX9: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 4132 ; GFX9: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 4133 ; GFX9: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 4134 ; GFX9: [[PTR_ADD7:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 4135 ; GFX9: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p3) :: (load 1 + 8, addrspace 3) 4136 ; GFX9: [[PTR_ADD8:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 4137 ; GFX9: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p3) :: (load 1 + 9, addrspace 3) 4138 ; GFX9: [[PTR_ADD9:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 4139 ; GFX9: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p3) :: (load 1 + 10, addrspace 3) 4140 ; GFX9: [[PTR_ADD10:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 4141 ; GFX9: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p3) :: (load 1 + 11, addrspace 3) 4142 ; GFX9: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 4143 ; GFX9: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 4144 ; GFX9: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 4145 ; GFX9: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 4146 ; GFX9: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 4147 ; GFX9: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 4148 ; GFX9: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 4149 ; GFX9: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 4150 ; GFX9: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 4151 ; GFX9: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 4152 ; GFX9: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 4153 ; GFX9: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 4154 ; GFX9: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 4155 ; GFX9: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 4156 ; GFX9: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 4157 ; GFX9: [[PTR_ADD11:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C8]](s32) 4158 ; GFX9: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p3) :: (load 1 + 12, addrspace 3) 4159 ; GFX9: [[PTR_ADD12:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C]](s32) 4160 ; GFX9: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p3) :: (load 1 + 13, addrspace 3) 4161 ; GFX9: [[PTR_ADD13:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C1]](s32) 4162 ; GFX9: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p3) :: (load 1 + 14, addrspace 3) 4163 ; GFX9: [[PTR_ADD14:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C2]](s32) 4164 ; GFX9: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p3) :: (load 1 + 15, addrspace 3) 4165 ; GFX9: [[COPY13:%[0-9]+]]:_(s32) = COPY [[LOAD12]](s32) 4166 ; GFX9: [[AND12:%[0-9]+]]:_(s32) = G_AND [[COPY13]], [[C3]] 4167 ; GFX9: [[COPY14:%[0-9]+]]:_(s32) = COPY [[LOAD13]](s32) 4168 ; GFX9: [[AND13:%[0-9]+]]:_(s32) = G_AND [[COPY14]], [[C3]] 4169 ; GFX9: [[SHL9:%[0-9]+]]:_(s32) = G_SHL [[AND13]], [[C4]](s32) 4170 ; GFX9: [[OR9:%[0-9]+]]:_(s32) = G_OR [[AND12]], [[SHL9]] 4171 ; GFX9: [[COPY15:%[0-9]+]]:_(s32) = COPY [[LOAD14]](s32) 4172 ; GFX9: [[AND14:%[0-9]+]]:_(s32) = G_AND [[COPY15]], [[C3]] 4173 ; GFX9: [[SHL10:%[0-9]+]]:_(s32) = G_SHL [[AND14]], [[C5]](s32) 4174 ; GFX9: [[OR10:%[0-9]+]]:_(s32) = G_OR [[OR9]], [[SHL10]] 4175 ; GFX9: [[COPY16:%[0-9]+]]:_(s32) = COPY [[LOAD15]](s32) 4176 ; GFX9: [[AND15:%[0-9]+]]:_(s32) = G_AND [[COPY16]], [[C3]] 4177 ; GFX9: [[SHL11:%[0-9]+]]:_(s32) = G_SHL [[AND15]], [[C6]](s32) 4178 ; GFX9: [[OR11:%[0-9]+]]:_(s32) = G_OR [[OR10]], [[SHL11]] 4179 ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32), [[OR8]](s32), [[OR11]](s32) 4180 ; GFX9: [[BITCAST:%[0-9]+]]:_(s128) = G_BITCAST [[BUILD_VECTOR]](<4 x s32>) 4181 ; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BITCAST]](s128) 4182 ; GFX9-UNALIGNED-LABEL: name: test_load_local_s128_align1 4183 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 4184 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[COPY]](p3) :: (load 16, align 1, addrspace 3) 4185 ; GFX9-UNALIGNED: [[BITCAST:%[0-9]+]]:_(s128) = G_BITCAST [[LOAD]](<4 x s32>) 4186 ; GFX9-UNALIGNED: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BITCAST]](s128) 4187 %0:_(p3) = COPY $vgpr0 4188 %1:_(s128) = G_LOAD %0 :: (load 16, align 1, addrspace 3) 4189 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1 4190... 4191 4192--- 4193name: test_load_local_p1_align8 4194body: | 4195 bb.0: 4196 liveins: $vgpr0 4197 4198 ; SI-LABEL: name: test_load_local_p1_align8 4199 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 4200 ; SI: [[LOAD:%[0-9]+]]:_(p1) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) 4201 ; SI: $vgpr0_vgpr1 = COPY [[LOAD]](p1) 4202 ; CI-LABEL: name: test_load_local_p1_align8 4203 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 4204 ; CI: [[LOAD:%[0-9]+]]:_(p1) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) 4205 ; CI: $vgpr0_vgpr1 = COPY [[LOAD]](p1) 4206 ; CI-DS128-LABEL: name: test_load_local_p1_align8 4207 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 4208 ; CI-DS128: [[LOAD:%[0-9]+]]:_(p1) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) 4209 ; CI-DS128: $vgpr0_vgpr1 = COPY [[LOAD]](p1) 4210 ; VI-LABEL: name: test_load_local_p1_align8 4211 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 4212 ; VI: [[LOAD:%[0-9]+]]:_(p1) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) 4213 ; VI: $vgpr0_vgpr1 = COPY [[LOAD]](p1) 4214 ; GFX9-LABEL: name: test_load_local_p1_align8 4215 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 4216 ; GFX9: [[LOAD:%[0-9]+]]:_(p1) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) 4217 ; GFX9: $vgpr0_vgpr1 = COPY [[LOAD]](p1) 4218 ; GFX9-UNALIGNED-LABEL: name: test_load_local_p1_align8 4219 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 4220 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(p1) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) 4221 ; GFX9-UNALIGNED: $vgpr0_vgpr1 = COPY [[LOAD]](p1) 4222 %0:_(p3) = COPY $vgpr0 4223 %1:_(p1) = G_LOAD %0 :: (load 8, align 8, addrspace 3) 4224 $vgpr0_vgpr1 = COPY %1 4225... 4226 4227--- 4228name: test_load_local_p1_align4 4229body: | 4230 bb.0: 4231 liveins: $vgpr0 4232 4233 ; SI-LABEL: name: test_load_local_p1_align4 4234 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 4235 ; SI: [[LOAD:%[0-9]+]]:_(p1) = G_LOAD [[COPY]](p3) :: (load 8, align 4, addrspace 3) 4236 ; SI: $vgpr0_vgpr1 = COPY [[LOAD]](p1) 4237 ; CI-LABEL: name: test_load_local_p1_align4 4238 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 4239 ; CI: [[LOAD:%[0-9]+]]:_(p1) = G_LOAD [[COPY]](p3) :: (load 8, align 4, addrspace 3) 4240 ; CI: $vgpr0_vgpr1 = COPY [[LOAD]](p1) 4241 ; CI-DS128-LABEL: name: test_load_local_p1_align4 4242 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 4243 ; CI-DS128: [[LOAD:%[0-9]+]]:_(p1) = G_LOAD [[COPY]](p3) :: (load 8, align 4, addrspace 3) 4244 ; CI-DS128: $vgpr0_vgpr1 = COPY [[LOAD]](p1) 4245 ; VI-LABEL: name: test_load_local_p1_align4 4246 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 4247 ; VI: [[LOAD:%[0-9]+]]:_(p1) = G_LOAD [[COPY]](p3) :: (load 8, align 4, addrspace 3) 4248 ; VI: $vgpr0_vgpr1 = COPY [[LOAD]](p1) 4249 ; GFX9-LABEL: name: test_load_local_p1_align4 4250 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 4251 ; GFX9: [[LOAD:%[0-9]+]]:_(p1) = G_LOAD [[COPY]](p3) :: (load 8, align 4, addrspace 3) 4252 ; GFX9: $vgpr0_vgpr1 = COPY [[LOAD]](p1) 4253 ; GFX9-UNALIGNED-LABEL: name: test_load_local_p1_align4 4254 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 4255 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(p1) = G_LOAD [[COPY]](p3) :: (load 8, align 4, addrspace 3) 4256 ; GFX9-UNALIGNED: $vgpr0_vgpr1 = COPY [[LOAD]](p1) 4257 %0:_(p3) = COPY $vgpr0 4258 %1:_(p1) = G_LOAD %0 :: (load 8, align 4, addrspace 3) 4259 $vgpr0_vgpr1 = COPY %1 4260... 4261 4262--- 4263name: test_load_local_p1_align2 4264body: | 4265 bb.0: 4266 liveins: $vgpr0 4267 4268 ; SI-LABEL: name: test_load_local_p1_align2 4269 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 4270 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 4271 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 4272 ; SI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 4273 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 4274 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 4275 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 4276 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 2 + 4, addrspace 3) 4277 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 6 4278 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 4279 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 2 + 6, addrspace 3) 4280 ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 4281 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 4282 ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 4283 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 4284 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 4285 ; SI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 4286 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 4287 ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 4288 ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 4289 ; SI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 4290 ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 4291 ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 4292 ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C4]](s32) 4293 ; SI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 4294 ; SI: [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[OR]](s32), [[OR1]](s32) 4295 ; SI: $vgpr0_vgpr1 = COPY [[MV]](p1) 4296 ; CI-LABEL: name: test_load_local_p1_align2 4297 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 4298 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 4299 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 4300 ; CI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 4301 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 4302 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 4303 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 4304 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 2 + 4, addrspace 3) 4305 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 6 4306 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 4307 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 2 + 6, addrspace 3) 4308 ; CI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 4309 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 4310 ; CI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 4311 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 4312 ; CI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 4313 ; CI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 4314 ; CI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 4315 ; CI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 4316 ; CI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 4317 ; CI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 4318 ; CI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 4319 ; CI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 4320 ; CI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C4]](s32) 4321 ; CI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 4322 ; CI: [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[OR]](s32), [[OR1]](s32) 4323 ; CI: $vgpr0_vgpr1 = COPY [[MV]](p1) 4324 ; CI-DS128-LABEL: name: test_load_local_p1_align2 4325 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 4326 ; CI-DS128: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 4327 ; CI-DS128: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 4328 ; CI-DS128: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 4329 ; CI-DS128: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 4330 ; CI-DS128: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 4331 ; CI-DS128: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 4332 ; CI-DS128: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 2 + 4, addrspace 3) 4333 ; CI-DS128: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 6 4334 ; CI-DS128: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 4335 ; CI-DS128: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 2 + 6, addrspace 3) 4336 ; CI-DS128: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 4337 ; CI-DS128: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 4338 ; CI-DS128: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 4339 ; CI-DS128: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 4340 ; CI-DS128: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 4341 ; CI-DS128: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 4342 ; CI-DS128: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 4343 ; CI-DS128: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 4344 ; CI-DS128: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 4345 ; CI-DS128: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 4346 ; CI-DS128: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 4347 ; CI-DS128: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 4348 ; CI-DS128: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C4]](s32) 4349 ; CI-DS128: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 4350 ; CI-DS128: [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[OR]](s32), [[OR1]](s32) 4351 ; CI-DS128: $vgpr0_vgpr1 = COPY [[MV]](p1) 4352 ; VI-LABEL: name: test_load_local_p1_align2 4353 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 4354 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 4355 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 4356 ; VI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 4357 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 4358 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 4359 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 4360 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 2 + 4, addrspace 3) 4361 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 6 4362 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 4363 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 2 + 6, addrspace 3) 4364 ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 4365 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 4366 ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 4367 ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 4368 ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 4369 ; VI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 4370 ; VI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 4371 ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 4372 ; VI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 4373 ; VI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 4374 ; VI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 4375 ; VI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 4376 ; VI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C4]](s32) 4377 ; VI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 4378 ; VI: [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[OR]](s32), [[OR1]](s32) 4379 ; VI: $vgpr0_vgpr1 = COPY [[MV]](p1) 4380 ; GFX9-LABEL: name: test_load_local_p1_align2 4381 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 4382 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 4383 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 4384 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 4385 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 4386 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 4387 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 4388 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 2 + 4, addrspace 3) 4389 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 6 4390 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 4391 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 2 + 6, addrspace 3) 4392 ; GFX9: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 4393 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 4394 ; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 4395 ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 4396 ; GFX9: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 4397 ; GFX9: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 4398 ; GFX9: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 4399 ; GFX9: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 4400 ; GFX9: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 4401 ; GFX9: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 4402 ; GFX9: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 4403 ; GFX9: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 4404 ; GFX9: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C4]](s32) 4405 ; GFX9: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 4406 ; GFX9: [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[OR]](s32), [[OR1]](s32) 4407 ; GFX9: $vgpr0_vgpr1 = COPY [[MV]](p1) 4408 ; GFX9-UNALIGNED-LABEL: name: test_load_local_p1_align2 4409 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 4410 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(p1) = G_LOAD [[COPY]](p3) :: (load 8, align 2, addrspace 3) 4411 ; GFX9-UNALIGNED: $vgpr0_vgpr1 = COPY [[LOAD]](p1) 4412 %0:_(p3) = COPY $vgpr0 4413 %1:_(p1) = G_LOAD %0 :: (load 8, align 2, addrspace 3) 4414 $vgpr0_vgpr1 = COPY %1 4415... 4416 4417--- 4418name: test_load_local_p1_align1 4419body: | 4420 bb.0: 4421 liveins: $vgpr0 4422 4423 ; SI-LABEL: name: test_load_local_p1_align1 4424 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 4425 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 4426 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 4427 ; SI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 4428 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 4429 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 4430 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 4431 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 4432 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 4433 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 4434 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 4435 ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 4436 ; SI: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C3]](s32) 4437 ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 4438 ; SI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 5 4439 ; SI: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 4440 ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 4441 ; SI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 6 4442 ; SI: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C5]](s32) 4443 ; SI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 4444 ; SI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 7 4445 ; SI: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C6]](s32) 4446 ; SI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 4447 ; SI: [[C7:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 4448 ; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) 4449 ; SI: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C7]] 4450 ; SI: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 4451 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[C8]](s32) 4452 ; SI: [[C9:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 4453 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 4454 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C9]] 4455 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[COPY1]](s32) 4456 ; SI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[SHL]](s32) 4457 ; SI: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[TRUNC1]] 4458 ; SI: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) 4459 ; SI: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C7]] 4460 ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[C8]](s32) 4461 ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 4462 ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C9]] 4463 ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[COPY3]](s32) 4464 ; SI: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[SHL1]](s32) 4465 ; SI: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[TRUNC3]] 4466 ; SI: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD4]](s32) 4467 ; SI: [[AND4:%[0-9]+]]:_(s16) = G_AND [[TRUNC4]], [[C7]] 4468 ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[C8]](s32) 4469 ; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 4470 ; SI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C9]] 4471 ; SI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[COPY5]](s32) 4472 ; SI: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[SHL2]](s32) 4473 ; SI: [[OR2:%[0-9]+]]:_(s16) = G_OR [[AND4]], [[TRUNC5]] 4474 ; SI: [[TRUNC6:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD6]](s32) 4475 ; SI: [[AND6:%[0-9]+]]:_(s16) = G_AND [[TRUNC6]], [[C7]] 4476 ; SI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 4477 ; SI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C9]] 4478 ; SI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C8]](s32) 4479 ; SI: [[TRUNC7:%[0-9]+]]:_(s16) = G_TRUNC [[SHL3]](s32) 4480 ; SI: [[OR3:%[0-9]+]]:_(s16) = G_OR [[AND6]], [[TRUNC7]] 4481 ; SI: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[OR]](s16) 4482 ; SI: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[OR1]](s16) 4483 ; SI: [[C10:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 4484 ; SI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[ZEXT1]], [[C10]](s32) 4485 ; SI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL4]] 4486 ; SI: [[ZEXT2:%[0-9]+]]:_(s32) = G_ZEXT [[OR2]](s16) 4487 ; SI: [[ZEXT3:%[0-9]+]]:_(s32) = G_ZEXT [[OR3]](s16) 4488 ; SI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[ZEXT3]], [[C10]](s32) 4489 ; SI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[ZEXT2]], [[SHL5]] 4490 ; SI: [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[OR4]](s32), [[OR5]](s32) 4491 ; SI: $vgpr0_vgpr1 = COPY [[MV]](p1) 4492 ; CI-LABEL: name: test_load_local_p1_align1 4493 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 4494 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 4495 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 4496 ; CI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 4497 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 4498 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 4499 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 4500 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 4501 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 4502 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 4503 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 4504 ; CI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 4505 ; CI: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C3]](s32) 4506 ; CI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 4507 ; CI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 5 4508 ; CI: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 4509 ; CI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 4510 ; CI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 6 4511 ; CI: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C5]](s32) 4512 ; CI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 4513 ; CI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 7 4514 ; CI: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C6]](s32) 4515 ; CI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 4516 ; CI: [[C7:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 4517 ; CI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) 4518 ; CI: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C7]] 4519 ; CI: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 4520 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[C8]](s32) 4521 ; CI: [[C9:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 4522 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 4523 ; CI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C9]] 4524 ; CI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[COPY1]](s32) 4525 ; CI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[SHL]](s32) 4526 ; CI: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[TRUNC1]] 4527 ; CI: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) 4528 ; CI: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C7]] 4529 ; CI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[C8]](s32) 4530 ; CI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 4531 ; CI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C9]] 4532 ; CI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[COPY3]](s32) 4533 ; CI: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[SHL1]](s32) 4534 ; CI: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[TRUNC3]] 4535 ; CI: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD4]](s32) 4536 ; CI: [[AND4:%[0-9]+]]:_(s16) = G_AND [[TRUNC4]], [[C7]] 4537 ; CI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[C8]](s32) 4538 ; CI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 4539 ; CI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C9]] 4540 ; CI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[COPY5]](s32) 4541 ; CI: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[SHL2]](s32) 4542 ; CI: [[OR2:%[0-9]+]]:_(s16) = G_OR [[AND4]], [[TRUNC5]] 4543 ; CI: [[TRUNC6:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD6]](s32) 4544 ; CI: [[AND6:%[0-9]+]]:_(s16) = G_AND [[TRUNC6]], [[C7]] 4545 ; CI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 4546 ; CI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C9]] 4547 ; CI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C8]](s32) 4548 ; CI: [[TRUNC7:%[0-9]+]]:_(s16) = G_TRUNC [[SHL3]](s32) 4549 ; CI: [[OR3:%[0-9]+]]:_(s16) = G_OR [[AND6]], [[TRUNC7]] 4550 ; CI: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[OR]](s16) 4551 ; CI: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[OR1]](s16) 4552 ; CI: [[C10:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 4553 ; CI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[ZEXT1]], [[C10]](s32) 4554 ; CI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL4]] 4555 ; CI: [[ZEXT2:%[0-9]+]]:_(s32) = G_ZEXT [[OR2]](s16) 4556 ; CI: [[ZEXT3:%[0-9]+]]:_(s32) = G_ZEXT [[OR3]](s16) 4557 ; CI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[ZEXT3]], [[C10]](s32) 4558 ; CI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[ZEXT2]], [[SHL5]] 4559 ; CI: [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[OR4]](s32), [[OR5]](s32) 4560 ; CI: $vgpr0_vgpr1 = COPY [[MV]](p1) 4561 ; CI-DS128-LABEL: name: test_load_local_p1_align1 4562 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 4563 ; CI-DS128: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 4564 ; CI-DS128: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 4565 ; CI-DS128: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 4566 ; CI-DS128: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 4567 ; CI-DS128: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 4568 ; CI-DS128: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 4569 ; CI-DS128: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 4570 ; CI-DS128: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 4571 ; CI-DS128: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 4572 ; CI-DS128: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 4573 ; CI-DS128: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 4574 ; CI-DS128: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C3]](s32) 4575 ; CI-DS128: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 4576 ; CI-DS128: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 5 4577 ; CI-DS128: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 4578 ; CI-DS128: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 4579 ; CI-DS128: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 6 4580 ; CI-DS128: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C5]](s32) 4581 ; CI-DS128: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 4582 ; CI-DS128: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 7 4583 ; CI-DS128: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C6]](s32) 4584 ; CI-DS128: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 4585 ; CI-DS128: [[C7:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 4586 ; CI-DS128: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) 4587 ; CI-DS128: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C7]] 4588 ; CI-DS128: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 4589 ; CI-DS128: [[COPY1:%[0-9]+]]:_(s32) = COPY [[C8]](s32) 4590 ; CI-DS128: [[C9:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 4591 ; CI-DS128: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 4592 ; CI-DS128: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C9]] 4593 ; CI-DS128: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[COPY1]](s32) 4594 ; CI-DS128: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[SHL]](s32) 4595 ; CI-DS128: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[TRUNC1]] 4596 ; CI-DS128: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) 4597 ; CI-DS128: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C7]] 4598 ; CI-DS128: [[COPY3:%[0-9]+]]:_(s32) = COPY [[C8]](s32) 4599 ; CI-DS128: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 4600 ; CI-DS128: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C9]] 4601 ; CI-DS128: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[COPY3]](s32) 4602 ; CI-DS128: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[SHL1]](s32) 4603 ; CI-DS128: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[TRUNC3]] 4604 ; CI-DS128: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD4]](s32) 4605 ; CI-DS128: [[AND4:%[0-9]+]]:_(s16) = G_AND [[TRUNC4]], [[C7]] 4606 ; CI-DS128: [[COPY5:%[0-9]+]]:_(s32) = COPY [[C8]](s32) 4607 ; CI-DS128: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 4608 ; CI-DS128: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C9]] 4609 ; CI-DS128: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[COPY5]](s32) 4610 ; CI-DS128: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[SHL2]](s32) 4611 ; CI-DS128: [[OR2:%[0-9]+]]:_(s16) = G_OR [[AND4]], [[TRUNC5]] 4612 ; CI-DS128: [[TRUNC6:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD6]](s32) 4613 ; CI-DS128: [[AND6:%[0-9]+]]:_(s16) = G_AND [[TRUNC6]], [[C7]] 4614 ; CI-DS128: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 4615 ; CI-DS128: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C9]] 4616 ; CI-DS128: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C8]](s32) 4617 ; CI-DS128: [[TRUNC7:%[0-9]+]]:_(s16) = G_TRUNC [[SHL3]](s32) 4618 ; CI-DS128: [[OR3:%[0-9]+]]:_(s16) = G_OR [[AND6]], [[TRUNC7]] 4619 ; CI-DS128: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[OR]](s16) 4620 ; CI-DS128: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[OR1]](s16) 4621 ; CI-DS128: [[C10:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 4622 ; CI-DS128: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[ZEXT1]], [[C10]](s32) 4623 ; CI-DS128: [[OR4:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL4]] 4624 ; CI-DS128: [[ZEXT2:%[0-9]+]]:_(s32) = G_ZEXT [[OR2]](s16) 4625 ; CI-DS128: [[ZEXT3:%[0-9]+]]:_(s32) = G_ZEXT [[OR3]](s16) 4626 ; CI-DS128: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[ZEXT3]], [[C10]](s32) 4627 ; CI-DS128: [[OR5:%[0-9]+]]:_(s32) = G_OR [[ZEXT2]], [[SHL5]] 4628 ; CI-DS128: [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[OR4]](s32), [[OR5]](s32) 4629 ; CI-DS128: $vgpr0_vgpr1 = COPY [[MV]](p1) 4630 ; VI-LABEL: name: test_load_local_p1_align1 4631 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 4632 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 4633 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 4634 ; VI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 4635 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 4636 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 4637 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 4638 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 4639 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 4640 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 4641 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 4642 ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 4643 ; VI: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C3]](s32) 4644 ; VI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 4645 ; VI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 5 4646 ; VI: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 4647 ; VI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 4648 ; VI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 6 4649 ; VI: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C5]](s32) 4650 ; VI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 4651 ; VI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 7 4652 ; VI: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C6]](s32) 4653 ; VI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 4654 ; VI: [[C7:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 4655 ; VI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) 4656 ; VI: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C7]] 4657 ; VI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD1]](s32) 4658 ; VI: [[AND1:%[0-9]+]]:_(s16) = G_AND [[TRUNC1]], [[C7]] 4659 ; VI: [[C8:%[0-9]+]]:_(s16) = G_CONSTANT i16 8 4660 ; VI: [[SHL:%[0-9]+]]:_(s16) = G_SHL [[AND1]], [[C8]](s16) 4661 ; VI: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[SHL]] 4662 ; VI: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) 4663 ; VI: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C7]] 4664 ; VI: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD3]](s32) 4665 ; VI: [[AND3:%[0-9]+]]:_(s16) = G_AND [[TRUNC3]], [[C7]] 4666 ; VI: [[SHL1:%[0-9]+]]:_(s16) = G_SHL [[AND3]], [[C8]](s16) 4667 ; VI: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[SHL1]] 4668 ; VI: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD4]](s32) 4669 ; VI: [[AND4:%[0-9]+]]:_(s16) = G_AND [[TRUNC4]], [[C7]] 4670 ; VI: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD5]](s32) 4671 ; VI: [[AND5:%[0-9]+]]:_(s16) = G_AND [[TRUNC5]], [[C7]] 4672 ; VI: [[SHL2:%[0-9]+]]:_(s16) = G_SHL [[AND5]], [[C8]](s16) 4673 ; VI: [[OR2:%[0-9]+]]:_(s16) = G_OR [[AND4]], [[SHL2]] 4674 ; VI: [[TRUNC6:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD6]](s32) 4675 ; VI: [[AND6:%[0-9]+]]:_(s16) = G_AND [[TRUNC6]], [[C7]] 4676 ; VI: [[TRUNC7:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD7]](s32) 4677 ; VI: [[AND7:%[0-9]+]]:_(s16) = G_AND [[TRUNC7]], [[C7]] 4678 ; VI: [[SHL3:%[0-9]+]]:_(s16) = G_SHL [[AND7]], [[C8]](s16) 4679 ; VI: [[OR3:%[0-9]+]]:_(s16) = G_OR [[AND6]], [[SHL3]] 4680 ; VI: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[OR]](s16) 4681 ; VI: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[OR1]](s16) 4682 ; VI: [[C9:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 4683 ; VI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[ZEXT1]], [[C9]](s32) 4684 ; VI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL4]] 4685 ; VI: [[ZEXT2:%[0-9]+]]:_(s32) = G_ZEXT [[OR2]](s16) 4686 ; VI: [[ZEXT3:%[0-9]+]]:_(s32) = G_ZEXT [[OR3]](s16) 4687 ; VI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[ZEXT3]], [[C9]](s32) 4688 ; VI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[ZEXT2]], [[SHL5]] 4689 ; VI: [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[OR4]](s32), [[OR5]](s32) 4690 ; VI: $vgpr0_vgpr1 = COPY [[MV]](p1) 4691 ; GFX9-LABEL: name: test_load_local_p1_align1 4692 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 4693 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 4694 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 4695 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 4696 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 4697 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 4698 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 4699 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 4700 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 4701 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 4702 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 4703 ; GFX9: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 4704 ; GFX9: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C3]](s32) 4705 ; GFX9: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 4706 ; GFX9: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 5 4707 ; GFX9: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 4708 ; GFX9: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 4709 ; GFX9: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 6 4710 ; GFX9: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C5]](s32) 4711 ; GFX9: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 4712 ; GFX9: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 7 4713 ; GFX9: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C6]](s32) 4714 ; GFX9: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 4715 ; GFX9: [[C7:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 4716 ; GFX9: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) 4717 ; GFX9: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C7]] 4718 ; GFX9: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD1]](s32) 4719 ; GFX9: [[AND1:%[0-9]+]]:_(s16) = G_AND [[TRUNC1]], [[C7]] 4720 ; GFX9: [[C8:%[0-9]+]]:_(s16) = G_CONSTANT i16 8 4721 ; GFX9: [[SHL:%[0-9]+]]:_(s16) = G_SHL [[AND1]], [[C8]](s16) 4722 ; GFX9: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[SHL]] 4723 ; GFX9: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) 4724 ; GFX9: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C7]] 4725 ; GFX9: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD3]](s32) 4726 ; GFX9: [[AND3:%[0-9]+]]:_(s16) = G_AND [[TRUNC3]], [[C7]] 4727 ; GFX9: [[SHL1:%[0-9]+]]:_(s16) = G_SHL [[AND3]], [[C8]](s16) 4728 ; GFX9: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[SHL1]] 4729 ; GFX9: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD4]](s32) 4730 ; GFX9: [[AND4:%[0-9]+]]:_(s16) = G_AND [[TRUNC4]], [[C7]] 4731 ; GFX9: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD5]](s32) 4732 ; GFX9: [[AND5:%[0-9]+]]:_(s16) = G_AND [[TRUNC5]], [[C7]] 4733 ; GFX9: [[SHL2:%[0-9]+]]:_(s16) = G_SHL [[AND5]], [[C8]](s16) 4734 ; GFX9: [[OR2:%[0-9]+]]:_(s16) = G_OR [[AND4]], [[SHL2]] 4735 ; GFX9: [[TRUNC6:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD6]](s32) 4736 ; GFX9: [[AND6:%[0-9]+]]:_(s16) = G_AND [[TRUNC6]], [[C7]] 4737 ; GFX9: [[TRUNC7:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD7]](s32) 4738 ; GFX9: [[AND7:%[0-9]+]]:_(s16) = G_AND [[TRUNC7]], [[C7]] 4739 ; GFX9: [[SHL3:%[0-9]+]]:_(s16) = G_SHL [[AND7]], [[C8]](s16) 4740 ; GFX9: [[OR3:%[0-9]+]]:_(s16) = G_OR [[AND6]], [[SHL3]] 4741 ; GFX9: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[OR]](s16) 4742 ; GFX9: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[OR1]](s16) 4743 ; GFX9: [[C9:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 4744 ; GFX9: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[ZEXT1]], [[C9]](s32) 4745 ; GFX9: [[OR4:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL4]] 4746 ; GFX9: [[ZEXT2:%[0-9]+]]:_(s32) = G_ZEXT [[OR2]](s16) 4747 ; GFX9: [[ZEXT3:%[0-9]+]]:_(s32) = G_ZEXT [[OR3]](s16) 4748 ; GFX9: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[ZEXT3]], [[C9]](s32) 4749 ; GFX9: [[OR5:%[0-9]+]]:_(s32) = G_OR [[ZEXT2]], [[SHL5]] 4750 ; GFX9: [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[OR4]](s32), [[OR5]](s32) 4751 ; GFX9: $vgpr0_vgpr1 = COPY [[MV]](p1) 4752 ; GFX9-UNALIGNED-LABEL: name: test_load_local_p1_align1 4753 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 4754 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(p1) = G_LOAD [[COPY]](p3) :: (load 8, align 1, addrspace 3) 4755 ; GFX9-UNALIGNED: $vgpr0_vgpr1 = COPY [[LOAD]](p1) 4756 %0:_(p3) = COPY $vgpr0 4757 %1:_(p1) = G_LOAD %0 :: (load 8, align 1, addrspace 3) 4758 $vgpr0_vgpr1 = COPY %1 4759... 4760 4761--- 4762name: test_load_local_p3_align4 4763body: | 4764 bb.0: 4765 liveins: $vgpr0 4766 4767 ; SI-LABEL: name: test_load_local_p3_align4 4768 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 4769 ; SI: [[LOAD:%[0-9]+]]:_(p3) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) 4770 ; SI: $vgpr0 = COPY [[LOAD]](p3) 4771 ; CI-LABEL: name: test_load_local_p3_align4 4772 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 4773 ; CI: [[LOAD:%[0-9]+]]:_(p3) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) 4774 ; CI: $vgpr0 = COPY [[LOAD]](p3) 4775 ; CI-DS128-LABEL: name: test_load_local_p3_align4 4776 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 4777 ; CI-DS128: [[LOAD:%[0-9]+]]:_(p3) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) 4778 ; CI-DS128: $vgpr0 = COPY [[LOAD]](p3) 4779 ; VI-LABEL: name: test_load_local_p3_align4 4780 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 4781 ; VI: [[LOAD:%[0-9]+]]:_(p3) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) 4782 ; VI: $vgpr0 = COPY [[LOAD]](p3) 4783 ; GFX9-LABEL: name: test_load_local_p3_align4 4784 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 4785 ; GFX9: [[LOAD:%[0-9]+]]:_(p3) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) 4786 ; GFX9: $vgpr0 = COPY [[LOAD]](p3) 4787 ; GFX9-UNALIGNED-LABEL: name: test_load_local_p3_align4 4788 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 4789 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(p3) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) 4790 ; GFX9-UNALIGNED: $vgpr0 = COPY [[LOAD]](p3) 4791 %0:_(p3) = COPY $vgpr0 4792 %1:_(p3) = G_LOAD %0 :: (load 4, align 4, addrspace 3) 4793 $vgpr0 = COPY %1 4794... 4795 4796--- 4797name: test_load_local_p3_align2 4798body: | 4799 bb.0: 4800 liveins: $vgpr0 4801 4802 ; SI-LABEL: name: test_load_local_p3_align2 4803 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 4804 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 4805 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 4806 ; SI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 4807 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 4808 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 4809 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 4810 ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 4811 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 4812 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 4813 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 4814 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 4815 ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 4816 ; SI: [[INTTOPTR:%[0-9]+]]:_(p3) = G_INTTOPTR [[OR]](s32) 4817 ; SI: $vgpr0 = COPY [[INTTOPTR]](p3) 4818 ; CI-LABEL: name: test_load_local_p3_align2 4819 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 4820 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 4821 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 4822 ; CI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 4823 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 4824 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 4825 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 4826 ; CI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 4827 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 4828 ; CI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 4829 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 4830 ; CI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 4831 ; CI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 4832 ; CI: [[INTTOPTR:%[0-9]+]]:_(p3) = G_INTTOPTR [[OR]](s32) 4833 ; CI: $vgpr0 = COPY [[INTTOPTR]](p3) 4834 ; CI-DS128-LABEL: name: test_load_local_p3_align2 4835 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 4836 ; CI-DS128: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 4837 ; CI-DS128: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 4838 ; CI-DS128: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 4839 ; CI-DS128: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 4840 ; CI-DS128: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 4841 ; CI-DS128: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 4842 ; CI-DS128: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 4843 ; CI-DS128: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 4844 ; CI-DS128: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 4845 ; CI-DS128: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 4846 ; CI-DS128: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 4847 ; CI-DS128: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 4848 ; CI-DS128: [[INTTOPTR:%[0-9]+]]:_(p3) = G_INTTOPTR [[OR]](s32) 4849 ; CI-DS128: $vgpr0 = COPY [[INTTOPTR]](p3) 4850 ; VI-LABEL: name: test_load_local_p3_align2 4851 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 4852 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 4853 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 4854 ; VI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 4855 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 4856 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 4857 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 4858 ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 4859 ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 4860 ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 4861 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 4862 ; VI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 4863 ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 4864 ; VI: [[INTTOPTR:%[0-9]+]]:_(p3) = G_INTTOPTR [[OR]](s32) 4865 ; VI: $vgpr0 = COPY [[INTTOPTR]](p3) 4866 ; GFX9-LABEL: name: test_load_local_p3_align2 4867 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 4868 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 4869 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 4870 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 4871 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 4872 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 4873 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 4874 ; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 4875 ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 4876 ; GFX9: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 4877 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 4878 ; GFX9: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 4879 ; GFX9: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 4880 ; GFX9: [[INTTOPTR:%[0-9]+]]:_(p3) = G_INTTOPTR [[OR]](s32) 4881 ; GFX9: $vgpr0 = COPY [[INTTOPTR]](p3) 4882 ; GFX9-UNALIGNED-LABEL: name: test_load_local_p3_align2 4883 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 4884 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(p3) = G_LOAD [[COPY]](p3) :: (load 4, align 2, addrspace 3) 4885 ; GFX9-UNALIGNED: $vgpr0 = COPY [[LOAD]](p3) 4886 %0:_(p3) = COPY $vgpr0 4887 %1:_(p3) = G_LOAD %0 :: (load 4, align 2, addrspace 3) 4888 $vgpr0 = COPY %1 4889... 4890 4891--- 4892name: test_load_local_p3_align1 4893body: | 4894 bb.0: 4895 liveins: $vgpr0 4896 4897 ; SI-LABEL: name: test_load_local_p3_align1 4898 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 4899 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 4900 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 4901 ; SI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 4902 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 4903 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 4904 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 4905 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 4906 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 4907 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 4908 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 4909 ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 4910 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 4911 ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 4912 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 4913 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 4914 ; SI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 4915 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 4916 ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 4917 ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 4918 ; SI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 4919 ; SI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 4920 ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 4921 ; SI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 4922 ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 4923 ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 4924 ; SI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 4925 ; SI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 4926 ; SI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 4927 ; SI: [[INTTOPTR:%[0-9]+]]:_(p3) = G_INTTOPTR [[OR2]](s32) 4928 ; SI: $vgpr0 = COPY [[INTTOPTR]](p3) 4929 ; CI-LABEL: name: test_load_local_p3_align1 4930 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 4931 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 4932 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 4933 ; CI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 4934 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 4935 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 4936 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 4937 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 4938 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 4939 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 4940 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 4941 ; CI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 4942 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 4943 ; CI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 4944 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 4945 ; CI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 4946 ; CI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 4947 ; CI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 4948 ; CI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 4949 ; CI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 4950 ; CI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 4951 ; CI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 4952 ; CI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 4953 ; CI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 4954 ; CI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 4955 ; CI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 4956 ; CI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 4957 ; CI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 4958 ; CI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 4959 ; CI: [[INTTOPTR:%[0-9]+]]:_(p3) = G_INTTOPTR [[OR2]](s32) 4960 ; CI: $vgpr0 = COPY [[INTTOPTR]](p3) 4961 ; CI-DS128-LABEL: name: test_load_local_p3_align1 4962 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 4963 ; CI-DS128: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 4964 ; CI-DS128: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 4965 ; CI-DS128: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 4966 ; CI-DS128: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 4967 ; CI-DS128: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 4968 ; CI-DS128: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 4969 ; CI-DS128: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 4970 ; CI-DS128: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 4971 ; CI-DS128: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 4972 ; CI-DS128: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 4973 ; CI-DS128: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 4974 ; CI-DS128: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 4975 ; CI-DS128: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 4976 ; CI-DS128: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 4977 ; CI-DS128: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 4978 ; CI-DS128: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 4979 ; CI-DS128: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 4980 ; CI-DS128: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 4981 ; CI-DS128: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 4982 ; CI-DS128: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 4983 ; CI-DS128: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 4984 ; CI-DS128: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 4985 ; CI-DS128: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 4986 ; CI-DS128: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 4987 ; CI-DS128: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 4988 ; CI-DS128: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 4989 ; CI-DS128: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 4990 ; CI-DS128: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 4991 ; CI-DS128: [[INTTOPTR:%[0-9]+]]:_(p3) = G_INTTOPTR [[OR2]](s32) 4992 ; CI-DS128: $vgpr0 = COPY [[INTTOPTR]](p3) 4993 ; VI-LABEL: name: test_load_local_p3_align1 4994 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 4995 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 4996 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 4997 ; VI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 4998 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 4999 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 5000 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 5001 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 5002 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 5003 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 5004 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 5005 ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 5006 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 5007 ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 5008 ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 5009 ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 5010 ; VI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 5011 ; VI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 5012 ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 5013 ; VI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 5014 ; VI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 5015 ; VI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 5016 ; VI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 5017 ; VI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 5018 ; VI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 5019 ; VI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 5020 ; VI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 5021 ; VI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 5022 ; VI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 5023 ; VI: [[INTTOPTR:%[0-9]+]]:_(p3) = G_INTTOPTR [[OR2]](s32) 5024 ; VI: $vgpr0 = COPY [[INTTOPTR]](p3) 5025 ; GFX9-LABEL: name: test_load_local_p3_align1 5026 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 5027 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 5028 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 5029 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 5030 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 5031 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 5032 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 5033 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 5034 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 5035 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 5036 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 5037 ; GFX9: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 5038 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 5039 ; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 5040 ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 5041 ; GFX9: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 5042 ; GFX9: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 5043 ; GFX9: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 5044 ; GFX9: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 5045 ; GFX9: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 5046 ; GFX9: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 5047 ; GFX9: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 5048 ; GFX9: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 5049 ; GFX9: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 5050 ; GFX9: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 5051 ; GFX9: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 5052 ; GFX9: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 5053 ; GFX9: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 5054 ; GFX9: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 5055 ; GFX9: [[INTTOPTR:%[0-9]+]]:_(p3) = G_INTTOPTR [[OR2]](s32) 5056 ; GFX9: $vgpr0 = COPY [[INTTOPTR]](p3) 5057 ; GFX9-UNALIGNED-LABEL: name: test_load_local_p3_align1 5058 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 5059 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(p3) = G_LOAD [[COPY]](p3) :: (load 4, align 1, addrspace 3) 5060 ; GFX9-UNALIGNED: $vgpr0 = COPY [[LOAD]](p3) 5061 %0:_(p3) = COPY $vgpr0 5062 %1:_(p3) = G_LOAD %0 :: (load 4, align 1, addrspace 3) 5063 $vgpr0 = COPY %1 5064... 5065 5066--- 5067name: test_load_local_p5_align4 5068body: | 5069 bb.0: 5070 liveins: $vgpr0 5071 5072 ; SI-LABEL: name: test_load_local_p5_align4 5073 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 5074 ; SI: [[LOAD:%[0-9]+]]:_(p5) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) 5075 ; SI: $vgpr0 = COPY [[LOAD]](p5) 5076 ; CI-LABEL: name: test_load_local_p5_align4 5077 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 5078 ; CI: [[LOAD:%[0-9]+]]:_(p5) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) 5079 ; CI: $vgpr0 = COPY [[LOAD]](p5) 5080 ; CI-DS128-LABEL: name: test_load_local_p5_align4 5081 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 5082 ; CI-DS128: [[LOAD:%[0-9]+]]:_(p5) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) 5083 ; CI-DS128: $vgpr0 = COPY [[LOAD]](p5) 5084 ; VI-LABEL: name: test_load_local_p5_align4 5085 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 5086 ; VI: [[LOAD:%[0-9]+]]:_(p5) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) 5087 ; VI: $vgpr0 = COPY [[LOAD]](p5) 5088 ; GFX9-LABEL: name: test_load_local_p5_align4 5089 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 5090 ; GFX9: [[LOAD:%[0-9]+]]:_(p5) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) 5091 ; GFX9: $vgpr0 = COPY [[LOAD]](p5) 5092 ; GFX9-UNALIGNED-LABEL: name: test_load_local_p5_align4 5093 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 5094 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(p5) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) 5095 ; GFX9-UNALIGNED: $vgpr0 = COPY [[LOAD]](p5) 5096 %0:_(p3) = COPY $vgpr0 5097 %1:_(p5) = G_LOAD %0 :: (load 4, align 4, addrspace 3) 5098 $vgpr0 = COPY %1 5099... 5100 5101--- 5102name: test_load_local_p5_align2 5103body: | 5104 bb.0: 5105 liveins: $vgpr0 5106 5107 ; SI-LABEL: name: test_load_local_p5_align2 5108 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 5109 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 5110 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 5111 ; SI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 5112 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 5113 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 5114 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 5115 ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 5116 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 5117 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 5118 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 5119 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 5120 ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 5121 ; SI: [[INTTOPTR:%[0-9]+]]:_(p5) = G_INTTOPTR [[OR]](s32) 5122 ; SI: $vgpr0 = COPY [[INTTOPTR]](p5) 5123 ; CI-LABEL: name: test_load_local_p5_align2 5124 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 5125 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 5126 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 5127 ; CI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 5128 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 5129 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 5130 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 5131 ; CI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 5132 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 5133 ; CI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 5134 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 5135 ; CI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 5136 ; CI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 5137 ; CI: [[INTTOPTR:%[0-9]+]]:_(p5) = G_INTTOPTR [[OR]](s32) 5138 ; CI: $vgpr0 = COPY [[INTTOPTR]](p5) 5139 ; CI-DS128-LABEL: name: test_load_local_p5_align2 5140 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 5141 ; CI-DS128: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 5142 ; CI-DS128: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 5143 ; CI-DS128: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 5144 ; CI-DS128: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 5145 ; CI-DS128: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 5146 ; CI-DS128: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 5147 ; CI-DS128: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 5148 ; CI-DS128: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 5149 ; CI-DS128: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 5150 ; CI-DS128: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 5151 ; CI-DS128: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 5152 ; CI-DS128: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 5153 ; CI-DS128: [[INTTOPTR:%[0-9]+]]:_(p5) = G_INTTOPTR [[OR]](s32) 5154 ; CI-DS128: $vgpr0 = COPY [[INTTOPTR]](p5) 5155 ; VI-LABEL: name: test_load_local_p5_align2 5156 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 5157 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 5158 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 5159 ; VI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 5160 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 5161 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 5162 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 5163 ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 5164 ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 5165 ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 5166 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 5167 ; VI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 5168 ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 5169 ; VI: [[INTTOPTR:%[0-9]+]]:_(p5) = G_INTTOPTR [[OR]](s32) 5170 ; VI: $vgpr0 = COPY [[INTTOPTR]](p5) 5171 ; GFX9-LABEL: name: test_load_local_p5_align2 5172 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 5173 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 5174 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 5175 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 5176 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 5177 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 5178 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 5179 ; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 5180 ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 5181 ; GFX9: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 5182 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 5183 ; GFX9: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 5184 ; GFX9: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 5185 ; GFX9: [[INTTOPTR:%[0-9]+]]:_(p5) = G_INTTOPTR [[OR]](s32) 5186 ; GFX9: $vgpr0 = COPY [[INTTOPTR]](p5) 5187 ; GFX9-UNALIGNED-LABEL: name: test_load_local_p5_align2 5188 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 5189 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(p5) = G_LOAD [[COPY]](p3) :: (load 4, align 2, addrspace 3) 5190 ; GFX9-UNALIGNED: $vgpr0 = COPY [[LOAD]](p5) 5191 %0:_(p3) = COPY $vgpr0 5192 %1:_(p5) = G_LOAD %0 :: (load 4, align 2, addrspace 3) 5193 $vgpr0 = COPY %1 5194... 5195 5196--- 5197name: test_load_local_p5_align1 5198body: | 5199 bb.0: 5200 liveins: $vgpr0 5201 5202 ; SI-LABEL: name: test_load_local_p5_align1 5203 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 5204 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 5205 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 5206 ; SI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 5207 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 5208 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 5209 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 5210 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 5211 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 5212 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 5213 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 5214 ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 5215 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 5216 ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 5217 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 5218 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 5219 ; SI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 5220 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 5221 ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 5222 ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 5223 ; SI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 5224 ; SI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 5225 ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 5226 ; SI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 5227 ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 5228 ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 5229 ; SI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 5230 ; SI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 5231 ; SI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 5232 ; SI: [[INTTOPTR:%[0-9]+]]:_(p5) = G_INTTOPTR [[OR2]](s32) 5233 ; SI: $vgpr0 = COPY [[INTTOPTR]](p5) 5234 ; CI-LABEL: name: test_load_local_p5_align1 5235 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 5236 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 5237 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 5238 ; CI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 5239 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 5240 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 5241 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 5242 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 5243 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 5244 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 5245 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 5246 ; CI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 5247 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 5248 ; CI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 5249 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 5250 ; CI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 5251 ; CI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 5252 ; CI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 5253 ; CI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 5254 ; CI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 5255 ; CI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 5256 ; CI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 5257 ; CI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 5258 ; CI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 5259 ; CI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 5260 ; CI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 5261 ; CI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 5262 ; CI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 5263 ; CI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 5264 ; CI: [[INTTOPTR:%[0-9]+]]:_(p5) = G_INTTOPTR [[OR2]](s32) 5265 ; CI: $vgpr0 = COPY [[INTTOPTR]](p5) 5266 ; CI-DS128-LABEL: name: test_load_local_p5_align1 5267 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 5268 ; CI-DS128: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 5269 ; CI-DS128: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 5270 ; CI-DS128: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 5271 ; CI-DS128: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 5272 ; CI-DS128: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 5273 ; CI-DS128: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 5274 ; CI-DS128: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 5275 ; CI-DS128: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 5276 ; CI-DS128: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 5277 ; CI-DS128: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 5278 ; CI-DS128: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 5279 ; CI-DS128: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 5280 ; CI-DS128: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 5281 ; CI-DS128: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 5282 ; CI-DS128: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 5283 ; CI-DS128: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 5284 ; CI-DS128: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 5285 ; CI-DS128: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 5286 ; CI-DS128: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 5287 ; CI-DS128: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 5288 ; CI-DS128: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 5289 ; CI-DS128: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 5290 ; CI-DS128: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 5291 ; CI-DS128: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 5292 ; CI-DS128: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 5293 ; CI-DS128: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 5294 ; CI-DS128: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 5295 ; CI-DS128: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 5296 ; CI-DS128: [[INTTOPTR:%[0-9]+]]:_(p5) = G_INTTOPTR [[OR2]](s32) 5297 ; CI-DS128: $vgpr0 = COPY [[INTTOPTR]](p5) 5298 ; VI-LABEL: name: test_load_local_p5_align1 5299 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 5300 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 5301 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 5302 ; VI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 5303 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 5304 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 5305 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 5306 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 5307 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 5308 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 5309 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 5310 ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 5311 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 5312 ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 5313 ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 5314 ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 5315 ; VI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 5316 ; VI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 5317 ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 5318 ; VI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 5319 ; VI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 5320 ; VI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 5321 ; VI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 5322 ; VI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 5323 ; VI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 5324 ; VI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 5325 ; VI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 5326 ; VI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 5327 ; VI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 5328 ; VI: [[INTTOPTR:%[0-9]+]]:_(p5) = G_INTTOPTR [[OR2]](s32) 5329 ; VI: $vgpr0 = COPY [[INTTOPTR]](p5) 5330 ; GFX9-LABEL: name: test_load_local_p5_align1 5331 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 5332 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 5333 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 5334 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 5335 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 5336 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 5337 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 5338 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 5339 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 5340 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 5341 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 5342 ; GFX9: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 5343 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 5344 ; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 5345 ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 5346 ; GFX9: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 5347 ; GFX9: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 5348 ; GFX9: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 5349 ; GFX9: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 5350 ; GFX9: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 5351 ; GFX9: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 5352 ; GFX9: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 5353 ; GFX9: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 5354 ; GFX9: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 5355 ; GFX9: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 5356 ; GFX9: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 5357 ; GFX9: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 5358 ; GFX9: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 5359 ; GFX9: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 5360 ; GFX9: [[INTTOPTR:%[0-9]+]]:_(p5) = G_INTTOPTR [[OR2]](s32) 5361 ; GFX9: $vgpr0 = COPY [[INTTOPTR]](p5) 5362 ; GFX9-UNALIGNED-LABEL: name: test_load_local_p5_align1 5363 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 5364 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(p5) = G_LOAD [[COPY]](p3) :: (load 4, align 1, addrspace 3) 5365 ; GFX9-UNALIGNED: $vgpr0 = COPY [[LOAD]](p5) 5366 %0:_(p3) = COPY $vgpr0 5367 %1:_(p5) = G_LOAD %0 :: (load 4, align 1, addrspace 3) 5368 $vgpr0 = COPY %1 5369... 5370 5371--- 5372name: test_load_local_v2s8_align2 5373body: | 5374 bb.0: 5375 liveins: $vgpr0 5376 5377 ; SI-LABEL: name: test_load_local_v2s8_align2 5378 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 5379 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 5380 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 5381 ; SI: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C]](s32) 5382 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 5383 ; SI: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C1]](s32) 5384 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 5385 ; SI: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C2]](s32) 5386 ; SI: [[C3:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 5387 ; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) 5388 ; SI: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C3]] 5389 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[C]](s32) 5390 ; SI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 5391 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32) 5392 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C4]] 5393 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[COPY1]](s32) 5394 ; SI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[SHL]](s32) 5395 ; SI: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[TRUNC1]] 5396 ; SI: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[OR]](s16) 5397 ; SI: $vgpr0 = COPY [[ANYEXT]](s32) 5398 ; CI-LABEL: name: test_load_local_v2s8_align2 5399 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 5400 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 5401 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 5402 ; CI: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C]](s32) 5403 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 5404 ; CI: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C1]](s32) 5405 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 5406 ; CI: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C2]](s32) 5407 ; CI: [[C3:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 5408 ; CI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) 5409 ; CI: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C3]] 5410 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[C]](s32) 5411 ; CI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 5412 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32) 5413 ; CI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C4]] 5414 ; CI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[COPY1]](s32) 5415 ; CI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[SHL]](s32) 5416 ; CI: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[TRUNC1]] 5417 ; CI: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[OR]](s16) 5418 ; CI: $vgpr0 = COPY [[ANYEXT]](s32) 5419 ; CI-DS128-LABEL: name: test_load_local_v2s8_align2 5420 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 5421 ; CI-DS128: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 5422 ; CI-DS128: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 5423 ; CI-DS128: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C]](s32) 5424 ; CI-DS128: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 5425 ; CI-DS128: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C1]](s32) 5426 ; CI-DS128: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 5427 ; CI-DS128: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C2]](s32) 5428 ; CI-DS128: [[C3:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 5429 ; CI-DS128: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) 5430 ; CI-DS128: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C3]] 5431 ; CI-DS128: [[COPY1:%[0-9]+]]:_(s32) = COPY [[C]](s32) 5432 ; CI-DS128: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 5433 ; CI-DS128: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32) 5434 ; CI-DS128: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C4]] 5435 ; CI-DS128: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[COPY1]](s32) 5436 ; CI-DS128: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[SHL]](s32) 5437 ; CI-DS128: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[TRUNC1]] 5438 ; CI-DS128: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[OR]](s16) 5439 ; CI-DS128: $vgpr0 = COPY [[ANYEXT]](s32) 5440 ; VI-LABEL: name: test_load_local_v2s8_align2 5441 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 5442 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 5443 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 5444 ; VI: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C]](s32) 5445 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 5446 ; VI: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C1]](s32) 5447 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 5448 ; VI: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C2]](s32) 5449 ; VI: [[C3:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 5450 ; VI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) 5451 ; VI: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C3]] 5452 ; VI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR]](s32) 5453 ; VI: [[AND1:%[0-9]+]]:_(s16) = G_AND [[TRUNC1]], [[C3]] 5454 ; VI: [[C4:%[0-9]+]]:_(s16) = G_CONSTANT i16 8 5455 ; VI: [[SHL:%[0-9]+]]:_(s16) = G_SHL [[AND1]], [[C4]](s16) 5456 ; VI: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[SHL]] 5457 ; VI: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[OR]](s16) 5458 ; VI: $vgpr0 = COPY [[ANYEXT]](s32) 5459 ; GFX9-LABEL: name: test_load_local_v2s8_align2 5460 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 5461 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 5462 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 5463 ; GFX9: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C]](s32) 5464 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 5465 ; GFX9: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C1]](s32) 5466 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 5467 ; GFX9: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C2]](s32) 5468 ; GFX9: [[C3:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 5469 ; GFX9: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) 5470 ; GFX9: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C3]] 5471 ; GFX9: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR]](s32) 5472 ; GFX9: [[AND1:%[0-9]+]]:_(s16) = G_AND [[TRUNC1]], [[C3]] 5473 ; GFX9: [[C4:%[0-9]+]]:_(s16) = G_CONSTANT i16 8 5474 ; GFX9: [[SHL:%[0-9]+]]:_(s16) = G_SHL [[AND1]], [[C4]](s16) 5475 ; GFX9: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[SHL]] 5476 ; GFX9: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[OR]](s16) 5477 ; GFX9: $vgpr0 = COPY [[ANYEXT]](s32) 5478 ; GFX9-UNALIGNED-LABEL: name: test_load_local_v2s8_align2 5479 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 5480 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 5481 ; GFX9-UNALIGNED: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 5482 ; GFX9-UNALIGNED: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C]](s32) 5483 ; GFX9-UNALIGNED: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 5484 ; GFX9-UNALIGNED: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C1]](s32) 5485 ; GFX9-UNALIGNED: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 5486 ; GFX9-UNALIGNED: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C2]](s32) 5487 ; GFX9-UNALIGNED: [[C3:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 5488 ; GFX9-UNALIGNED: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) 5489 ; GFX9-UNALIGNED: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C3]] 5490 ; GFX9-UNALIGNED: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR]](s32) 5491 ; GFX9-UNALIGNED: [[AND1:%[0-9]+]]:_(s16) = G_AND [[TRUNC1]], [[C3]] 5492 ; GFX9-UNALIGNED: [[C4:%[0-9]+]]:_(s16) = G_CONSTANT i16 8 5493 ; GFX9-UNALIGNED: [[SHL:%[0-9]+]]:_(s16) = G_SHL [[AND1]], [[C4]](s16) 5494 ; GFX9-UNALIGNED: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[SHL]] 5495 ; GFX9-UNALIGNED: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[OR]](s16) 5496 ; GFX9-UNALIGNED: $vgpr0 = COPY [[ANYEXT]](s32) 5497 %0:_(p3) = COPY $vgpr0 5498 %1:_(<2 x s8>) = G_LOAD %0 :: (load 2, align 2, addrspace 3) 5499 %2:_(s16) = G_BITCAST %1 5500 %3:_(s32) = G_ANYEXT %2 5501 $vgpr0 = COPY %3 5502... 5503 5504--- 5505name: test_load_local_v2s8_align1 5506body: | 5507 bb.0: 5508 liveins: $vgpr0 5509 5510 ; SI-LABEL: name: test_load_local_v2s8_align1 5511 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 5512 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 5513 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 5514 ; SI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 5515 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 5516 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 5517 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 5518 ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 5519 ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 5520 ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[COPY3]](s32), [[COPY4]](s32) 5521 ; SI: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) 5522 ; CI-LABEL: name: test_load_local_v2s8_align1 5523 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 5524 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 5525 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 5526 ; CI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 5527 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 5528 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 5529 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 5530 ; CI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 5531 ; CI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 5532 ; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[COPY3]](s32), [[COPY4]](s32) 5533 ; CI: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) 5534 ; CI-DS128-LABEL: name: test_load_local_v2s8_align1 5535 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 5536 ; CI-DS128: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 5537 ; CI-DS128: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 5538 ; CI-DS128: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 5539 ; CI-DS128: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 5540 ; CI-DS128: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 5541 ; CI-DS128: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 5542 ; CI-DS128: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 5543 ; CI-DS128: [[COPY4:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 5544 ; CI-DS128: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[COPY3]](s32), [[COPY4]](s32) 5545 ; CI-DS128: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) 5546 ; VI-LABEL: name: test_load_local_v2s8_align1 5547 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 5548 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 5549 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 5550 ; VI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 5551 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 5552 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 5553 ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 5554 ; VI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 5555 ; VI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 5556 ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[COPY3]](s32), [[COPY4]](s32) 5557 ; VI: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) 5558 ; GFX9-LABEL: name: test_load_local_v2s8_align1 5559 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 5560 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 5561 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 5562 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 5563 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 5564 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 5565 ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 5566 ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[COPY1]](s32), [[COPY2]](s32) 5567 ; GFX9: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) 5568 ; GFX9-UNALIGNED-LABEL: name: test_load_local_v2s8_align1 5569 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 5570 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, align 1, addrspace 3) 5571 ; GFX9-UNALIGNED: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 5572 ; GFX9-UNALIGNED: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C]](s32) 5573 ; GFX9-UNALIGNED: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 5574 ; GFX9-UNALIGNED: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C1]](s32) 5575 ; GFX9-UNALIGNED: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 5576 ; GFX9-UNALIGNED: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C2]](s32) 5577 ; GFX9-UNALIGNED: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 5578 ; GFX9-UNALIGNED: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32) 5579 ; GFX9-UNALIGNED: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[COPY1]](s32), [[COPY2]](s32) 5580 ; GFX9-UNALIGNED: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) 5581 %0:_(p3) = COPY $vgpr0 5582 %1:_(<2 x s8>) = G_LOAD %0 :: (load 2, align 1, addrspace 3) 5583 %2:_(<2 x s32>) = G_ANYEXT %1 5584 $vgpr0_vgpr1 = COPY %2 5585... 5586 5587--- 5588name: test_load_local_v3s8_align4 5589body: | 5590 bb.0: 5591 liveins: $vgpr0 5592 5593 ; SI-LABEL: name: test_load_local_v3s8_align4 5594 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 5595 ; SI: [[LOAD:%[0-9]+]]:_(<3 x s8>) = G_LOAD [[COPY]](p3) :: (load 3, align 4, addrspace 1) 5596 ; SI: [[DEF:%[0-9]+]]:_(<4 x s8>) = G_IMPLICIT_DEF 5597 ; SI: [[INSERT:%[0-9]+]]:_(<4 x s8>) = G_INSERT [[DEF]], [[LOAD]](<3 x s8>), 0 5598 ; SI: $vgpr0 = COPY [[INSERT]](<4 x s8>) 5599 ; CI-LABEL: name: test_load_local_v3s8_align4 5600 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 5601 ; CI: [[LOAD:%[0-9]+]]:_(<3 x s8>) = G_LOAD [[COPY]](p3) :: (load 3, align 4, addrspace 1) 5602 ; CI: [[DEF:%[0-9]+]]:_(<4 x s8>) = G_IMPLICIT_DEF 5603 ; CI: [[INSERT:%[0-9]+]]:_(<4 x s8>) = G_INSERT [[DEF]], [[LOAD]](<3 x s8>), 0 5604 ; CI: $vgpr0 = COPY [[INSERT]](<4 x s8>) 5605 ; CI-DS128-LABEL: name: test_load_local_v3s8_align4 5606 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 5607 ; CI-DS128: [[LOAD:%[0-9]+]]:_(<3 x s8>) = G_LOAD [[COPY]](p3) :: (load 3, align 4, addrspace 1) 5608 ; CI-DS128: [[DEF:%[0-9]+]]:_(<4 x s8>) = G_IMPLICIT_DEF 5609 ; CI-DS128: [[INSERT:%[0-9]+]]:_(<4 x s8>) = G_INSERT [[DEF]], [[LOAD]](<3 x s8>), 0 5610 ; CI-DS128: $vgpr0 = COPY [[INSERT]](<4 x s8>) 5611 ; VI-LABEL: name: test_load_local_v3s8_align4 5612 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 5613 ; VI: [[LOAD:%[0-9]+]]:_(<3 x s8>) = G_LOAD [[COPY]](p3) :: (load 3, align 4, addrspace 1) 5614 ; VI: [[DEF:%[0-9]+]]:_(<4 x s8>) = G_IMPLICIT_DEF 5615 ; VI: [[INSERT:%[0-9]+]]:_(<4 x s8>) = G_INSERT [[DEF]], [[LOAD]](<3 x s8>), 0 5616 ; VI: $vgpr0 = COPY [[INSERT]](<4 x s8>) 5617 ; GFX9-LABEL: name: test_load_local_v3s8_align4 5618 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 5619 ; GFX9: [[LOAD:%[0-9]+]]:_(<3 x s8>) = G_LOAD [[COPY]](p3) :: (load 3, align 4, addrspace 1) 5620 ; GFX9: [[DEF:%[0-9]+]]:_(<4 x s8>) = G_IMPLICIT_DEF 5621 ; GFX9: [[INSERT:%[0-9]+]]:_(<4 x s8>) = G_INSERT [[DEF]], [[LOAD]](<3 x s8>), 0 5622 ; GFX9: $vgpr0 = COPY [[INSERT]](<4 x s8>) 5623 ; GFX9-UNALIGNED-LABEL: name: test_load_local_v3s8_align4 5624 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 5625 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(<3 x s8>) = G_LOAD [[COPY]](p3) :: (load 3, align 4, addrspace 1) 5626 ; GFX9-UNALIGNED: [[DEF:%[0-9]+]]:_(<4 x s8>) = G_IMPLICIT_DEF 5627 ; GFX9-UNALIGNED: [[INSERT:%[0-9]+]]:_(<4 x s8>) = G_INSERT [[DEF]], [[LOAD]](<3 x s8>), 0 5628 ; GFX9-UNALIGNED: $vgpr0 = COPY [[INSERT]](<4 x s8>) 5629 %0:_(p3) = COPY $vgpr0 5630 %1:_(<3 x s8>) = G_LOAD %0 :: (load 3, addrspace 1, align 4) 5631 %2:_(<4 x s8>) = G_IMPLICIT_DEF 5632 %3:_(<4 x s8>) = G_INSERT %2, %1, 0 5633 $vgpr0 = COPY %3 5634... 5635 5636--- 5637name: test_load_local_v3s8_align1 5638body: | 5639 bb.0: 5640 liveins: $vgpr0 5641 5642 ; SI-LABEL: name: test_load_local_v3s8_align1 5643 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 5644 ; SI: [[LOAD:%[0-9]+]]:_(<3 x s8>) = G_LOAD [[COPY]](p3) :: (load 3, align 1, addrspace 3) 5645 ; SI: [[DEF:%[0-9]+]]:_(<4 x s8>) = G_IMPLICIT_DEF 5646 ; SI: [[INSERT:%[0-9]+]]:_(<4 x s8>) = G_INSERT [[DEF]], [[LOAD]](<3 x s8>), 0 5647 ; SI: $vgpr0 = COPY [[INSERT]](<4 x s8>) 5648 ; CI-LABEL: name: test_load_local_v3s8_align1 5649 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 5650 ; CI: [[LOAD:%[0-9]+]]:_(<3 x s8>) = G_LOAD [[COPY]](p3) :: (load 3, align 1, addrspace 3) 5651 ; CI: [[DEF:%[0-9]+]]:_(<4 x s8>) = G_IMPLICIT_DEF 5652 ; CI: [[INSERT:%[0-9]+]]:_(<4 x s8>) = G_INSERT [[DEF]], [[LOAD]](<3 x s8>), 0 5653 ; CI: $vgpr0 = COPY [[INSERT]](<4 x s8>) 5654 ; CI-DS128-LABEL: name: test_load_local_v3s8_align1 5655 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 5656 ; CI-DS128: [[LOAD:%[0-9]+]]:_(<3 x s8>) = G_LOAD [[COPY]](p3) :: (load 3, align 1, addrspace 3) 5657 ; CI-DS128: [[DEF:%[0-9]+]]:_(<4 x s8>) = G_IMPLICIT_DEF 5658 ; CI-DS128: [[INSERT:%[0-9]+]]:_(<4 x s8>) = G_INSERT [[DEF]], [[LOAD]](<3 x s8>), 0 5659 ; CI-DS128: $vgpr0 = COPY [[INSERT]](<4 x s8>) 5660 ; VI-LABEL: name: test_load_local_v3s8_align1 5661 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 5662 ; VI: [[LOAD:%[0-9]+]]:_(<3 x s8>) = G_LOAD [[COPY]](p3) :: (load 3, align 1, addrspace 3) 5663 ; VI: [[DEF:%[0-9]+]]:_(<4 x s8>) = G_IMPLICIT_DEF 5664 ; VI: [[INSERT:%[0-9]+]]:_(<4 x s8>) = G_INSERT [[DEF]], [[LOAD]](<3 x s8>), 0 5665 ; VI: $vgpr0 = COPY [[INSERT]](<4 x s8>) 5666 ; GFX9-LABEL: name: test_load_local_v3s8_align1 5667 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 5668 ; GFX9: [[LOAD:%[0-9]+]]:_(<3 x s8>) = G_LOAD [[COPY]](p3) :: (load 3, align 1, addrspace 3) 5669 ; GFX9: [[DEF:%[0-9]+]]:_(<4 x s8>) = G_IMPLICIT_DEF 5670 ; GFX9: [[INSERT:%[0-9]+]]:_(<4 x s8>) = G_INSERT [[DEF]], [[LOAD]](<3 x s8>), 0 5671 ; GFX9: $vgpr0 = COPY [[INSERT]](<4 x s8>) 5672 ; GFX9-UNALIGNED-LABEL: name: test_load_local_v3s8_align1 5673 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 5674 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(<3 x s8>) = G_LOAD [[COPY]](p3) :: (load 3, align 1, addrspace 3) 5675 ; GFX9-UNALIGNED: [[DEF:%[0-9]+]]:_(<4 x s8>) = G_IMPLICIT_DEF 5676 ; GFX9-UNALIGNED: [[INSERT:%[0-9]+]]:_(<4 x s8>) = G_INSERT [[DEF]], [[LOAD]](<3 x s8>), 0 5677 ; GFX9-UNALIGNED: $vgpr0 = COPY [[INSERT]](<4 x s8>) 5678 %0:_(p3) = COPY $vgpr0 5679 %1:_(<3 x s8>) = G_LOAD %0 :: (load 3, align 1, addrspace 3) 5680 %2:_(<4 x s8>) = G_IMPLICIT_DEF 5681 %3:_(<4 x s8>) = G_INSERT %2, %1, 0 5682 $vgpr0 = COPY %3 5683... 5684 5685--- 5686name: test_load_local_v4s8_align4 5687body: | 5688 bb.0: 5689 liveins: $vgpr0 5690 5691 ; SI-LABEL: name: test_load_local_v4s8_align4 5692 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 5693 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) 5694 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 5695 ; SI: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C]](s32) 5696 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 5697 ; SI: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C1]](s32) 5698 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 5699 ; SI: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C2]](s32) 5700 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 5701 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32) 5702 ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LSHR1]](s32) 5703 ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LSHR2]](s32) 5704 ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32) 5705 ; SI: [[TRUNC:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[BUILD_VECTOR]](<4 x s32>) 5706 ; SI: $vgpr0 = COPY [[TRUNC]](<4 x s8>) 5707 ; CI-LABEL: name: test_load_local_v4s8_align4 5708 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 5709 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) 5710 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 5711 ; CI: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C]](s32) 5712 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 5713 ; CI: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C1]](s32) 5714 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 5715 ; CI: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C2]](s32) 5716 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 5717 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32) 5718 ; CI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LSHR1]](s32) 5719 ; CI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LSHR2]](s32) 5720 ; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32) 5721 ; CI: [[TRUNC:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[BUILD_VECTOR]](<4 x s32>) 5722 ; CI: $vgpr0 = COPY [[TRUNC]](<4 x s8>) 5723 ; CI-DS128-LABEL: name: test_load_local_v4s8_align4 5724 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 5725 ; CI-DS128: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) 5726 ; CI-DS128: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 5727 ; CI-DS128: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C]](s32) 5728 ; CI-DS128: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 5729 ; CI-DS128: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C1]](s32) 5730 ; CI-DS128: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 5731 ; CI-DS128: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C2]](s32) 5732 ; CI-DS128: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 5733 ; CI-DS128: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32) 5734 ; CI-DS128: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LSHR1]](s32) 5735 ; CI-DS128: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LSHR2]](s32) 5736 ; CI-DS128: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32) 5737 ; CI-DS128: [[TRUNC:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[BUILD_VECTOR]](<4 x s32>) 5738 ; CI-DS128: $vgpr0 = COPY [[TRUNC]](<4 x s8>) 5739 ; VI-LABEL: name: test_load_local_v4s8_align4 5740 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 5741 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) 5742 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 5743 ; VI: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C]](s32) 5744 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 5745 ; VI: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C1]](s32) 5746 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 5747 ; VI: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C2]](s32) 5748 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 5749 ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32) 5750 ; VI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LSHR1]](s32) 5751 ; VI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LSHR2]](s32) 5752 ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32) 5753 ; VI: [[TRUNC:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[BUILD_VECTOR]](<4 x s32>) 5754 ; VI: $vgpr0 = COPY [[TRUNC]](<4 x s8>) 5755 ; GFX9-LABEL: name: test_load_local_v4s8_align4 5756 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 5757 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) 5758 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 5759 ; GFX9: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C]](s32) 5760 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 5761 ; GFX9: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C1]](s32) 5762 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 5763 ; GFX9: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C2]](s32) 5764 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 5765 ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32) 5766 ; GFX9: [[BUILD_VECTOR_TRUNC:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC [[COPY1]](s32), [[COPY2]](s32) 5767 ; GFX9: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LSHR1]](s32) 5768 ; GFX9: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LSHR2]](s32) 5769 ; GFX9: [[BUILD_VECTOR_TRUNC1:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC [[COPY3]](s32), [[COPY4]](s32) 5770 ; GFX9: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BUILD_VECTOR_TRUNC]](<2 x s16>), [[BUILD_VECTOR_TRUNC1]](<2 x s16>) 5771 ; GFX9: [[TRUNC:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[CONCAT_VECTORS]](<4 x s16>) 5772 ; GFX9: $vgpr0 = COPY [[TRUNC]](<4 x s8>) 5773 ; GFX9-UNALIGNED-LABEL: name: test_load_local_v4s8_align4 5774 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 5775 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) 5776 ; GFX9-UNALIGNED: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 5777 ; GFX9-UNALIGNED: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C]](s32) 5778 ; GFX9-UNALIGNED: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 5779 ; GFX9-UNALIGNED: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C1]](s32) 5780 ; GFX9-UNALIGNED: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 5781 ; GFX9-UNALIGNED: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C2]](s32) 5782 ; GFX9-UNALIGNED: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 5783 ; GFX9-UNALIGNED: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32) 5784 ; GFX9-UNALIGNED: [[BUILD_VECTOR_TRUNC:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC [[COPY1]](s32), [[COPY2]](s32) 5785 ; GFX9-UNALIGNED: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LSHR1]](s32) 5786 ; GFX9-UNALIGNED: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LSHR2]](s32) 5787 ; GFX9-UNALIGNED: [[BUILD_VECTOR_TRUNC1:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC [[COPY3]](s32), [[COPY4]](s32) 5788 ; GFX9-UNALIGNED: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BUILD_VECTOR_TRUNC]](<2 x s16>), [[BUILD_VECTOR_TRUNC1]](<2 x s16>) 5789 ; GFX9-UNALIGNED: [[TRUNC:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[CONCAT_VECTORS]](<4 x s16>) 5790 ; GFX9-UNALIGNED: $vgpr0 = COPY [[TRUNC]](<4 x s8>) 5791 %0:_(p3) = COPY $vgpr0 5792 %1:_(<4 x s8>) = G_LOAD %0 :: (load 4, align 4, addrspace 3) 5793 $vgpr0 = COPY %1 5794... 5795 5796--- 5797name: test_load_local_v8s8_align8 5798body: | 5799 bb.0: 5800 liveins: $vgpr0 5801 5802 ; SI-LABEL: name: test_load_local_v8s8_align8 5803 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 5804 ; SI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) 5805 ; SI: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[LOAD]](<2 x s32>) 5806 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 5807 ; SI: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[UV]], [[C]](s32) 5808 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 5809 ; SI: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[UV]], [[C1]](s32) 5810 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 5811 ; SI: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[UV]], [[C2]](s32) 5812 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[UV]](s32) 5813 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32) 5814 ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LSHR1]](s32) 5815 ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LSHR2]](s32) 5816 ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32) 5817 ; SI: [[TRUNC:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[BUILD_VECTOR]](<4 x s32>) 5818 ; SI: [[LSHR3:%[0-9]+]]:_(s32) = G_LSHR [[UV1]], [[C]](s32) 5819 ; SI: [[LSHR4:%[0-9]+]]:_(s32) = G_LSHR [[UV1]], [[C1]](s32) 5820 ; SI: [[LSHR5:%[0-9]+]]:_(s32) = G_LSHR [[UV1]], [[C2]](s32) 5821 ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[UV1]](s32) 5822 ; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LSHR3]](s32) 5823 ; SI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LSHR4]](s32) 5824 ; SI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LSHR5]](s32) 5825 ; SI: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32), [[COPY8]](s32) 5826 ; SI: [[TRUNC1:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[BUILD_VECTOR1]](<4 x s32>) 5827 ; SI: [[CONCAT_VECTORS:%[0-9]+]]:_(<8 x s8>) = G_CONCAT_VECTORS [[TRUNC]](<4 x s8>), [[TRUNC1]](<4 x s8>) 5828 ; SI: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<8 x s8>) 5829 ; CI-LABEL: name: test_load_local_v8s8_align8 5830 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 5831 ; CI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) 5832 ; CI: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[LOAD]](<2 x s32>) 5833 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 5834 ; CI: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[UV]], [[C]](s32) 5835 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 5836 ; CI: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[UV]], [[C1]](s32) 5837 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 5838 ; CI: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[UV]], [[C2]](s32) 5839 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[UV]](s32) 5840 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32) 5841 ; CI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LSHR1]](s32) 5842 ; CI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LSHR2]](s32) 5843 ; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32) 5844 ; CI: [[TRUNC:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[BUILD_VECTOR]](<4 x s32>) 5845 ; CI: [[LSHR3:%[0-9]+]]:_(s32) = G_LSHR [[UV1]], [[C]](s32) 5846 ; CI: [[LSHR4:%[0-9]+]]:_(s32) = G_LSHR [[UV1]], [[C1]](s32) 5847 ; CI: [[LSHR5:%[0-9]+]]:_(s32) = G_LSHR [[UV1]], [[C2]](s32) 5848 ; CI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[UV1]](s32) 5849 ; CI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LSHR3]](s32) 5850 ; CI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LSHR4]](s32) 5851 ; CI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LSHR5]](s32) 5852 ; CI: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32), [[COPY8]](s32) 5853 ; CI: [[TRUNC1:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[BUILD_VECTOR1]](<4 x s32>) 5854 ; CI: [[CONCAT_VECTORS:%[0-9]+]]:_(<8 x s8>) = G_CONCAT_VECTORS [[TRUNC]](<4 x s8>), [[TRUNC1]](<4 x s8>) 5855 ; CI: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<8 x s8>) 5856 ; CI-DS128-LABEL: name: test_load_local_v8s8_align8 5857 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 5858 ; CI-DS128: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) 5859 ; CI-DS128: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[LOAD]](<2 x s32>) 5860 ; CI-DS128: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 5861 ; CI-DS128: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[UV]], [[C]](s32) 5862 ; CI-DS128: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 5863 ; CI-DS128: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[UV]], [[C1]](s32) 5864 ; CI-DS128: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 5865 ; CI-DS128: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[UV]], [[C2]](s32) 5866 ; CI-DS128: [[COPY1:%[0-9]+]]:_(s32) = COPY [[UV]](s32) 5867 ; CI-DS128: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32) 5868 ; CI-DS128: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LSHR1]](s32) 5869 ; CI-DS128: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LSHR2]](s32) 5870 ; CI-DS128: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32) 5871 ; CI-DS128: [[TRUNC:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[BUILD_VECTOR]](<4 x s32>) 5872 ; CI-DS128: [[LSHR3:%[0-9]+]]:_(s32) = G_LSHR [[UV1]], [[C]](s32) 5873 ; CI-DS128: [[LSHR4:%[0-9]+]]:_(s32) = G_LSHR [[UV1]], [[C1]](s32) 5874 ; CI-DS128: [[LSHR5:%[0-9]+]]:_(s32) = G_LSHR [[UV1]], [[C2]](s32) 5875 ; CI-DS128: [[COPY5:%[0-9]+]]:_(s32) = COPY [[UV1]](s32) 5876 ; CI-DS128: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LSHR3]](s32) 5877 ; CI-DS128: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LSHR4]](s32) 5878 ; CI-DS128: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LSHR5]](s32) 5879 ; CI-DS128: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32), [[COPY8]](s32) 5880 ; CI-DS128: [[TRUNC1:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[BUILD_VECTOR1]](<4 x s32>) 5881 ; CI-DS128: [[CONCAT_VECTORS:%[0-9]+]]:_(<8 x s8>) = G_CONCAT_VECTORS [[TRUNC]](<4 x s8>), [[TRUNC1]](<4 x s8>) 5882 ; CI-DS128: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<8 x s8>) 5883 ; VI-LABEL: name: test_load_local_v8s8_align8 5884 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 5885 ; VI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) 5886 ; VI: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[LOAD]](<2 x s32>) 5887 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 5888 ; VI: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[UV]], [[C]](s32) 5889 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 5890 ; VI: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[UV]], [[C1]](s32) 5891 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 5892 ; VI: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[UV]], [[C2]](s32) 5893 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[UV]](s32) 5894 ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32) 5895 ; VI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LSHR1]](s32) 5896 ; VI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LSHR2]](s32) 5897 ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32) 5898 ; VI: [[TRUNC:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[BUILD_VECTOR]](<4 x s32>) 5899 ; VI: [[LSHR3:%[0-9]+]]:_(s32) = G_LSHR [[UV1]], [[C]](s32) 5900 ; VI: [[LSHR4:%[0-9]+]]:_(s32) = G_LSHR [[UV1]], [[C1]](s32) 5901 ; VI: [[LSHR5:%[0-9]+]]:_(s32) = G_LSHR [[UV1]], [[C2]](s32) 5902 ; VI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[UV1]](s32) 5903 ; VI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LSHR3]](s32) 5904 ; VI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LSHR4]](s32) 5905 ; VI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LSHR5]](s32) 5906 ; VI: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32), [[COPY8]](s32) 5907 ; VI: [[TRUNC1:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[BUILD_VECTOR1]](<4 x s32>) 5908 ; VI: [[CONCAT_VECTORS:%[0-9]+]]:_(<8 x s8>) = G_CONCAT_VECTORS [[TRUNC]](<4 x s8>), [[TRUNC1]](<4 x s8>) 5909 ; VI: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<8 x s8>) 5910 ; GFX9-LABEL: name: test_load_local_v8s8_align8 5911 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 5912 ; GFX9: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) 5913 ; GFX9: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[LOAD]](<2 x s32>) 5914 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 5915 ; GFX9: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[UV]], [[C]](s32) 5916 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 5917 ; GFX9: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[UV]], [[C1]](s32) 5918 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 5919 ; GFX9: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[UV]], [[C2]](s32) 5920 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[UV]](s32) 5921 ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32) 5922 ; GFX9: [[BUILD_VECTOR_TRUNC:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC [[COPY1]](s32), [[COPY2]](s32) 5923 ; GFX9: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LSHR1]](s32) 5924 ; GFX9: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LSHR2]](s32) 5925 ; GFX9: [[BUILD_VECTOR_TRUNC1:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC [[COPY3]](s32), [[COPY4]](s32) 5926 ; GFX9: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BUILD_VECTOR_TRUNC]](<2 x s16>), [[BUILD_VECTOR_TRUNC1]](<2 x s16>) 5927 ; GFX9: [[TRUNC:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[CONCAT_VECTORS]](<4 x s16>) 5928 ; GFX9: [[LSHR3:%[0-9]+]]:_(s32) = G_LSHR [[UV1]], [[C]](s32) 5929 ; GFX9: [[LSHR4:%[0-9]+]]:_(s32) = G_LSHR [[UV1]], [[C1]](s32) 5930 ; GFX9: [[LSHR5:%[0-9]+]]:_(s32) = G_LSHR [[UV1]], [[C2]](s32) 5931 ; GFX9: [[COPY5:%[0-9]+]]:_(s32) = COPY [[UV1]](s32) 5932 ; GFX9: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LSHR3]](s32) 5933 ; GFX9: [[BUILD_VECTOR_TRUNC2:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC [[COPY5]](s32), [[COPY6]](s32) 5934 ; GFX9: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LSHR4]](s32) 5935 ; GFX9: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LSHR5]](s32) 5936 ; GFX9: [[BUILD_VECTOR_TRUNC3:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC [[COPY7]](s32), [[COPY8]](s32) 5937 ; GFX9: [[CONCAT_VECTORS1:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BUILD_VECTOR_TRUNC2]](<2 x s16>), [[BUILD_VECTOR_TRUNC3]](<2 x s16>) 5938 ; GFX9: [[TRUNC1:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[CONCAT_VECTORS1]](<4 x s16>) 5939 ; GFX9: [[CONCAT_VECTORS2:%[0-9]+]]:_(<8 x s8>) = G_CONCAT_VECTORS [[TRUNC]](<4 x s8>), [[TRUNC1]](<4 x s8>) 5940 ; GFX9: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS2]](<8 x s8>) 5941 ; GFX9-UNALIGNED-LABEL: name: test_load_local_v8s8_align8 5942 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 5943 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) 5944 ; GFX9-UNALIGNED: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[LOAD]](<2 x s32>) 5945 ; GFX9-UNALIGNED: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 5946 ; GFX9-UNALIGNED: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[UV]], [[C]](s32) 5947 ; GFX9-UNALIGNED: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 5948 ; GFX9-UNALIGNED: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[UV]], [[C1]](s32) 5949 ; GFX9-UNALIGNED: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 5950 ; GFX9-UNALIGNED: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[UV]], [[C2]](s32) 5951 ; GFX9-UNALIGNED: [[COPY1:%[0-9]+]]:_(s32) = COPY [[UV]](s32) 5952 ; GFX9-UNALIGNED: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32) 5953 ; GFX9-UNALIGNED: [[BUILD_VECTOR_TRUNC:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC [[COPY1]](s32), [[COPY2]](s32) 5954 ; GFX9-UNALIGNED: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LSHR1]](s32) 5955 ; GFX9-UNALIGNED: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LSHR2]](s32) 5956 ; GFX9-UNALIGNED: [[BUILD_VECTOR_TRUNC1:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC [[COPY3]](s32), [[COPY4]](s32) 5957 ; GFX9-UNALIGNED: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BUILD_VECTOR_TRUNC]](<2 x s16>), [[BUILD_VECTOR_TRUNC1]](<2 x s16>) 5958 ; GFX9-UNALIGNED: [[TRUNC:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[CONCAT_VECTORS]](<4 x s16>) 5959 ; GFX9-UNALIGNED: [[LSHR3:%[0-9]+]]:_(s32) = G_LSHR [[UV1]], [[C]](s32) 5960 ; GFX9-UNALIGNED: [[LSHR4:%[0-9]+]]:_(s32) = G_LSHR [[UV1]], [[C1]](s32) 5961 ; GFX9-UNALIGNED: [[LSHR5:%[0-9]+]]:_(s32) = G_LSHR [[UV1]], [[C2]](s32) 5962 ; GFX9-UNALIGNED: [[COPY5:%[0-9]+]]:_(s32) = COPY [[UV1]](s32) 5963 ; GFX9-UNALIGNED: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LSHR3]](s32) 5964 ; GFX9-UNALIGNED: [[BUILD_VECTOR_TRUNC2:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC [[COPY5]](s32), [[COPY6]](s32) 5965 ; GFX9-UNALIGNED: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LSHR4]](s32) 5966 ; GFX9-UNALIGNED: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LSHR5]](s32) 5967 ; GFX9-UNALIGNED: [[BUILD_VECTOR_TRUNC3:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC [[COPY7]](s32), [[COPY8]](s32) 5968 ; GFX9-UNALIGNED: [[CONCAT_VECTORS1:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BUILD_VECTOR_TRUNC2]](<2 x s16>), [[BUILD_VECTOR_TRUNC3]](<2 x s16>) 5969 ; GFX9-UNALIGNED: [[TRUNC1:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[CONCAT_VECTORS1]](<4 x s16>) 5970 ; GFX9-UNALIGNED: [[CONCAT_VECTORS2:%[0-9]+]]:_(<8 x s8>) = G_CONCAT_VECTORS [[TRUNC]](<4 x s8>), [[TRUNC1]](<4 x s8>) 5971 ; GFX9-UNALIGNED: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS2]](<8 x s8>) 5972 %0:_(p3) = COPY $vgpr0 5973 %1:_(<8 x s8>) = G_LOAD %0 :: (load 8, align 8, addrspace 3) 5974 $vgpr0_vgpr1 = COPY %1 5975... 5976 5977--- 5978name: test_load_local_v16s8_align16 5979body: | 5980 bb.0: 5981 liveins: $vgpr0 5982 5983 ; SI-LABEL: name: test_load_local_v16s8_align16 5984 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 5985 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 5986 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 5987 ; SI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 5988 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 5989 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 5990 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 5991 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 5992 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 5993 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 5994 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 5995 ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 5996 ; SI: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C3]](s32) 5997 ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 5998 ; SI: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 5999 ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 6000 ; SI: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 6001 ; SI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 6002 ; SI: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 6003 ; SI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 6004 ; SI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 6005 ; SI: [[PTR_ADD7:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 6006 ; SI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p3) :: (load 1 + 8, addrspace 3) 6007 ; SI: [[PTR_ADD8:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 6008 ; SI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p3) :: (load 1 + 9, addrspace 3) 6009 ; SI: [[PTR_ADD9:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 6010 ; SI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p3) :: (load 1 + 10, addrspace 3) 6011 ; SI: [[PTR_ADD10:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 6012 ; SI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p3) :: (load 1 + 11, addrspace 3) 6013 ; SI: [[PTR_ADD11:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C3]](s32) 6014 ; SI: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p3) :: (load 1 + 12, addrspace 3) 6015 ; SI: [[PTR_ADD12:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C]](s32) 6016 ; SI: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p3) :: (load 1 + 13, addrspace 3) 6017 ; SI: [[PTR_ADD13:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C1]](s32) 6018 ; SI: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p3) :: (load 1 + 14, addrspace 3) 6019 ; SI: [[PTR_ADD14:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C2]](s32) 6020 ; SI: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p3) :: (load 1 + 15, addrspace 3) 6021 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 6022 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 6023 ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 6024 ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 6025 ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32) 6026 ; SI: [[TRUNC:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[BUILD_VECTOR]](<4 x s32>) 6027 ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 6028 ; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 6029 ; SI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 6030 ; SI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 6031 ; SI: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32), [[COPY8]](s32) 6032 ; SI: [[TRUNC1:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[BUILD_VECTOR1]](<4 x s32>) 6033 ; SI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 6034 ; SI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 6035 ; SI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 6036 ; SI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 6037 ; SI: [[BUILD_VECTOR2:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32), [[COPY12]](s32) 6038 ; SI: [[TRUNC2:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[BUILD_VECTOR2]](<4 x s32>) 6039 ; SI: [[COPY13:%[0-9]+]]:_(s32) = COPY [[LOAD12]](s32) 6040 ; SI: [[COPY14:%[0-9]+]]:_(s32) = COPY [[LOAD13]](s32) 6041 ; SI: [[COPY15:%[0-9]+]]:_(s32) = COPY [[LOAD14]](s32) 6042 ; SI: [[COPY16:%[0-9]+]]:_(s32) = COPY [[LOAD15]](s32) 6043 ; SI: [[BUILD_VECTOR3:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY13]](s32), [[COPY14]](s32), [[COPY15]](s32), [[COPY16]](s32) 6044 ; SI: [[TRUNC3:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[BUILD_VECTOR3]](<4 x s32>) 6045 ; SI: [[CONCAT_VECTORS:%[0-9]+]]:_(<16 x s8>) = G_CONCAT_VECTORS [[TRUNC]](<4 x s8>), [[TRUNC1]](<4 x s8>), [[TRUNC2]](<4 x s8>), [[TRUNC3]](<4 x s8>) 6046 ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[CONCAT_VECTORS]](<16 x s8>) 6047 ; CI-LABEL: name: test_load_local_v16s8_align16 6048 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 6049 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 6050 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 6051 ; CI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 6052 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 6053 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 6054 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 6055 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 6056 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 6057 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 6058 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 6059 ; CI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 6060 ; CI: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C3]](s32) 6061 ; CI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 6062 ; CI: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 6063 ; CI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 6064 ; CI: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 6065 ; CI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 6066 ; CI: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 6067 ; CI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 6068 ; CI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 6069 ; CI: [[PTR_ADD7:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 6070 ; CI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p3) :: (load 1 + 8, addrspace 3) 6071 ; CI: [[PTR_ADD8:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 6072 ; CI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p3) :: (load 1 + 9, addrspace 3) 6073 ; CI: [[PTR_ADD9:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 6074 ; CI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p3) :: (load 1 + 10, addrspace 3) 6075 ; CI: [[PTR_ADD10:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 6076 ; CI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p3) :: (load 1 + 11, addrspace 3) 6077 ; CI: [[PTR_ADD11:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C3]](s32) 6078 ; CI: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p3) :: (load 1 + 12, addrspace 3) 6079 ; CI: [[PTR_ADD12:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C]](s32) 6080 ; CI: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p3) :: (load 1 + 13, addrspace 3) 6081 ; CI: [[PTR_ADD13:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C1]](s32) 6082 ; CI: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p3) :: (load 1 + 14, addrspace 3) 6083 ; CI: [[PTR_ADD14:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C2]](s32) 6084 ; CI: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p3) :: (load 1 + 15, addrspace 3) 6085 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 6086 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 6087 ; CI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 6088 ; CI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 6089 ; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32) 6090 ; CI: [[TRUNC:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[BUILD_VECTOR]](<4 x s32>) 6091 ; CI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 6092 ; CI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 6093 ; CI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 6094 ; CI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 6095 ; CI: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32), [[COPY8]](s32) 6096 ; CI: [[TRUNC1:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[BUILD_VECTOR1]](<4 x s32>) 6097 ; CI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 6098 ; CI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 6099 ; CI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 6100 ; CI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 6101 ; CI: [[BUILD_VECTOR2:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32), [[COPY12]](s32) 6102 ; CI: [[TRUNC2:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[BUILD_VECTOR2]](<4 x s32>) 6103 ; CI: [[COPY13:%[0-9]+]]:_(s32) = COPY [[LOAD12]](s32) 6104 ; CI: [[COPY14:%[0-9]+]]:_(s32) = COPY [[LOAD13]](s32) 6105 ; CI: [[COPY15:%[0-9]+]]:_(s32) = COPY [[LOAD14]](s32) 6106 ; CI: [[COPY16:%[0-9]+]]:_(s32) = COPY [[LOAD15]](s32) 6107 ; CI: [[BUILD_VECTOR3:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY13]](s32), [[COPY14]](s32), [[COPY15]](s32), [[COPY16]](s32) 6108 ; CI: [[TRUNC3:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[BUILD_VECTOR3]](<4 x s32>) 6109 ; CI: [[CONCAT_VECTORS:%[0-9]+]]:_(<16 x s8>) = G_CONCAT_VECTORS [[TRUNC]](<4 x s8>), [[TRUNC1]](<4 x s8>), [[TRUNC2]](<4 x s8>), [[TRUNC3]](<4 x s8>) 6110 ; CI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[CONCAT_VECTORS]](<16 x s8>) 6111 ; CI-DS128-LABEL: name: test_load_local_v16s8_align16 6112 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 6113 ; CI-DS128: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 6114 ; CI-DS128: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 6115 ; CI-DS128: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 6116 ; CI-DS128: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 6117 ; CI-DS128: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 6118 ; CI-DS128: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 6119 ; CI-DS128: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 6120 ; CI-DS128: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 6121 ; CI-DS128: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 6122 ; CI-DS128: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 6123 ; CI-DS128: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 6124 ; CI-DS128: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C3]](s32) 6125 ; CI-DS128: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 6126 ; CI-DS128: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 6127 ; CI-DS128: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 6128 ; CI-DS128: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 6129 ; CI-DS128: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 6130 ; CI-DS128: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 6131 ; CI-DS128: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 6132 ; CI-DS128: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 6133 ; CI-DS128: [[PTR_ADD7:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 6134 ; CI-DS128: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p3) :: (load 1 + 8, addrspace 3) 6135 ; CI-DS128: [[PTR_ADD8:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 6136 ; CI-DS128: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p3) :: (load 1 + 9, addrspace 3) 6137 ; CI-DS128: [[PTR_ADD9:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 6138 ; CI-DS128: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p3) :: (load 1 + 10, addrspace 3) 6139 ; CI-DS128: [[PTR_ADD10:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 6140 ; CI-DS128: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p3) :: (load 1 + 11, addrspace 3) 6141 ; CI-DS128: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 6142 ; CI-DS128: [[PTR_ADD11:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C5]](s32) 6143 ; CI-DS128: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p3) :: (load 1 + 12, addrspace 3) 6144 ; CI-DS128: [[PTR_ADD12:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C]](s32) 6145 ; CI-DS128: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p3) :: (load 1 + 13, addrspace 3) 6146 ; CI-DS128: [[PTR_ADD13:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C1]](s32) 6147 ; CI-DS128: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p3) :: (load 1 + 14, addrspace 3) 6148 ; CI-DS128: [[PTR_ADD14:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C2]](s32) 6149 ; CI-DS128: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p3) :: (load 1 + 15, addrspace 3) 6150 ; CI-DS128: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 6151 ; CI-DS128: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 6152 ; CI-DS128: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 6153 ; CI-DS128: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 6154 ; CI-DS128: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32) 6155 ; CI-DS128: [[TRUNC:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[BUILD_VECTOR]](<4 x s32>) 6156 ; CI-DS128: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 6157 ; CI-DS128: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 6158 ; CI-DS128: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 6159 ; CI-DS128: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 6160 ; CI-DS128: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32), [[COPY8]](s32) 6161 ; CI-DS128: [[TRUNC1:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[BUILD_VECTOR1]](<4 x s32>) 6162 ; CI-DS128: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 6163 ; CI-DS128: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 6164 ; CI-DS128: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 6165 ; CI-DS128: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 6166 ; CI-DS128: [[BUILD_VECTOR2:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32), [[COPY12]](s32) 6167 ; CI-DS128: [[TRUNC2:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[BUILD_VECTOR2]](<4 x s32>) 6168 ; CI-DS128: [[COPY13:%[0-9]+]]:_(s32) = COPY [[LOAD12]](s32) 6169 ; CI-DS128: [[COPY14:%[0-9]+]]:_(s32) = COPY [[LOAD13]](s32) 6170 ; CI-DS128: [[COPY15:%[0-9]+]]:_(s32) = COPY [[LOAD14]](s32) 6171 ; CI-DS128: [[COPY16:%[0-9]+]]:_(s32) = COPY [[LOAD15]](s32) 6172 ; CI-DS128: [[BUILD_VECTOR3:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY13]](s32), [[COPY14]](s32), [[COPY15]](s32), [[COPY16]](s32) 6173 ; CI-DS128: [[TRUNC3:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[BUILD_VECTOR3]](<4 x s32>) 6174 ; CI-DS128: [[CONCAT_VECTORS:%[0-9]+]]:_(<16 x s8>) = G_CONCAT_VECTORS [[TRUNC]](<4 x s8>), [[TRUNC1]](<4 x s8>), [[TRUNC2]](<4 x s8>), [[TRUNC3]](<4 x s8>) 6175 ; CI-DS128: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[CONCAT_VECTORS]](<16 x s8>) 6176 ; VI-LABEL: name: test_load_local_v16s8_align16 6177 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 6178 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 6179 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 6180 ; VI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 6181 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 6182 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 6183 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 6184 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 6185 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 6186 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 6187 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 6188 ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 6189 ; VI: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C3]](s32) 6190 ; VI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 6191 ; VI: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 6192 ; VI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 6193 ; VI: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 6194 ; VI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 6195 ; VI: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 6196 ; VI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 6197 ; VI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 6198 ; VI: [[PTR_ADD7:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 6199 ; VI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p3) :: (load 1 + 8, addrspace 3) 6200 ; VI: [[PTR_ADD8:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 6201 ; VI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p3) :: (load 1 + 9, addrspace 3) 6202 ; VI: [[PTR_ADD9:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 6203 ; VI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p3) :: (load 1 + 10, addrspace 3) 6204 ; VI: [[PTR_ADD10:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 6205 ; VI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p3) :: (load 1 + 11, addrspace 3) 6206 ; VI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 6207 ; VI: [[PTR_ADD11:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C5]](s32) 6208 ; VI: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p3) :: (load 1 + 12, addrspace 3) 6209 ; VI: [[PTR_ADD12:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C]](s32) 6210 ; VI: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p3) :: (load 1 + 13, addrspace 3) 6211 ; VI: [[PTR_ADD13:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C1]](s32) 6212 ; VI: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p3) :: (load 1 + 14, addrspace 3) 6213 ; VI: [[PTR_ADD14:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C2]](s32) 6214 ; VI: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p3) :: (load 1 + 15, addrspace 3) 6215 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 6216 ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 6217 ; VI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 6218 ; VI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 6219 ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32) 6220 ; VI: [[TRUNC:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[BUILD_VECTOR]](<4 x s32>) 6221 ; VI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 6222 ; VI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 6223 ; VI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 6224 ; VI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 6225 ; VI: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32), [[COPY8]](s32) 6226 ; VI: [[TRUNC1:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[BUILD_VECTOR1]](<4 x s32>) 6227 ; VI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 6228 ; VI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 6229 ; VI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 6230 ; VI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 6231 ; VI: [[BUILD_VECTOR2:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32), [[COPY12]](s32) 6232 ; VI: [[TRUNC2:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[BUILD_VECTOR2]](<4 x s32>) 6233 ; VI: [[COPY13:%[0-9]+]]:_(s32) = COPY [[LOAD12]](s32) 6234 ; VI: [[COPY14:%[0-9]+]]:_(s32) = COPY [[LOAD13]](s32) 6235 ; VI: [[COPY15:%[0-9]+]]:_(s32) = COPY [[LOAD14]](s32) 6236 ; VI: [[COPY16:%[0-9]+]]:_(s32) = COPY [[LOAD15]](s32) 6237 ; VI: [[BUILD_VECTOR3:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY13]](s32), [[COPY14]](s32), [[COPY15]](s32), [[COPY16]](s32) 6238 ; VI: [[TRUNC3:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[BUILD_VECTOR3]](<4 x s32>) 6239 ; VI: [[CONCAT_VECTORS:%[0-9]+]]:_(<16 x s8>) = G_CONCAT_VECTORS [[TRUNC]](<4 x s8>), [[TRUNC1]](<4 x s8>), [[TRUNC2]](<4 x s8>), [[TRUNC3]](<4 x s8>) 6240 ; VI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[CONCAT_VECTORS]](<16 x s8>) 6241 ; GFX9-LABEL: name: test_load_local_v16s8_align16 6242 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 6243 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 6244 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 6245 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 6246 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 6247 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 6248 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 6249 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 6250 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 6251 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 6252 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 6253 ; GFX9: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 6254 ; GFX9: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C3]](s32) 6255 ; GFX9: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 6256 ; GFX9: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 6257 ; GFX9: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 6258 ; GFX9: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 6259 ; GFX9: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 6260 ; GFX9: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 6261 ; GFX9: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 6262 ; GFX9: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 6263 ; GFX9: [[PTR_ADD7:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 6264 ; GFX9: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p3) :: (load 1 + 8, addrspace 3) 6265 ; GFX9: [[PTR_ADD8:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 6266 ; GFX9: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p3) :: (load 1 + 9, addrspace 3) 6267 ; GFX9: [[PTR_ADD9:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 6268 ; GFX9: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p3) :: (load 1 + 10, addrspace 3) 6269 ; GFX9: [[PTR_ADD10:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 6270 ; GFX9: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p3) :: (load 1 + 11, addrspace 3) 6271 ; GFX9: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 6272 ; GFX9: [[PTR_ADD11:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C5]](s32) 6273 ; GFX9: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p3) :: (load 1 + 12, addrspace 3) 6274 ; GFX9: [[PTR_ADD12:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C]](s32) 6275 ; GFX9: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p3) :: (load 1 + 13, addrspace 3) 6276 ; GFX9: [[PTR_ADD13:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C1]](s32) 6277 ; GFX9: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p3) :: (load 1 + 14, addrspace 3) 6278 ; GFX9: [[PTR_ADD14:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C2]](s32) 6279 ; GFX9: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p3) :: (load 1 + 15, addrspace 3) 6280 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 6281 ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 6282 ; GFX9: [[BUILD_VECTOR_TRUNC:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC [[COPY1]](s32), [[COPY2]](s32) 6283 ; GFX9: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 6284 ; GFX9: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 6285 ; GFX9: [[BUILD_VECTOR_TRUNC1:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC [[COPY3]](s32), [[COPY4]](s32) 6286 ; GFX9: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BUILD_VECTOR_TRUNC]](<2 x s16>), [[BUILD_VECTOR_TRUNC1]](<2 x s16>) 6287 ; GFX9: [[TRUNC:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[CONCAT_VECTORS]](<4 x s16>) 6288 ; GFX9: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 6289 ; GFX9: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 6290 ; GFX9: [[BUILD_VECTOR_TRUNC2:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC [[COPY5]](s32), [[COPY6]](s32) 6291 ; GFX9: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 6292 ; GFX9: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 6293 ; GFX9: [[BUILD_VECTOR_TRUNC3:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC [[COPY7]](s32), [[COPY8]](s32) 6294 ; GFX9: [[CONCAT_VECTORS1:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BUILD_VECTOR_TRUNC2]](<2 x s16>), [[BUILD_VECTOR_TRUNC3]](<2 x s16>) 6295 ; GFX9: [[TRUNC1:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[CONCAT_VECTORS1]](<4 x s16>) 6296 ; GFX9: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 6297 ; GFX9: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 6298 ; GFX9: [[BUILD_VECTOR_TRUNC4:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC [[COPY9]](s32), [[COPY10]](s32) 6299 ; GFX9: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 6300 ; GFX9: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 6301 ; GFX9: [[BUILD_VECTOR_TRUNC5:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC [[COPY11]](s32), [[COPY12]](s32) 6302 ; GFX9: [[CONCAT_VECTORS2:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BUILD_VECTOR_TRUNC4]](<2 x s16>), [[BUILD_VECTOR_TRUNC5]](<2 x s16>) 6303 ; GFX9: [[TRUNC2:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[CONCAT_VECTORS2]](<4 x s16>) 6304 ; GFX9: [[COPY13:%[0-9]+]]:_(s32) = COPY [[LOAD12]](s32) 6305 ; GFX9: [[COPY14:%[0-9]+]]:_(s32) = COPY [[LOAD13]](s32) 6306 ; GFX9: [[BUILD_VECTOR_TRUNC6:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC [[COPY13]](s32), [[COPY14]](s32) 6307 ; GFX9: [[COPY15:%[0-9]+]]:_(s32) = COPY [[LOAD14]](s32) 6308 ; GFX9: [[COPY16:%[0-9]+]]:_(s32) = COPY [[LOAD15]](s32) 6309 ; GFX9: [[BUILD_VECTOR_TRUNC7:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC [[COPY15]](s32), [[COPY16]](s32) 6310 ; GFX9: [[CONCAT_VECTORS3:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BUILD_VECTOR_TRUNC6]](<2 x s16>), [[BUILD_VECTOR_TRUNC7]](<2 x s16>) 6311 ; GFX9: [[TRUNC3:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[CONCAT_VECTORS3]](<4 x s16>) 6312 ; GFX9: [[CONCAT_VECTORS4:%[0-9]+]]:_(<16 x s8>) = G_CONCAT_VECTORS [[TRUNC]](<4 x s8>), [[TRUNC1]](<4 x s8>), [[TRUNC2]](<4 x s8>), [[TRUNC3]](<4 x s8>) 6313 ; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[CONCAT_VECTORS4]](<16 x s8>) 6314 ; GFX9-UNALIGNED-LABEL: name: test_load_local_v16s8_align16 6315 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 6316 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[COPY]](p3) :: (load 16, align 1, addrspace 3) 6317 ; GFX9-UNALIGNED: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[LOAD]](<4 x s32>) 6318 ; GFX9-UNALIGNED: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 6319 ; GFX9-UNALIGNED: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[UV]], [[C]](s32) 6320 ; GFX9-UNALIGNED: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 6321 ; GFX9-UNALIGNED: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[UV]], [[C1]](s32) 6322 ; GFX9-UNALIGNED: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 6323 ; GFX9-UNALIGNED: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[UV]], [[C2]](s32) 6324 ; GFX9-UNALIGNED: [[COPY1:%[0-9]+]]:_(s32) = COPY [[UV]](s32) 6325 ; GFX9-UNALIGNED: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32) 6326 ; GFX9-UNALIGNED: [[BUILD_VECTOR_TRUNC:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC [[COPY1]](s32), [[COPY2]](s32) 6327 ; GFX9-UNALIGNED: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LSHR1]](s32) 6328 ; GFX9-UNALIGNED: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LSHR2]](s32) 6329 ; GFX9-UNALIGNED: [[BUILD_VECTOR_TRUNC1:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC [[COPY3]](s32), [[COPY4]](s32) 6330 ; GFX9-UNALIGNED: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BUILD_VECTOR_TRUNC]](<2 x s16>), [[BUILD_VECTOR_TRUNC1]](<2 x s16>) 6331 ; GFX9-UNALIGNED: [[TRUNC:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[CONCAT_VECTORS]](<4 x s16>) 6332 ; GFX9-UNALIGNED: [[LSHR3:%[0-9]+]]:_(s32) = G_LSHR [[UV1]], [[C]](s32) 6333 ; GFX9-UNALIGNED: [[LSHR4:%[0-9]+]]:_(s32) = G_LSHR [[UV1]], [[C1]](s32) 6334 ; GFX9-UNALIGNED: [[LSHR5:%[0-9]+]]:_(s32) = G_LSHR [[UV1]], [[C2]](s32) 6335 ; GFX9-UNALIGNED: [[COPY5:%[0-9]+]]:_(s32) = COPY [[UV1]](s32) 6336 ; GFX9-UNALIGNED: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LSHR3]](s32) 6337 ; GFX9-UNALIGNED: [[BUILD_VECTOR_TRUNC2:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC [[COPY5]](s32), [[COPY6]](s32) 6338 ; GFX9-UNALIGNED: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LSHR4]](s32) 6339 ; GFX9-UNALIGNED: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LSHR5]](s32) 6340 ; GFX9-UNALIGNED: [[BUILD_VECTOR_TRUNC3:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC [[COPY7]](s32), [[COPY8]](s32) 6341 ; GFX9-UNALIGNED: [[CONCAT_VECTORS1:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BUILD_VECTOR_TRUNC2]](<2 x s16>), [[BUILD_VECTOR_TRUNC3]](<2 x s16>) 6342 ; GFX9-UNALIGNED: [[TRUNC1:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[CONCAT_VECTORS1]](<4 x s16>) 6343 ; GFX9-UNALIGNED: [[LSHR6:%[0-9]+]]:_(s32) = G_LSHR [[UV2]], [[C]](s32) 6344 ; GFX9-UNALIGNED: [[LSHR7:%[0-9]+]]:_(s32) = G_LSHR [[UV2]], [[C1]](s32) 6345 ; GFX9-UNALIGNED: [[LSHR8:%[0-9]+]]:_(s32) = G_LSHR [[UV2]], [[C2]](s32) 6346 ; GFX9-UNALIGNED: [[COPY9:%[0-9]+]]:_(s32) = COPY [[UV2]](s32) 6347 ; GFX9-UNALIGNED: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LSHR6]](s32) 6348 ; GFX9-UNALIGNED: [[BUILD_VECTOR_TRUNC4:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC [[COPY9]](s32), [[COPY10]](s32) 6349 ; GFX9-UNALIGNED: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LSHR7]](s32) 6350 ; GFX9-UNALIGNED: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LSHR8]](s32) 6351 ; GFX9-UNALIGNED: [[BUILD_VECTOR_TRUNC5:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC [[COPY11]](s32), [[COPY12]](s32) 6352 ; GFX9-UNALIGNED: [[CONCAT_VECTORS2:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BUILD_VECTOR_TRUNC4]](<2 x s16>), [[BUILD_VECTOR_TRUNC5]](<2 x s16>) 6353 ; GFX9-UNALIGNED: [[TRUNC2:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[CONCAT_VECTORS2]](<4 x s16>) 6354 ; GFX9-UNALIGNED: [[LSHR9:%[0-9]+]]:_(s32) = G_LSHR [[UV3]], [[C]](s32) 6355 ; GFX9-UNALIGNED: [[LSHR10:%[0-9]+]]:_(s32) = G_LSHR [[UV3]], [[C1]](s32) 6356 ; GFX9-UNALIGNED: [[LSHR11:%[0-9]+]]:_(s32) = G_LSHR [[UV3]], [[C2]](s32) 6357 ; GFX9-UNALIGNED: [[COPY13:%[0-9]+]]:_(s32) = COPY [[UV3]](s32) 6358 ; GFX9-UNALIGNED: [[COPY14:%[0-9]+]]:_(s32) = COPY [[LSHR9]](s32) 6359 ; GFX9-UNALIGNED: [[BUILD_VECTOR_TRUNC6:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC [[COPY13]](s32), [[COPY14]](s32) 6360 ; GFX9-UNALIGNED: [[COPY15:%[0-9]+]]:_(s32) = COPY [[LSHR10]](s32) 6361 ; GFX9-UNALIGNED: [[COPY16:%[0-9]+]]:_(s32) = COPY [[LSHR11]](s32) 6362 ; GFX9-UNALIGNED: [[BUILD_VECTOR_TRUNC7:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC [[COPY15]](s32), [[COPY16]](s32) 6363 ; GFX9-UNALIGNED: [[CONCAT_VECTORS3:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BUILD_VECTOR_TRUNC6]](<2 x s16>), [[BUILD_VECTOR_TRUNC7]](<2 x s16>) 6364 ; GFX9-UNALIGNED: [[TRUNC3:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[CONCAT_VECTORS3]](<4 x s16>) 6365 ; GFX9-UNALIGNED: [[CONCAT_VECTORS4:%[0-9]+]]:_(<16 x s8>) = G_CONCAT_VECTORS [[TRUNC]](<4 x s8>), [[TRUNC1]](<4 x s8>), [[TRUNC2]](<4 x s8>), [[TRUNC3]](<4 x s8>) 6366 ; GFX9-UNALIGNED: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[CONCAT_VECTORS4]](<16 x s8>) 6367 %0:_(p3) = COPY $vgpr0 6368 %1:_(<16 x s8>) = G_LOAD %0 :: (load 16, align 1, addrspace 3) 6369 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1 6370... 6371 6372--- 6373name: test_load_local_v2s16_align4 6374body: | 6375 bb.0: 6376 liveins: $vgpr0 6377 6378 ; SI-LABEL: name: test_load_local_v2s16_align4 6379 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 6380 ; SI: [[LOAD:%[0-9]+]]:_(<2 x s16>) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) 6381 ; SI: $vgpr0 = COPY [[LOAD]](<2 x s16>) 6382 ; CI-LABEL: name: test_load_local_v2s16_align4 6383 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 6384 ; CI: [[LOAD:%[0-9]+]]:_(<2 x s16>) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) 6385 ; CI: $vgpr0 = COPY [[LOAD]](<2 x s16>) 6386 ; CI-DS128-LABEL: name: test_load_local_v2s16_align4 6387 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 6388 ; CI-DS128: [[LOAD:%[0-9]+]]:_(<2 x s16>) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) 6389 ; CI-DS128: $vgpr0 = COPY [[LOAD]](<2 x s16>) 6390 ; VI-LABEL: name: test_load_local_v2s16_align4 6391 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 6392 ; VI: [[LOAD:%[0-9]+]]:_(<2 x s16>) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) 6393 ; VI: $vgpr0 = COPY [[LOAD]](<2 x s16>) 6394 ; GFX9-LABEL: name: test_load_local_v2s16_align4 6395 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 6396 ; GFX9: [[LOAD:%[0-9]+]]:_(<2 x s16>) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) 6397 ; GFX9: $vgpr0 = COPY [[LOAD]](<2 x s16>) 6398 ; GFX9-UNALIGNED-LABEL: name: test_load_local_v2s16_align4 6399 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 6400 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(<2 x s16>) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) 6401 ; GFX9-UNALIGNED: $vgpr0 = COPY [[LOAD]](<2 x s16>) 6402 %0:_(p3) = COPY $vgpr0 6403 %1:_(<2 x s16>) = G_LOAD %0 :: (load 4, align 4, addrspace 3) 6404 $vgpr0 = COPY %1 6405... 6406 6407--- 6408name: test_load_local_v2s16_align2 6409body: | 6410 bb.0: 6411 liveins: $vgpr0 6412 6413 ; SI-LABEL: name: test_load_local_v2s16_align2 6414 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 6415 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 6416 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 6417 ; SI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 6418 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 6419 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 6420 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 6421 ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 6422 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 6423 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 6424 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 6425 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 6426 ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 6427 ; SI: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32) 6428 ; SI: $vgpr0 = COPY [[BITCAST]](<2 x s16>) 6429 ; CI-LABEL: name: test_load_local_v2s16_align2 6430 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 6431 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 6432 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 6433 ; CI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 6434 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 6435 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 6436 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 6437 ; CI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 6438 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 6439 ; CI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 6440 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 6441 ; CI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 6442 ; CI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 6443 ; CI: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32) 6444 ; CI: $vgpr0 = COPY [[BITCAST]](<2 x s16>) 6445 ; CI-DS128-LABEL: name: test_load_local_v2s16_align2 6446 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 6447 ; CI-DS128: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 6448 ; CI-DS128: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 6449 ; CI-DS128: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 6450 ; CI-DS128: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 6451 ; CI-DS128: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 6452 ; CI-DS128: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 6453 ; CI-DS128: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 6454 ; CI-DS128: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 6455 ; CI-DS128: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 6456 ; CI-DS128: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 6457 ; CI-DS128: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 6458 ; CI-DS128: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 6459 ; CI-DS128: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32) 6460 ; CI-DS128: $vgpr0 = COPY [[BITCAST]](<2 x s16>) 6461 ; VI-LABEL: name: test_load_local_v2s16_align2 6462 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 6463 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 6464 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 6465 ; VI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 6466 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 6467 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 6468 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 6469 ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 6470 ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 6471 ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 6472 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 6473 ; VI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 6474 ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 6475 ; VI: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32) 6476 ; VI: $vgpr0 = COPY [[BITCAST]](<2 x s16>) 6477 ; GFX9-LABEL: name: test_load_local_v2s16_align2 6478 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 6479 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 6480 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 6481 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 6482 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 6483 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 6484 ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 6485 ; GFX9: [[BUILD_VECTOR_TRUNC:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC [[COPY1]](s32), [[COPY2]](s32) 6486 ; GFX9: $vgpr0 = COPY [[BUILD_VECTOR_TRUNC]](<2 x s16>) 6487 ; GFX9-UNALIGNED-LABEL: name: test_load_local_v2s16_align2 6488 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 6489 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(<2 x s16>) = G_LOAD [[COPY]](p3) :: (load 4, align 2, addrspace 3) 6490 ; GFX9-UNALIGNED: $vgpr0 = COPY [[LOAD]](<2 x s16>) 6491 %0:_(p3) = COPY $vgpr0 6492 %1:_(<2 x s16>) = G_LOAD %0 :: (load 4, align 2, addrspace 3) 6493 $vgpr0 = COPY %1 6494... 6495 6496--- 6497name: test_load_local_v2s16_align1 6498body: | 6499 bb.0: 6500 liveins: $vgpr0 6501 6502 ; SI-LABEL: name: test_load_local_v2s16_align1 6503 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 6504 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 6505 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 6506 ; SI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 6507 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 6508 ; SI: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 6509 ; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) 6510 ; SI: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C1]] 6511 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 6512 ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 6513 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 6514 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 6515 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 6516 ; SI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[SHL]](s32) 6517 ; SI: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[TRUNC1]] 6518 ; SI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 6519 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 6520 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 6521 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 6522 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 6523 ; SI: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) 6524 ; SI: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C1]] 6525 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[C2]](s32) 6526 ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 6527 ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 6528 ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[COPY2]](s32) 6529 ; SI: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[SHL1]](s32) 6530 ; SI: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[TRUNC3]] 6531 ; SI: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[OR]](s16) 6532 ; SI: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[OR1]](s16) 6533 ; SI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 6534 ; SI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[ZEXT1]], [[C5]](s32) 6535 ; SI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL2]] 6536 ; SI: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR2]](s32) 6537 ; SI: $vgpr0 = COPY [[BITCAST]](<2 x s16>) 6538 ; CI-LABEL: name: test_load_local_v2s16_align1 6539 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 6540 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 6541 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 6542 ; CI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 6543 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 6544 ; CI: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 6545 ; CI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) 6546 ; CI: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C1]] 6547 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 6548 ; CI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 6549 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 6550 ; CI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 6551 ; CI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 6552 ; CI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[SHL]](s32) 6553 ; CI: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[TRUNC1]] 6554 ; CI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 6555 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 6556 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 6557 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 6558 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 6559 ; CI: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) 6560 ; CI: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C1]] 6561 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[C2]](s32) 6562 ; CI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 6563 ; CI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 6564 ; CI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[COPY2]](s32) 6565 ; CI: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[SHL1]](s32) 6566 ; CI: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[TRUNC3]] 6567 ; CI: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[OR]](s16) 6568 ; CI: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[OR1]](s16) 6569 ; CI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 6570 ; CI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[ZEXT1]], [[C5]](s32) 6571 ; CI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL2]] 6572 ; CI: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR2]](s32) 6573 ; CI: $vgpr0 = COPY [[BITCAST]](<2 x s16>) 6574 ; CI-DS128-LABEL: name: test_load_local_v2s16_align1 6575 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 6576 ; CI-DS128: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 6577 ; CI-DS128: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 6578 ; CI-DS128: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 6579 ; CI-DS128: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 6580 ; CI-DS128: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 6581 ; CI-DS128: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) 6582 ; CI-DS128: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C1]] 6583 ; CI-DS128: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 6584 ; CI-DS128: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 6585 ; CI-DS128: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 6586 ; CI-DS128: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 6587 ; CI-DS128: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 6588 ; CI-DS128: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[SHL]](s32) 6589 ; CI-DS128: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[TRUNC1]] 6590 ; CI-DS128: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 6591 ; CI-DS128: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 6592 ; CI-DS128: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 6593 ; CI-DS128: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 6594 ; CI-DS128: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 6595 ; CI-DS128: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) 6596 ; CI-DS128: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C1]] 6597 ; CI-DS128: [[COPY2:%[0-9]+]]:_(s32) = COPY [[C2]](s32) 6598 ; CI-DS128: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 6599 ; CI-DS128: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 6600 ; CI-DS128: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[COPY2]](s32) 6601 ; CI-DS128: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[SHL1]](s32) 6602 ; CI-DS128: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[TRUNC3]] 6603 ; CI-DS128: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[OR]](s16) 6604 ; CI-DS128: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[OR1]](s16) 6605 ; CI-DS128: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 6606 ; CI-DS128: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[ZEXT1]], [[C5]](s32) 6607 ; CI-DS128: [[OR2:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL2]] 6608 ; CI-DS128: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR2]](s32) 6609 ; CI-DS128: $vgpr0 = COPY [[BITCAST]](<2 x s16>) 6610 ; VI-LABEL: name: test_load_local_v2s16_align1 6611 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 6612 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 6613 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 6614 ; VI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 6615 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 6616 ; VI: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 6617 ; VI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) 6618 ; VI: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C1]] 6619 ; VI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD1]](s32) 6620 ; VI: [[AND1:%[0-9]+]]:_(s16) = G_AND [[TRUNC1]], [[C1]] 6621 ; VI: [[C2:%[0-9]+]]:_(s16) = G_CONSTANT i16 8 6622 ; VI: [[SHL:%[0-9]+]]:_(s16) = G_SHL [[AND1]], [[C2]](s16) 6623 ; VI: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[SHL]] 6624 ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 6625 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C3]](s32) 6626 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 6627 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 6628 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 6629 ; VI: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) 6630 ; VI: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C1]] 6631 ; VI: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD3]](s32) 6632 ; VI: [[AND3:%[0-9]+]]:_(s16) = G_AND [[TRUNC3]], [[C1]] 6633 ; VI: [[SHL1:%[0-9]+]]:_(s16) = G_SHL [[AND3]], [[C2]](s16) 6634 ; VI: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[SHL1]] 6635 ; VI: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[OR]](s16) 6636 ; VI: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[OR1]](s16) 6637 ; VI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 6638 ; VI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[ZEXT1]], [[C4]](s32) 6639 ; VI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL2]] 6640 ; VI: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR2]](s32) 6641 ; VI: $vgpr0 = COPY [[BITCAST]](<2 x s16>) 6642 ; GFX9-LABEL: name: test_load_local_v2s16_align1 6643 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 6644 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 6645 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 6646 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 6647 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 6648 ; GFX9: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 6649 ; GFX9: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) 6650 ; GFX9: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C1]] 6651 ; GFX9: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD1]](s32) 6652 ; GFX9: [[AND1:%[0-9]+]]:_(s16) = G_AND [[TRUNC1]], [[C1]] 6653 ; GFX9: [[C2:%[0-9]+]]:_(s16) = G_CONSTANT i16 8 6654 ; GFX9: [[SHL:%[0-9]+]]:_(s16) = G_SHL [[AND1]], [[C2]](s16) 6655 ; GFX9: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[SHL]] 6656 ; GFX9: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 6657 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C3]](s32) 6658 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 6659 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 6660 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 6661 ; GFX9: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) 6662 ; GFX9: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C1]] 6663 ; GFX9: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD3]](s32) 6664 ; GFX9: [[AND3:%[0-9]+]]:_(s16) = G_AND [[TRUNC3]], [[C1]] 6665 ; GFX9: [[SHL1:%[0-9]+]]:_(s16) = G_SHL [[AND3]], [[C2]](s16) 6666 ; GFX9: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[SHL1]] 6667 ; GFX9: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[OR]](s16) 6668 ; GFX9: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[OR1]](s16) 6669 ; GFX9: [[BUILD_VECTOR_TRUNC:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC [[ANYEXT]](s32), [[ANYEXT1]](s32) 6670 ; GFX9: $vgpr0 = COPY [[BUILD_VECTOR_TRUNC]](<2 x s16>) 6671 ; GFX9-UNALIGNED-LABEL: name: test_load_local_v2s16_align1 6672 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 6673 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(<2 x s16>) = G_LOAD [[COPY]](p3) :: (load 4, align 1, addrspace 3) 6674 ; GFX9-UNALIGNED: $vgpr0 = COPY [[LOAD]](<2 x s16>) 6675 %0:_(p3) = COPY $vgpr0 6676 %1:_(<2 x s16>) = G_LOAD %0 :: (load 4, align 1, addrspace 3) 6677 $vgpr0 = COPY %1 6678... 6679 6680--- 6681name: test_load_local_v3s16_align8 6682body: | 6683 bb.0: 6684 liveins: $vgpr0 6685 6686 ; SI-LABEL: name: test_load_local_v3s16_align8 6687 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 6688 ; SI: [[LOAD:%[0-9]+]]:_(<4 x s16>) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) 6689 ; SI: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 6690 ; SI: [[CONCAT_VECTORS:%[0-9]+]]:_(<12 x s16>) = G_CONCAT_VECTORS [[LOAD]](<4 x s16>), [[DEF]](<4 x s16>), [[DEF]](<4 x s16>) 6691 ; SI: [[UV:%[0-9]+]]:_(<3 x s16>), [[UV1:%[0-9]+]]:_(<3 x s16>), [[UV2:%[0-9]+]]:_(<3 x s16>), [[UV3:%[0-9]+]]:_(<3 x s16>) = G_UNMERGE_VALUES [[CONCAT_VECTORS]](<12 x s16>) 6692 ; SI: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[UV]](<3 x s16>), 0 6693 ; SI: $vgpr0_vgpr1 = COPY [[INSERT]](<4 x s16>) 6694 ; CI-LABEL: name: test_load_local_v3s16_align8 6695 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 6696 ; CI: [[LOAD:%[0-9]+]]:_(<4 x s16>) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) 6697 ; CI: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 6698 ; CI: [[CONCAT_VECTORS:%[0-9]+]]:_(<12 x s16>) = G_CONCAT_VECTORS [[LOAD]](<4 x s16>), [[DEF]](<4 x s16>), [[DEF]](<4 x s16>) 6699 ; CI: [[UV:%[0-9]+]]:_(<3 x s16>), [[UV1:%[0-9]+]]:_(<3 x s16>), [[UV2:%[0-9]+]]:_(<3 x s16>), [[UV3:%[0-9]+]]:_(<3 x s16>) = G_UNMERGE_VALUES [[CONCAT_VECTORS]](<12 x s16>) 6700 ; CI: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[UV]](<3 x s16>), 0 6701 ; CI: $vgpr0_vgpr1 = COPY [[INSERT]](<4 x s16>) 6702 ; CI-DS128-LABEL: name: test_load_local_v3s16_align8 6703 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 6704 ; CI-DS128: [[LOAD:%[0-9]+]]:_(<4 x s16>) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) 6705 ; CI-DS128: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 6706 ; CI-DS128: [[CONCAT_VECTORS:%[0-9]+]]:_(<12 x s16>) = G_CONCAT_VECTORS [[LOAD]](<4 x s16>), [[DEF]](<4 x s16>), [[DEF]](<4 x s16>) 6707 ; CI-DS128: [[UV:%[0-9]+]]:_(<3 x s16>), [[UV1:%[0-9]+]]:_(<3 x s16>), [[UV2:%[0-9]+]]:_(<3 x s16>), [[UV3:%[0-9]+]]:_(<3 x s16>) = G_UNMERGE_VALUES [[CONCAT_VECTORS]](<12 x s16>) 6708 ; CI-DS128: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[UV]](<3 x s16>), 0 6709 ; CI-DS128: $vgpr0_vgpr1 = COPY [[INSERT]](<4 x s16>) 6710 ; VI-LABEL: name: test_load_local_v3s16_align8 6711 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 6712 ; VI: [[LOAD:%[0-9]+]]:_(<4 x s16>) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) 6713 ; VI: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 6714 ; VI: [[CONCAT_VECTORS:%[0-9]+]]:_(<12 x s16>) = G_CONCAT_VECTORS [[LOAD]](<4 x s16>), [[DEF]](<4 x s16>), [[DEF]](<4 x s16>) 6715 ; VI: [[UV:%[0-9]+]]:_(<3 x s16>), [[UV1:%[0-9]+]]:_(<3 x s16>), [[UV2:%[0-9]+]]:_(<3 x s16>), [[UV3:%[0-9]+]]:_(<3 x s16>) = G_UNMERGE_VALUES [[CONCAT_VECTORS]](<12 x s16>) 6716 ; VI: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[UV]](<3 x s16>), 0 6717 ; VI: $vgpr0_vgpr1 = COPY [[INSERT]](<4 x s16>) 6718 ; GFX9-LABEL: name: test_load_local_v3s16_align8 6719 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 6720 ; GFX9: [[LOAD:%[0-9]+]]:_(<4 x s16>) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) 6721 ; GFX9: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 6722 ; GFX9: [[CONCAT_VECTORS:%[0-9]+]]:_(<12 x s16>) = G_CONCAT_VECTORS [[LOAD]](<4 x s16>), [[DEF]](<4 x s16>), [[DEF]](<4 x s16>) 6723 ; GFX9: [[UV:%[0-9]+]]:_(<3 x s16>), [[UV1:%[0-9]+]]:_(<3 x s16>), [[UV2:%[0-9]+]]:_(<3 x s16>), [[UV3:%[0-9]+]]:_(<3 x s16>) = G_UNMERGE_VALUES [[CONCAT_VECTORS]](<12 x s16>) 6724 ; GFX9: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[UV]](<3 x s16>), 0 6725 ; GFX9: $vgpr0_vgpr1 = COPY [[INSERT]](<4 x s16>) 6726 ; GFX9-UNALIGNED-LABEL: name: test_load_local_v3s16_align8 6727 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 6728 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(<4 x s16>) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) 6729 ; GFX9-UNALIGNED: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 6730 ; GFX9-UNALIGNED: [[CONCAT_VECTORS:%[0-9]+]]:_(<12 x s16>) = G_CONCAT_VECTORS [[LOAD]](<4 x s16>), [[DEF]](<4 x s16>), [[DEF]](<4 x s16>) 6731 ; GFX9-UNALIGNED: [[UV:%[0-9]+]]:_(<3 x s16>), [[UV1:%[0-9]+]]:_(<3 x s16>), [[UV2:%[0-9]+]]:_(<3 x s16>), [[UV3:%[0-9]+]]:_(<3 x s16>) = G_UNMERGE_VALUES [[CONCAT_VECTORS]](<12 x s16>) 6732 ; GFX9-UNALIGNED: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[UV]](<3 x s16>), 0 6733 ; GFX9-UNALIGNED: $vgpr0_vgpr1 = COPY [[INSERT]](<4 x s16>) 6734 %0:_(p3) = COPY $vgpr0 6735 %1:_(<3 x s16>) = G_LOAD %0 :: (load 6, align 8, addrspace 3) 6736 %2:_(<4 x s16>) = G_IMPLICIT_DEF 6737 %3:_(<4 x s16>) = G_INSERT %2, %1, 0 6738 $vgpr0_vgpr1 = COPY %3 6739... 6740 6741--- 6742name: test_load_local_v3s16_align2 6743body: | 6744 bb.0: 6745 liveins: $vgpr0 6746 6747 ; SI-LABEL: name: test_load_local_v3s16_align2 6748 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 6749 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 6750 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 6751 ; SI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 6752 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 6753 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 6754 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 6755 ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 6756 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 6757 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 6758 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 6759 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 6760 ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 6761 ; SI: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32) 6762 ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 6763 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C3]](s32) 6764 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 2 + 4, addrspace 3) 6765 ; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) 6766 ; SI: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 6767 ; SI: [[DEF1:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 6768 ; SI: [[CONCAT_VECTORS:%[0-9]+]]:_(<12 x s16>) = G_CONCAT_VECTORS [[DEF]](<4 x s16>), [[DEF1]](<4 x s16>), [[DEF1]](<4 x s16>) 6769 ; SI: [[UV:%[0-9]+]]:_(<3 x s16>), [[UV1:%[0-9]+]]:_(<3 x s16>), [[UV2:%[0-9]+]]:_(<3 x s16>), [[UV3:%[0-9]+]]:_(<3 x s16>) = G_UNMERGE_VALUES [[CONCAT_VECTORS]](<12 x s16>) 6770 ; SI: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[UV]](<3 x s16>), 0 6771 ; SI: [[INSERT1:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[INSERT]], [[BITCAST]](<2 x s16>), 0 6772 ; SI: [[CONCAT_VECTORS1:%[0-9]+]]:_(<12 x s16>) = G_CONCAT_VECTORS [[INSERT1]](<4 x s16>), [[DEF1]](<4 x s16>), [[DEF1]](<4 x s16>) 6773 ; SI: [[UV4:%[0-9]+]]:_(<3 x s16>), [[UV5:%[0-9]+]]:_(<3 x s16>), [[UV6:%[0-9]+]]:_(<3 x s16>), [[UV7:%[0-9]+]]:_(<3 x s16>) = G_UNMERGE_VALUES [[CONCAT_VECTORS1]](<12 x s16>) 6774 ; SI: [[INSERT2:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[UV4]](<3 x s16>), 0 6775 ; SI: [[INSERT3:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[INSERT2]], [[TRUNC]](s16), 32 6776 ; SI: [[CONCAT_VECTORS2:%[0-9]+]]:_(<12 x s16>) = G_CONCAT_VECTORS [[INSERT3]](<4 x s16>), [[DEF1]](<4 x s16>), [[DEF1]](<4 x s16>) 6777 ; SI: [[UV8:%[0-9]+]]:_(<3 x s16>), [[UV9:%[0-9]+]]:_(<3 x s16>), [[UV10:%[0-9]+]]:_(<3 x s16>), [[UV11:%[0-9]+]]:_(<3 x s16>) = G_UNMERGE_VALUES [[CONCAT_VECTORS2]](<12 x s16>) 6778 ; SI: [[INSERT4:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[UV8]](<3 x s16>), 0 6779 ; SI: $vgpr0_vgpr1 = COPY [[INSERT4]](<4 x s16>) 6780 ; CI-LABEL: name: test_load_local_v3s16_align2 6781 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 6782 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 6783 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 6784 ; CI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 6785 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 6786 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 6787 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 6788 ; CI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 6789 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 6790 ; CI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 6791 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 6792 ; CI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 6793 ; CI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 6794 ; CI: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32) 6795 ; CI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 6796 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C3]](s32) 6797 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 2 + 4, addrspace 3) 6798 ; CI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) 6799 ; CI: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 6800 ; CI: [[DEF1:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 6801 ; CI: [[CONCAT_VECTORS:%[0-9]+]]:_(<12 x s16>) = G_CONCAT_VECTORS [[DEF]](<4 x s16>), [[DEF1]](<4 x s16>), [[DEF1]](<4 x s16>) 6802 ; CI: [[UV:%[0-9]+]]:_(<3 x s16>), [[UV1:%[0-9]+]]:_(<3 x s16>), [[UV2:%[0-9]+]]:_(<3 x s16>), [[UV3:%[0-9]+]]:_(<3 x s16>) = G_UNMERGE_VALUES [[CONCAT_VECTORS]](<12 x s16>) 6803 ; CI: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[UV]](<3 x s16>), 0 6804 ; CI: [[INSERT1:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[INSERT]], [[BITCAST]](<2 x s16>), 0 6805 ; CI: [[CONCAT_VECTORS1:%[0-9]+]]:_(<12 x s16>) = G_CONCAT_VECTORS [[INSERT1]](<4 x s16>), [[DEF1]](<4 x s16>), [[DEF1]](<4 x s16>) 6806 ; CI: [[UV4:%[0-9]+]]:_(<3 x s16>), [[UV5:%[0-9]+]]:_(<3 x s16>), [[UV6:%[0-9]+]]:_(<3 x s16>), [[UV7:%[0-9]+]]:_(<3 x s16>) = G_UNMERGE_VALUES [[CONCAT_VECTORS1]](<12 x s16>) 6807 ; CI: [[INSERT2:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[UV4]](<3 x s16>), 0 6808 ; CI: [[INSERT3:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[INSERT2]], [[TRUNC]](s16), 32 6809 ; CI: [[CONCAT_VECTORS2:%[0-9]+]]:_(<12 x s16>) = G_CONCAT_VECTORS [[INSERT3]](<4 x s16>), [[DEF1]](<4 x s16>), [[DEF1]](<4 x s16>) 6810 ; CI: [[UV8:%[0-9]+]]:_(<3 x s16>), [[UV9:%[0-9]+]]:_(<3 x s16>), [[UV10:%[0-9]+]]:_(<3 x s16>), [[UV11:%[0-9]+]]:_(<3 x s16>) = G_UNMERGE_VALUES [[CONCAT_VECTORS2]](<12 x s16>) 6811 ; CI: [[INSERT4:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[UV8]](<3 x s16>), 0 6812 ; CI: $vgpr0_vgpr1 = COPY [[INSERT4]](<4 x s16>) 6813 ; CI-DS128-LABEL: name: test_load_local_v3s16_align2 6814 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 6815 ; CI-DS128: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 6816 ; CI-DS128: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 6817 ; CI-DS128: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 6818 ; CI-DS128: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 6819 ; CI-DS128: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 6820 ; CI-DS128: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 6821 ; CI-DS128: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 6822 ; CI-DS128: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 6823 ; CI-DS128: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 6824 ; CI-DS128: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 6825 ; CI-DS128: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 6826 ; CI-DS128: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 6827 ; CI-DS128: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32) 6828 ; CI-DS128: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 6829 ; CI-DS128: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C3]](s32) 6830 ; CI-DS128: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 2 + 4, addrspace 3) 6831 ; CI-DS128: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) 6832 ; CI-DS128: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 6833 ; CI-DS128: [[DEF1:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 6834 ; CI-DS128: [[CONCAT_VECTORS:%[0-9]+]]:_(<12 x s16>) = G_CONCAT_VECTORS [[DEF]](<4 x s16>), [[DEF1]](<4 x s16>), [[DEF1]](<4 x s16>) 6835 ; CI-DS128: [[UV:%[0-9]+]]:_(<3 x s16>), [[UV1:%[0-9]+]]:_(<3 x s16>), [[UV2:%[0-9]+]]:_(<3 x s16>), [[UV3:%[0-9]+]]:_(<3 x s16>) = G_UNMERGE_VALUES [[CONCAT_VECTORS]](<12 x s16>) 6836 ; CI-DS128: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[UV]](<3 x s16>), 0 6837 ; CI-DS128: [[INSERT1:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[INSERT]], [[BITCAST]](<2 x s16>), 0 6838 ; CI-DS128: [[CONCAT_VECTORS1:%[0-9]+]]:_(<12 x s16>) = G_CONCAT_VECTORS [[INSERT1]](<4 x s16>), [[DEF1]](<4 x s16>), [[DEF1]](<4 x s16>) 6839 ; CI-DS128: [[UV4:%[0-9]+]]:_(<3 x s16>), [[UV5:%[0-9]+]]:_(<3 x s16>), [[UV6:%[0-9]+]]:_(<3 x s16>), [[UV7:%[0-9]+]]:_(<3 x s16>) = G_UNMERGE_VALUES [[CONCAT_VECTORS1]](<12 x s16>) 6840 ; CI-DS128: [[INSERT2:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[UV4]](<3 x s16>), 0 6841 ; CI-DS128: [[INSERT3:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[INSERT2]], [[TRUNC]](s16), 32 6842 ; CI-DS128: [[CONCAT_VECTORS2:%[0-9]+]]:_(<12 x s16>) = G_CONCAT_VECTORS [[INSERT3]](<4 x s16>), [[DEF1]](<4 x s16>), [[DEF1]](<4 x s16>) 6843 ; CI-DS128: [[UV8:%[0-9]+]]:_(<3 x s16>), [[UV9:%[0-9]+]]:_(<3 x s16>), [[UV10:%[0-9]+]]:_(<3 x s16>), [[UV11:%[0-9]+]]:_(<3 x s16>) = G_UNMERGE_VALUES [[CONCAT_VECTORS2]](<12 x s16>) 6844 ; CI-DS128: [[INSERT4:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[UV8]](<3 x s16>), 0 6845 ; CI-DS128: $vgpr0_vgpr1 = COPY [[INSERT4]](<4 x s16>) 6846 ; VI-LABEL: name: test_load_local_v3s16_align2 6847 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 6848 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 6849 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 6850 ; VI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 6851 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 6852 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 6853 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 6854 ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 6855 ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 6856 ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 6857 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 6858 ; VI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 6859 ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 6860 ; VI: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32) 6861 ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 6862 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C3]](s32) 6863 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 2 + 4, addrspace 3) 6864 ; VI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) 6865 ; VI: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 6866 ; VI: [[DEF1:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 6867 ; VI: [[CONCAT_VECTORS:%[0-9]+]]:_(<12 x s16>) = G_CONCAT_VECTORS [[DEF]](<4 x s16>), [[DEF1]](<4 x s16>), [[DEF1]](<4 x s16>) 6868 ; VI: [[UV:%[0-9]+]]:_(<3 x s16>), [[UV1:%[0-9]+]]:_(<3 x s16>), [[UV2:%[0-9]+]]:_(<3 x s16>), [[UV3:%[0-9]+]]:_(<3 x s16>) = G_UNMERGE_VALUES [[CONCAT_VECTORS]](<12 x s16>) 6869 ; VI: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[UV]](<3 x s16>), 0 6870 ; VI: [[INSERT1:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[INSERT]], [[BITCAST]](<2 x s16>), 0 6871 ; VI: [[CONCAT_VECTORS1:%[0-9]+]]:_(<12 x s16>) = G_CONCAT_VECTORS [[INSERT1]](<4 x s16>), [[DEF1]](<4 x s16>), [[DEF1]](<4 x s16>) 6872 ; VI: [[UV4:%[0-9]+]]:_(<3 x s16>), [[UV5:%[0-9]+]]:_(<3 x s16>), [[UV6:%[0-9]+]]:_(<3 x s16>), [[UV7:%[0-9]+]]:_(<3 x s16>) = G_UNMERGE_VALUES [[CONCAT_VECTORS1]](<12 x s16>) 6873 ; VI: [[INSERT2:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[UV4]](<3 x s16>), 0 6874 ; VI: [[INSERT3:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[INSERT2]], [[TRUNC]](s16), 32 6875 ; VI: [[CONCAT_VECTORS2:%[0-9]+]]:_(<12 x s16>) = G_CONCAT_VECTORS [[INSERT3]](<4 x s16>), [[DEF1]](<4 x s16>), [[DEF1]](<4 x s16>) 6876 ; VI: [[UV8:%[0-9]+]]:_(<3 x s16>), [[UV9:%[0-9]+]]:_(<3 x s16>), [[UV10:%[0-9]+]]:_(<3 x s16>), [[UV11:%[0-9]+]]:_(<3 x s16>) = G_UNMERGE_VALUES [[CONCAT_VECTORS2]](<12 x s16>) 6877 ; VI: [[INSERT4:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[UV8]](<3 x s16>), 0 6878 ; VI: $vgpr0_vgpr1 = COPY [[INSERT4]](<4 x s16>) 6879 ; GFX9-LABEL: name: test_load_local_v3s16_align2 6880 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 6881 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 6882 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 6883 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 6884 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 6885 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 6886 ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 6887 ; GFX9: [[BUILD_VECTOR_TRUNC:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC [[COPY1]](s32), [[COPY2]](s32) 6888 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 6889 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 6890 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 2 + 4, addrspace 3) 6891 ; GFX9: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) 6892 ; GFX9: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 6893 ; GFX9: [[DEF1:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 6894 ; GFX9: [[CONCAT_VECTORS:%[0-9]+]]:_(<12 x s16>) = G_CONCAT_VECTORS [[DEF]](<4 x s16>), [[DEF1]](<4 x s16>), [[DEF1]](<4 x s16>) 6895 ; GFX9: [[UV:%[0-9]+]]:_(<3 x s16>), [[UV1:%[0-9]+]]:_(<3 x s16>), [[UV2:%[0-9]+]]:_(<3 x s16>), [[UV3:%[0-9]+]]:_(<3 x s16>) = G_UNMERGE_VALUES [[CONCAT_VECTORS]](<12 x s16>) 6896 ; GFX9: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[UV]](<3 x s16>), 0 6897 ; GFX9: [[INSERT1:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[INSERT]], [[BUILD_VECTOR_TRUNC]](<2 x s16>), 0 6898 ; GFX9: [[CONCAT_VECTORS1:%[0-9]+]]:_(<12 x s16>) = G_CONCAT_VECTORS [[INSERT1]](<4 x s16>), [[DEF1]](<4 x s16>), [[DEF1]](<4 x s16>) 6899 ; GFX9: [[UV4:%[0-9]+]]:_(<3 x s16>), [[UV5:%[0-9]+]]:_(<3 x s16>), [[UV6:%[0-9]+]]:_(<3 x s16>), [[UV7:%[0-9]+]]:_(<3 x s16>) = G_UNMERGE_VALUES [[CONCAT_VECTORS1]](<12 x s16>) 6900 ; GFX9: [[INSERT2:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[UV4]](<3 x s16>), 0 6901 ; GFX9: [[INSERT3:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[INSERT2]], [[TRUNC]](s16), 32 6902 ; GFX9: [[CONCAT_VECTORS2:%[0-9]+]]:_(<12 x s16>) = G_CONCAT_VECTORS [[INSERT3]](<4 x s16>), [[DEF1]](<4 x s16>), [[DEF1]](<4 x s16>) 6903 ; GFX9: [[UV8:%[0-9]+]]:_(<3 x s16>), [[UV9:%[0-9]+]]:_(<3 x s16>), [[UV10:%[0-9]+]]:_(<3 x s16>), [[UV11:%[0-9]+]]:_(<3 x s16>) = G_UNMERGE_VALUES [[CONCAT_VECTORS2]](<12 x s16>) 6904 ; GFX9: [[INSERT4:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[UV8]](<3 x s16>), 0 6905 ; GFX9: $vgpr0_vgpr1 = COPY [[INSERT4]](<4 x s16>) 6906 ; GFX9-UNALIGNED-LABEL: name: test_load_local_v3s16_align2 6907 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 6908 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(<3 x s16>) = G_LOAD [[COPY]](p3) :: (load 6, align 2, addrspace 3) 6909 ; GFX9-UNALIGNED: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 6910 ; GFX9-UNALIGNED: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[LOAD]](<3 x s16>), 0 6911 ; GFX9-UNALIGNED: $vgpr0_vgpr1 = COPY [[INSERT]](<4 x s16>) 6912 %0:_(p3) = COPY $vgpr0 6913 %1:_(<3 x s16>) = G_LOAD %0 :: (load 6, align 2, addrspace 3) 6914 %2:_(<4 x s16>) = G_IMPLICIT_DEF 6915 %3:_(<4 x s16>) = G_INSERT %2, %1, 0 6916 $vgpr0_vgpr1 = COPY %3 6917... 6918 6919--- 6920name: test_load_local_v3s16_align1 6921body: | 6922 bb.0: 6923 liveins: $vgpr0 6924 6925 ; SI-LABEL: name: test_load_local_v3s16_align1 6926 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 6927 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 6928 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 6929 ; SI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 6930 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 6931 ; SI: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 6932 ; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) 6933 ; SI: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C1]] 6934 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 6935 ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 6936 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 6937 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 6938 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 6939 ; SI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[SHL]](s32) 6940 ; SI: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[TRUNC1]] 6941 ; SI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 6942 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 6943 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 6944 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 6945 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 6946 ; SI: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) 6947 ; SI: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C1]] 6948 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[C2]](s32) 6949 ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 6950 ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 6951 ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[COPY2]](s32) 6952 ; SI: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[SHL1]](s32) 6953 ; SI: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[TRUNC3]] 6954 ; SI: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[OR]](s16) 6955 ; SI: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[OR1]](s16) 6956 ; SI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 6957 ; SI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[ZEXT1]], [[C5]](s32) 6958 ; SI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL2]] 6959 ; SI: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR2]](s32) 6960 ; SI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 6961 ; SI: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C6]](s32) 6962 ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 6963 ; SI: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 6964 ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 6965 ; SI: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD4]](s32) 6966 ; SI: [[AND4:%[0-9]+]]:_(s16) = G_AND [[TRUNC4]], [[C1]] 6967 ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[C2]](s32) 6968 ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 6969 ; SI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 6970 ; SI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[COPY4]](s32) 6971 ; SI: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[SHL3]](s32) 6972 ; SI: [[OR3:%[0-9]+]]:_(s16) = G_OR [[AND4]], [[TRUNC5]] 6973 ; SI: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 6974 ; SI: [[DEF1:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 6975 ; SI: [[CONCAT_VECTORS:%[0-9]+]]:_(<12 x s16>) = G_CONCAT_VECTORS [[DEF]](<4 x s16>), [[DEF1]](<4 x s16>), [[DEF1]](<4 x s16>) 6976 ; SI: [[UV:%[0-9]+]]:_(<3 x s16>), [[UV1:%[0-9]+]]:_(<3 x s16>), [[UV2:%[0-9]+]]:_(<3 x s16>), [[UV3:%[0-9]+]]:_(<3 x s16>) = G_UNMERGE_VALUES [[CONCAT_VECTORS]](<12 x s16>) 6977 ; SI: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[UV]](<3 x s16>), 0 6978 ; SI: [[INSERT1:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[INSERT]], [[BITCAST]](<2 x s16>), 0 6979 ; SI: [[CONCAT_VECTORS1:%[0-9]+]]:_(<12 x s16>) = G_CONCAT_VECTORS [[INSERT1]](<4 x s16>), [[DEF1]](<4 x s16>), [[DEF1]](<4 x s16>) 6980 ; SI: [[UV4:%[0-9]+]]:_(<3 x s16>), [[UV5:%[0-9]+]]:_(<3 x s16>), [[UV6:%[0-9]+]]:_(<3 x s16>), [[UV7:%[0-9]+]]:_(<3 x s16>) = G_UNMERGE_VALUES [[CONCAT_VECTORS1]](<12 x s16>) 6981 ; SI: [[INSERT2:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[UV4]](<3 x s16>), 0 6982 ; SI: [[INSERT3:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[INSERT2]], [[OR3]](s16), 32 6983 ; SI: [[CONCAT_VECTORS2:%[0-9]+]]:_(<12 x s16>) = G_CONCAT_VECTORS [[INSERT3]](<4 x s16>), [[DEF1]](<4 x s16>), [[DEF1]](<4 x s16>) 6984 ; SI: [[UV8:%[0-9]+]]:_(<3 x s16>), [[UV9:%[0-9]+]]:_(<3 x s16>), [[UV10:%[0-9]+]]:_(<3 x s16>), [[UV11:%[0-9]+]]:_(<3 x s16>) = G_UNMERGE_VALUES [[CONCAT_VECTORS2]](<12 x s16>) 6985 ; SI: [[INSERT4:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[UV8]](<3 x s16>), 0 6986 ; SI: $vgpr0_vgpr1 = COPY [[INSERT4]](<4 x s16>) 6987 ; CI-LABEL: name: test_load_local_v3s16_align1 6988 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 6989 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 6990 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 6991 ; CI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 6992 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 6993 ; CI: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 6994 ; CI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) 6995 ; CI: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C1]] 6996 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 6997 ; CI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 6998 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 6999 ; CI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 7000 ; CI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 7001 ; CI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[SHL]](s32) 7002 ; CI: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[TRUNC1]] 7003 ; CI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 7004 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 7005 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 7006 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 7007 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 7008 ; CI: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) 7009 ; CI: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C1]] 7010 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[C2]](s32) 7011 ; CI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 7012 ; CI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 7013 ; CI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[COPY2]](s32) 7014 ; CI: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[SHL1]](s32) 7015 ; CI: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[TRUNC3]] 7016 ; CI: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[OR]](s16) 7017 ; CI: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[OR1]](s16) 7018 ; CI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 7019 ; CI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[ZEXT1]], [[C5]](s32) 7020 ; CI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL2]] 7021 ; CI: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR2]](s32) 7022 ; CI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 7023 ; CI: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C6]](s32) 7024 ; CI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 7025 ; CI: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 7026 ; CI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 7027 ; CI: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD4]](s32) 7028 ; CI: [[AND4:%[0-9]+]]:_(s16) = G_AND [[TRUNC4]], [[C1]] 7029 ; CI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[C2]](s32) 7030 ; CI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 7031 ; CI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 7032 ; CI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[COPY4]](s32) 7033 ; CI: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[SHL3]](s32) 7034 ; CI: [[OR3:%[0-9]+]]:_(s16) = G_OR [[AND4]], [[TRUNC5]] 7035 ; CI: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 7036 ; CI: [[DEF1:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 7037 ; CI: [[CONCAT_VECTORS:%[0-9]+]]:_(<12 x s16>) = G_CONCAT_VECTORS [[DEF]](<4 x s16>), [[DEF1]](<4 x s16>), [[DEF1]](<4 x s16>) 7038 ; CI: [[UV:%[0-9]+]]:_(<3 x s16>), [[UV1:%[0-9]+]]:_(<3 x s16>), [[UV2:%[0-9]+]]:_(<3 x s16>), [[UV3:%[0-9]+]]:_(<3 x s16>) = G_UNMERGE_VALUES [[CONCAT_VECTORS]](<12 x s16>) 7039 ; CI: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[UV]](<3 x s16>), 0 7040 ; CI: [[INSERT1:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[INSERT]], [[BITCAST]](<2 x s16>), 0 7041 ; CI: [[CONCAT_VECTORS1:%[0-9]+]]:_(<12 x s16>) = G_CONCAT_VECTORS [[INSERT1]](<4 x s16>), [[DEF1]](<4 x s16>), [[DEF1]](<4 x s16>) 7042 ; CI: [[UV4:%[0-9]+]]:_(<3 x s16>), [[UV5:%[0-9]+]]:_(<3 x s16>), [[UV6:%[0-9]+]]:_(<3 x s16>), [[UV7:%[0-9]+]]:_(<3 x s16>) = G_UNMERGE_VALUES [[CONCAT_VECTORS1]](<12 x s16>) 7043 ; CI: [[INSERT2:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[UV4]](<3 x s16>), 0 7044 ; CI: [[INSERT3:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[INSERT2]], [[OR3]](s16), 32 7045 ; CI: [[CONCAT_VECTORS2:%[0-9]+]]:_(<12 x s16>) = G_CONCAT_VECTORS [[INSERT3]](<4 x s16>), [[DEF1]](<4 x s16>), [[DEF1]](<4 x s16>) 7046 ; CI: [[UV8:%[0-9]+]]:_(<3 x s16>), [[UV9:%[0-9]+]]:_(<3 x s16>), [[UV10:%[0-9]+]]:_(<3 x s16>), [[UV11:%[0-9]+]]:_(<3 x s16>) = G_UNMERGE_VALUES [[CONCAT_VECTORS2]](<12 x s16>) 7047 ; CI: [[INSERT4:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[UV8]](<3 x s16>), 0 7048 ; CI: $vgpr0_vgpr1 = COPY [[INSERT4]](<4 x s16>) 7049 ; CI-DS128-LABEL: name: test_load_local_v3s16_align1 7050 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 7051 ; CI-DS128: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 7052 ; CI-DS128: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 7053 ; CI-DS128: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 7054 ; CI-DS128: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 7055 ; CI-DS128: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 7056 ; CI-DS128: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) 7057 ; CI-DS128: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C1]] 7058 ; CI-DS128: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 7059 ; CI-DS128: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 7060 ; CI-DS128: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 7061 ; CI-DS128: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 7062 ; CI-DS128: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 7063 ; CI-DS128: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[SHL]](s32) 7064 ; CI-DS128: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[TRUNC1]] 7065 ; CI-DS128: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 7066 ; CI-DS128: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 7067 ; CI-DS128: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 7068 ; CI-DS128: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 7069 ; CI-DS128: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 7070 ; CI-DS128: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) 7071 ; CI-DS128: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C1]] 7072 ; CI-DS128: [[COPY2:%[0-9]+]]:_(s32) = COPY [[C2]](s32) 7073 ; CI-DS128: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 7074 ; CI-DS128: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 7075 ; CI-DS128: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[COPY2]](s32) 7076 ; CI-DS128: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[SHL1]](s32) 7077 ; CI-DS128: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[TRUNC3]] 7078 ; CI-DS128: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[OR]](s16) 7079 ; CI-DS128: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[OR1]](s16) 7080 ; CI-DS128: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 7081 ; CI-DS128: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[ZEXT1]], [[C5]](s32) 7082 ; CI-DS128: [[OR2:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL2]] 7083 ; CI-DS128: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR2]](s32) 7084 ; CI-DS128: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 7085 ; CI-DS128: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C6]](s32) 7086 ; CI-DS128: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 7087 ; CI-DS128: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 7088 ; CI-DS128: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 7089 ; CI-DS128: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD4]](s32) 7090 ; CI-DS128: [[AND4:%[0-9]+]]:_(s16) = G_AND [[TRUNC4]], [[C1]] 7091 ; CI-DS128: [[COPY4:%[0-9]+]]:_(s32) = COPY [[C2]](s32) 7092 ; CI-DS128: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 7093 ; CI-DS128: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 7094 ; CI-DS128: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[COPY4]](s32) 7095 ; CI-DS128: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[SHL3]](s32) 7096 ; CI-DS128: [[OR3:%[0-9]+]]:_(s16) = G_OR [[AND4]], [[TRUNC5]] 7097 ; CI-DS128: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 7098 ; CI-DS128: [[DEF1:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 7099 ; CI-DS128: [[CONCAT_VECTORS:%[0-9]+]]:_(<12 x s16>) = G_CONCAT_VECTORS [[DEF]](<4 x s16>), [[DEF1]](<4 x s16>), [[DEF1]](<4 x s16>) 7100 ; CI-DS128: [[UV:%[0-9]+]]:_(<3 x s16>), [[UV1:%[0-9]+]]:_(<3 x s16>), [[UV2:%[0-9]+]]:_(<3 x s16>), [[UV3:%[0-9]+]]:_(<3 x s16>) = G_UNMERGE_VALUES [[CONCAT_VECTORS]](<12 x s16>) 7101 ; CI-DS128: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[UV]](<3 x s16>), 0 7102 ; CI-DS128: [[INSERT1:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[INSERT]], [[BITCAST]](<2 x s16>), 0 7103 ; CI-DS128: [[CONCAT_VECTORS1:%[0-9]+]]:_(<12 x s16>) = G_CONCAT_VECTORS [[INSERT1]](<4 x s16>), [[DEF1]](<4 x s16>), [[DEF1]](<4 x s16>) 7104 ; CI-DS128: [[UV4:%[0-9]+]]:_(<3 x s16>), [[UV5:%[0-9]+]]:_(<3 x s16>), [[UV6:%[0-9]+]]:_(<3 x s16>), [[UV7:%[0-9]+]]:_(<3 x s16>) = G_UNMERGE_VALUES [[CONCAT_VECTORS1]](<12 x s16>) 7105 ; CI-DS128: [[INSERT2:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[UV4]](<3 x s16>), 0 7106 ; CI-DS128: [[INSERT3:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[INSERT2]], [[OR3]](s16), 32 7107 ; CI-DS128: [[CONCAT_VECTORS2:%[0-9]+]]:_(<12 x s16>) = G_CONCAT_VECTORS [[INSERT3]](<4 x s16>), [[DEF1]](<4 x s16>), [[DEF1]](<4 x s16>) 7108 ; CI-DS128: [[UV8:%[0-9]+]]:_(<3 x s16>), [[UV9:%[0-9]+]]:_(<3 x s16>), [[UV10:%[0-9]+]]:_(<3 x s16>), [[UV11:%[0-9]+]]:_(<3 x s16>) = G_UNMERGE_VALUES [[CONCAT_VECTORS2]](<12 x s16>) 7109 ; CI-DS128: [[INSERT4:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[UV8]](<3 x s16>), 0 7110 ; CI-DS128: $vgpr0_vgpr1 = COPY [[INSERT4]](<4 x s16>) 7111 ; VI-LABEL: name: test_load_local_v3s16_align1 7112 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 7113 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 7114 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 7115 ; VI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 7116 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 7117 ; VI: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 7118 ; VI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) 7119 ; VI: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C1]] 7120 ; VI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD1]](s32) 7121 ; VI: [[AND1:%[0-9]+]]:_(s16) = G_AND [[TRUNC1]], [[C1]] 7122 ; VI: [[C2:%[0-9]+]]:_(s16) = G_CONSTANT i16 8 7123 ; VI: [[SHL:%[0-9]+]]:_(s16) = G_SHL [[AND1]], [[C2]](s16) 7124 ; VI: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[SHL]] 7125 ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 7126 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C3]](s32) 7127 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 7128 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 7129 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 7130 ; VI: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) 7131 ; VI: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C1]] 7132 ; VI: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD3]](s32) 7133 ; VI: [[AND3:%[0-9]+]]:_(s16) = G_AND [[TRUNC3]], [[C1]] 7134 ; VI: [[SHL1:%[0-9]+]]:_(s16) = G_SHL [[AND3]], [[C2]](s16) 7135 ; VI: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[SHL1]] 7136 ; VI: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[OR]](s16) 7137 ; VI: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[OR1]](s16) 7138 ; VI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 7139 ; VI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[ZEXT1]], [[C4]](s32) 7140 ; VI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL2]] 7141 ; VI: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR2]](s32) 7142 ; VI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 7143 ; VI: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C5]](s32) 7144 ; VI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 7145 ; VI: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 7146 ; VI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 7147 ; VI: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD4]](s32) 7148 ; VI: [[AND4:%[0-9]+]]:_(s16) = G_AND [[TRUNC4]], [[C1]] 7149 ; VI: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD5]](s32) 7150 ; VI: [[AND5:%[0-9]+]]:_(s16) = G_AND [[TRUNC5]], [[C1]] 7151 ; VI: [[SHL3:%[0-9]+]]:_(s16) = G_SHL [[AND5]], [[C2]](s16) 7152 ; VI: [[OR3:%[0-9]+]]:_(s16) = G_OR [[AND4]], [[SHL3]] 7153 ; VI: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 7154 ; VI: [[DEF1:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 7155 ; VI: [[CONCAT_VECTORS:%[0-9]+]]:_(<12 x s16>) = G_CONCAT_VECTORS [[DEF]](<4 x s16>), [[DEF1]](<4 x s16>), [[DEF1]](<4 x s16>) 7156 ; VI: [[UV:%[0-9]+]]:_(<3 x s16>), [[UV1:%[0-9]+]]:_(<3 x s16>), [[UV2:%[0-9]+]]:_(<3 x s16>), [[UV3:%[0-9]+]]:_(<3 x s16>) = G_UNMERGE_VALUES [[CONCAT_VECTORS]](<12 x s16>) 7157 ; VI: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[UV]](<3 x s16>), 0 7158 ; VI: [[INSERT1:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[INSERT]], [[BITCAST]](<2 x s16>), 0 7159 ; VI: [[CONCAT_VECTORS1:%[0-9]+]]:_(<12 x s16>) = G_CONCAT_VECTORS [[INSERT1]](<4 x s16>), [[DEF1]](<4 x s16>), [[DEF1]](<4 x s16>) 7160 ; VI: [[UV4:%[0-9]+]]:_(<3 x s16>), [[UV5:%[0-9]+]]:_(<3 x s16>), [[UV6:%[0-9]+]]:_(<3 x s16>), [[UV7:%[0-9]+]]:_(<3 x s16>) = G_UNMERGE_VALUES [[CONCAT_VECTORS1]](<12 x s16>) 7161 ; VI: [[INSERT2:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[UV4]](<3 x s16>), 0 7162 ; VI: [[INSERT3:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[INSERT2]], [[OR3]](s16), 32 7163 ; VI: [[CONCAT_VECTORS2:%[0-9]+]]:_(<12 x s16>) = G_CONCAT_VECTORS [[INSERT3]](<4 x s16>), [[DEF1]](<4 x s16>), [[DEF1]](<4 x s16>) 7164 ; VI: [[UV8:%[0-9]+]]:_(<3 x s16>), [[UV9:%[0-9]+]]:_(<3 x s16>), [[UV10:%[0-9]+]]:_(<3 x s16>), [[UV11:%[0-9]+]]:_(<3 x s16>) = G_UNMERGE_VALUES [[CONCAT_VECTORS2]](<12 x s16>) 7165 ; VI: [[INSERT4:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[UV8]](<3 x s16>), 0 7166 ; VI: $vgpr0_vgpr1 = COPY [[INSERT4]](<4 x s16>) 7167 ; GFX9-LABEL: name: test_load_local_v3s16_align1 7168 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 7169 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 7170 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 7171 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 7172 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 7173 ; GFX9: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 7174 ; GFX9: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) 7175 ; GFX9: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C1]] 7176 ; GFX9: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD1]](s32) 7177 ; GFX9: [[AND1:%[0-9]+]]:_(s16) = G_AND [[TRUNC1]], [[C1]] 7178 ; GFX9: [[C2:%[0-9]+]]:_(s16) = G_CONSTANT i16 8 7179 ; GFX9: [[SHL:%[0-9]+]]:_(s16) = G_SHL [[AND1]], [[C2]](s16) 7180 ; GFX9: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[SHL]] 7181 ; GFX9: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 7182 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C3]](s32) 7183 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 7184 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 7185 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 7186 ; GFX9: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) 7187 ; GFX9: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C1]] 7188 ; GFX9: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD3]](s32) 7189 ; GFX9: [[AND3:%[0-9]+]]:_(s16) = G_AND [[TRUNC3]], [[C1]] 7190 ; GFX9: [[SHL1:%[0-9]+]]:_(s16) = G_SHL [[AND3]], [[C2]](s16) 7191 ; GFX9: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[SHL1]] 7192 ; GFX9: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[OR]](s16) 7193 ; GFX9: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[OR1]](s16) 7194 ; GFX9: [[BUILD_VECTOR_TRUNC:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC [[ANYEXT]](s32), [[ANYEXT1]](s32) 7195 ; GFX9: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 7196 ; GFX9: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 7197 ; GFX9: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 7198 ; GFX9: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 7199 ; GFX9: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 7200 ; GFX9: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD4]](s32) 7201 ; GFX9: [[AND4:%[0-9]+]]:_(s16) = G_AND [[TRUNC4]], [[C1]] 7202 ; GFX9: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD5]](s32) 7203 ; GFX9: [[AND5:%[0-9]+]]:_(s16) = G_AND [[TRUNC5]], [[C1]] 7204 ; GFX9: [[SHL2:%[0-9]+]]:_(s16) = G_SHL [[AND5]], [[C2]](s16) 7205 ; GFX9: [[OR2:%[0-9]+]]:_(s16) = G_OR [[AND4]], [[SHL2]] 7206 ; GFX9: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 7207 ; GFX9: [[DEF1:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 7208 ; GFX9: [[CONCAT_VECTORS:%[0-9]+]]:_(<12 x s16>) = G_CONCAT_VECTORS [[DEF]](<4 x s16>), [[DEF1]](<4 x s16>), [[DEF1]](<4 x s16>) 7209 ; GFX9: [[UV:%[0-9]+]]:_(<3 x s16>), [[UV1:%[0-9]+]]:_(<3 x s16>), [[UV2:%[0-9]+]]:_(<3 x s16>), [[UV3:%[0-9]+]]:_(<3 x s16>) = G_UNMERGE_VALUES [[CONCAT_VECTORS]](<12 x s16>) 7210 ; GFX9: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[UV]](<3 x s16>), 0 7211 ; GFX9: [[INSERT1:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[INSERT]], [[BUILD_VECTOR_TRUNC]](<2 x s16>), 0 7212 ; GFX9: [[CONCAT_VECTORS1:%[0-9]+]]:_(<12 x s16>) = G_CONCAT_VECTORS [[INSERT1]](<4 x s16>), [[DEF1]](<4 x s16>), [[DEF1]](<4 x s16>) 7213 ; GFX9: [[UV4:%[0-9]+]]:_(<3 x s16>), [[UV5:%[0-9]+]]:_(<3 x s16>), [[UV6:%[0-9]+]]:_(<3 x s16>), [[UV7:%[0-9]+]]:_(<3 x s16>) = G_UNMERGE_VALUES [[CONCAT_VECTORS1]](<12 x s16>) 7214 ; GFX9: [[INSERT2:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[UV4]](<3 x s16>), 0 7215 ; GFX9: [[INSERT3:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[INSERT2]], [[OR2]](s16), 32 7216 ; GFX9: [[CONCAT_VECTORS2:%[0-9]+]]:_(<12 x s16>) = G_CONCAT_VECTORS [[INSERT3]](<4 x s16>), [[DEF1]](<4 x s16>), [[DEF1]](<4 x s16>) 7217 ; GFX9: [[UV8:%[0-9]+]]:_(<3 x s16>), [[UV9:%[0-9]+]]:_(<3 x s16>), [[UV10:%[0-9]+]]:_(<3 x s16>), [[UV11:%[0-9]+]]:_(<3 x s16>) = G_UNMERGE_VALUES [[CONCAT_VECTORS2]](<12 x s16>) 7218 ; GFX9: [[INSERT4:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[UV8]](<3 x s16>), 0 7219 ; GFX9: $vgpr0_vgpr1 = COPY [[INSERT4]](<4 x s16>) 7220 ; GFX9-UNALIGNED-LABEL: name: test_load_local_v3s16_align1 7221 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 7222 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(<3 x s16>) = G_LOAD [[COPY]](p3) :: (load 6, align 1, addrspace 3) 7223 ; GFX9-UNALIGNED: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 7224 ; GFX9-UNALIGNED: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[LOAD]](<3 x s16>), 0 7225 ; GFX9-UNALIGNED: $vgpr0_vgpr1 = COPY [[INSERT]](<4 x s16>) 7226 %0:_(p3) = COPY $vgpr0 7227 %1:_(<3 x s16>) = G_LOAD %0 :: (load 6, align 1, addrspace 3) 7228 %2:_(<4 x s16>) = G_IMPLICIT_DEF 7229 %3:_(<4 x s16>) = G_INSERT %2, %1, 0 7230 $vgpr0_vgpr1 = COPY %3 7231... 7232 7233--- 7234name: test_load_local_v4s16_align8 7235body: | 7236 bb.0: 7237 liveins: $vgpr0 7238 ; SI-LABEL: name: test_load_local_v4s16_align8 7239 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 7240 ; SI: [[LOAD:%[0-9]+]]:_(<4 x s16>) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) 7241 ; SI: $vgpr0_vgpr1 = COPY [[LOAD]](<4 x s16>) 7242 ; CI-LABEL: name: test_load_local_v4s16_align8 7243 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 7244 ; CI: [[LOAD:%[0-9]+]]:_(<4 x s16>) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) 7245 ; CI: $vgpr0_vgpr1 = COPY [[LOAD]](<4 x s16>) 7246 ; CI-DS128-LABEL: name: test_load_local_v4s16_align8 7247 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 7248 ; CI-DS128: [[LOAD:%[0-9]+]]:_(<4 x s16>) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) 7249 ; CI-DS128: $vgpr0_vgpr1 = COPY [[LOAD]](<4 x s16>) 7250 ; VI-LABEL: name: test_load_local_v4s16_align8 7251 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 7252 ; VI: [[LOAD:%[0-9]+]]:_(<4 x s16>) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) 7253 ; VI: $vgpr0_vgpr1 = COPY [[LOAD]](<4 x s16>) 7254 ; GFX9-LABEL: name: test_load_local_v4s16_align8 7255 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 7256 ; GFX9: [[LOAD:%[0-9]+]]:_(<4 x s16>) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) 7257 ; GFX9: $vgpr0_vgpr1 = COPY [[LOAD]](<4 x s16>) 7258 ; GFX9-UNALIGNED-LABEL: name: test_load_local_v4s16_align8 7259 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 7260 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(<4 x s16>) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) 7261 ; GFX9-UNALIGNED: $vgpr0_vgpr1 = COPY [[LOAD]](<4 x s16>) 7262 %0:_(p3) = COPY $vgpr0 7263 %1:_(<4 x s16>) = G_LOAD %0 :: (load 8, align 8, addrspace 3) 7264 $vgpr0_vgpr1 = COPY %1 7265... 7266 7267--- 7268name: test_load_local_v4s16_align4 7269body: | 7270 bb.0: 7271 liveins: $vgpr0 7272 7273 ; SI-LABEL: name: test_load_local_v4s16_align4 7274 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 7275 ; SI: [[LOAD:%[0-9]+]]:_(<4 x s16>) = G_LOAD [[COPY]](p3) :: (load 8, align 4, addrspace 3) 7276 ; SI: $vgpr0_vgpr1 = COPY [[LOAD]](<4 x s16>) 7277 ; CI-LABEL: name: test_load_local_v4s16_align4 7278 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 7279 ; CI: [[LOAD:%[0-9]+]]:_(<4 x s16>) = G_LOAD [[COPY]](p3) :: (load 8, align 4, addrspace 3) 7280 ; CI: $vgpr0_vgpr1 = COPY [[LOAD]](<4 x s16>) 7281 ; CI-DS128-LABEL: name: test_load_local_v4s16_align4 7282 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 7283 ; CI-DS128: [[LOAD:%[0-9]+]]:_(<4 x s16>) = G_LOAD [[COPY]](p3) :: (load 8, align 4, addrspace 3) 7284 ; CI-DS128: $vgpr0_vgpr1 = COPY [[LOAD]](<4 x s16>) 7285 ; VI-LABEL: name: test_load_local_v4s16_align4 7286 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 7287 ; VI: [[LOAD:%[0-9]+]]:_(<4 x s16>) = G_LOAD [[COPY]](p3) :: (load 8, align 4, addrspace 3) 7288 ; VI: $vgpr0_vgpr1 = COPY [[LOAD]](<4 x s16>) 7289 ; GFX9-LABEL: name: test_load_local_v4s16_align4 7290 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 7291 ; GFX9: [[LOAD:%[0-9]+]]:_(<4 x s16>) = G_LOAD [[COPY]](p3) :: (load 8, align 4, addrspace 3) 7292 ; GFX9: $vgpr0_vgpr1 = COPY [[LOAD]](<4 x s16>) 7293 ; GFX9-UNALIGNED-LABEL: name: test_load_local_v4s16_align4 7294 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 7295 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(<4 x s16>) = G_LOAD [[COPY]](p3) :: (load 8, align 4, addrspace 3) 7296 ; GFX9-UNALIGNED: $vgpr0_vgpr1 = COPY [[LOAD]](<4 x s16>) 7297 %0:_(p3) = COPY $vgpr0 7298 %1:_(<4 x s16>) = G_LOAD %0 :: (load 8, align 4, addrspace 3) 7299 $vgpr0_vgpr1 = COPY %1 7300... 7301 7302--- 7303name: test_load_local_v4s16_align2 7304body: | 7305 bb.0: 7306 liveins: $vgpr0 7307 ; SI-LABEL: name: test_load_local_v4s16_align2 7308 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 7309 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 7310 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 7311 ; SI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 7312 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 7313 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 7314 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 7315 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 2 + 4, addrspace 3) 7316 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 6 7317 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 7318 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 2 + 6, addrspace 3) 7319 ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 7320 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 7321 ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 7322 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 7323 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 7324 ; SI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 7325 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 7326 ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 7327 ; SI: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32) 7328 ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 7329 ; SI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 7330 ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 7331 ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 7332 ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C4]](s32) 7333 ; SI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 7334 ; SI: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR1]](s32) 7335 ; SI: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST]](<2 x s16>), [[BITCAST1]](<2 x s16>) 7336 ; SI: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>) 7337 ; CI-LABEL: name: test_load_local_v4s16_align2 7338 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 7339 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 7340 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 7341 ; CI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 7342 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 7343 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 7344 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 7345 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 2 + 4, addrspace 3) 7346 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 6 7347 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 7348 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 2 + 6, addrspace 3) 7349 ; CI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 7350 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 7351 ; CI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 7352 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 7353 ; CI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 7354 ; CI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 7355 ; CI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 7356 ; CI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 7357 ; CI: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32) 7358 ; CI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 7359 ; CI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 7360 ; CI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 7361 ; CI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 7362 ; CI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C4]](s32) 7363 ; CI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 7364 ; CI: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR1]](s32) 7365 ; CI: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST]](<2 x s16>), [[BITCAST1]](<2 x s16>) 7366 ; CI: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>) 7367 ; CI-DS128-LABEL: name: test_load_local_v4s16_align2 7368 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 7369 ; CI-DS128: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 7370 ; CI-DS128: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 7371 ; CI-DS128: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 7372 ; CI-DS128: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 7373 ; CI-DS128: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 7374 ; CI-DS128: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 7375 ; CI-DS128: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 2 + 4, addrspace 3) 7376 ; CI-DS128: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 6 7377 ; CI-DS128: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 7378 ; CI-DS128: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 2 + 6, addrspace 3) 7379 ; CI-DS128: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 7380 ; CI-DS128: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 7381 ; CI-DS128: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 7382 ; CI-DS128: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 7383 ; CI-DS128: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 7384 ; CI-DS128: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 7385 ; CI-DS128: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 7386 ; CI-DS128: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 7387 ; CI-DS128: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32) 7388 ; CI-DS128: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 7389 ; CI-DS128: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 7390 ; CI-DS128: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 7391 ; CI-DS128: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 7392 ; CI-DS128: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C4]](s32) 7393 ; CI-DS128: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 7394 ; CI-DS128: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR1]](s32) 7395 ; CI-DS128: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST]](<2 x s16>), [[BITCAST1]](<2 x s16>) 7396 ; CI-DS128: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>) 7397 ; VI-LABEL: name: test_load_local_v4s16_align2 7398 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 7399 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 7400 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 7401 ; VI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 7402 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 7403 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 7404 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 7405 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 2 + 4, addrspace 3) 7406 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 6 7407 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 7408 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 2 + 6, addrspace 3) 7409 ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 7410 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 7411 ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 7412 ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 7413 ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 7414 ; VI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 7415 ; VI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 7416 ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 7417 ; VI: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32) 7418 ; VI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 7419 ; VI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 7420 ; VI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 7421 ; VI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 7422 ; VI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C4]](s32) 7423 ; VI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 7424 ; VI: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR1]](s32) 7425 ; VI: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST]](<2 x s16>), [[BITCAST1]](<2 x s16>) 7426 ; VI: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>) 7427 ; GFX9-LABEL: name: test_load_local_v4s16_align2 7428 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 7429 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 7430 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 7431 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 7432 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 7433 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 7434 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 7435 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 2 + 4, addrspace 3) 7436 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 6 7437 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 7438 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 2 + 6, addrspace 3) 7439 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 7440 ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 7441 ; GFX9: [[BUILD_VECTOR_TRUNC:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC [[COPY1]](s32), [[COPY2]](s32) 7442 ; GFX9: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 7443 ; GFX9: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 7444 ; GFX9: [[BUILD_VECTOR_TRUNC1:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC [[COPY3]](s32), [[COPY4]](s32) 7445 ; GFX9: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BUILD_VECTOR_TRUNC]](<2 x s16>), [[BUILD_VECTOR_TRUNC1]](<2 x s16>) 7446 ; GFX9: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>) 7447 ; GFX9-UNALIGNED-LABEL: name: test_load_local_v4s16_align2 7448 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 7449 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(<4 x s16>) = G_LOAD [[COPY]](p3) :: (load 8, align 2, addrspace 3) 7450 ; GFX9-UNALIGNED: $vgpr0_vgpr1 = COPY [[LOAD]](<4 x s16>) 7451 %0:_(p3) = COPY $vgpr0 7452 %1:_(<4 x s16>) = G_LOAD %0 :: (load 8, align 2, addrspace 3) 7453 $vgpr0_vgpr1 = COPY %1 7454... 7455 7456--- 7457name: test_load_local_v4s16_align1 7458body: | 7459 bb.0: 7460 liveins: $vgpr0 7461 7462 ; SI-LABEL: name: test_load_local_v4s16_align1 7463 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 7464 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 7465 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 7466 ; SI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 7467 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 7468 ; SI: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 7469 ; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) 7470 ; SI: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C1]] 7471 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 7472 ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 7473 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 7474 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 7475 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 7476 ; SI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[SHL]](s32) 7477 ; SI: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[TRUNC1]] 7478 ; SI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 7479 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 7480 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 7481 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 7482 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 7483 ; SI: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) 7484 ; SI: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C1]] 7485 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[C2]](s32) 7486 ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 7487 ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 7488 ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[COPY2]](s32) 7489 ; SI: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[SHL1]](s32) 7490 ; SI: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[TRUNC3]] 7491 ; SI: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[OR]](s16) 7492 ; SI: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[OR1]](s16) 7493 ; SI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 7494 ; SI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[ZEXT1]], [[C5]](s32) 7495 ; SI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL2]] 7496 ; SI: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR2]](s32) 7497 ; SI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 7498 ; SI: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C6]](s32) 7499 ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 7500 ; SI: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 7501 ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 7502 ; SI: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD4]](s32) 7503 ; SI: [[AND4:%[0-9]+]]:_(s16) = G_AND [[TRUNC4]], [[C1]] 7504 ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[C2]](s32) 7505 ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 7506 ; SI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 7507 ; SI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[COPY4]](s32) 7508 ; SI: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[SHL3]](s32) 7509 ; SI: [[OR3:%[0-9]+]]:_(s16) = G_OR [[AND4]], [[TRUNC5]] 7510 ; SI: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C4]](s32) 7511 ; SI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 7512 ; SI: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD5]], [[C]](s32) 7513 ; SI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 7514 ; SI: [[TRUNC6:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD6]](s32) 7515 ; SI: [[AND6:%[0-9]+]]:_(s16) = G_AND [[TRUNC6]], [[C1]] 7516 ; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[C2]](s32) 7517 ; SI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 7518 ; SI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 7519 ; SI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[COPY6]](s32) 7520 ; SI: [[TRUNC7:%[0-9]+]]:_(s16) = G_TRUNC [[SHL4]](s32) 7521 ; SI: [[OR4:%[0-9]+]]:_(s16) = G_OR [[AND6]], [[TRUNC7]] 7522 ; SI: [[ZEXT2:%[0-9]+]]:_(s32) = G_ZEXT [[OR3]](s16) 7523 ; SI: [[ZEXT3:%[0-9]+]]:_(s32) = G_ZEXT [[OR4]](s16) 7524 ; SI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[ZEXT3]], [[C5]](s32) 7525 ; SI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[ZEXT2]], [[SHL5]] 7526 ; SI: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR5]](s32) 7527 ; SI: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST]](<2 x s16>), [[BITCAST1]](<2 x s16>) 7528 ; SI: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>) 7529 ; CI-LABEL: name: test_load_local_v4s16_align1 7530 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 7531 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 7532 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 7533 ; CI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 7534 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 7535 ; CI: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 7536 ; CI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) 7537 ; CI: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C1]] 7538 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 7539 ; CI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 7540 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 7541 ; CI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 7542 ; CI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 7543 ; CI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[SHL]](s32) 7544 ; CI: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[TRUNC1]] 7545 ; CI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 7546 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 7547 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 7548 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 7549 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 7550 ; CI: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) 7551 ; CI: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C1]] 7552 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[C2]](s32) 7553 ; CI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 7554 ; CI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 7555 ; CI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[COPY2]](s32) 7556 ; CI: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[SHL1]](s32) 7557 ; CI: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[TRUNC3]] 7558 ; CI: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[OR]](s16) 7559 ; CI: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[OR1]](s16) 7560 ; CI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 7561 ; CI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[ZEXT1]], [[C5]](s32) 7562 ; CI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL2]] 7563 ; CI: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR2]](s32) 7564 ; CI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 7565 ; CI: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C6]](s32) 7566 ; CI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 7567 ; CI: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 7568 ; CI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 7569 ; CI: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD4]](s32) 7570 ; CI: [[AND4:%[0-9]+]]:_(s16) = G_AND [[TRUNC4]], [[C1]] 7571 ; CI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[C2]](s32) 7572 ; CI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 7573 ; CI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 7574 ; CI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[COPY4]](s32) 7575 ; CI: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[SHL3]](s32) 7576 ; CI: [[OR3:%[0-9]+]]:_(s16) = G_OR [[AND4]], [[TRUNC5]] 7577 ; CI: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C4]](s32) 7578 ; CI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 7579 ; CI: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD5]], [[C]](s32) 7580 ; CI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 7581 ; CI: [[TRUNC6:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD6]](s32) 7582 ; CI: [[AND6:%[0-9]+]]:_(s16) = G_AND [[TRUNC6]], [[C1]] 7583 ; CI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[C2]](s32) 7584 ; CI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 7585 ; CI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 7586 ; CI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[COPY6]](s32) 7587 ; CI: [[TRUNC7:%[0-9]+]]:_(s16) = G_TRUNC [[SHL4]](s32) 7588 ; CI: [[OR4:%[0-9]+]]:_(s16) = G_OR [[AND6]], [[TRUNC7]] 7589 ; CI: [[ZEXT2:%[0-9]+]]:_(s32) = G_ZEXT [[OR3]](s16) 7590 ; CI: [[ZEXT3:%[0-9]+]]:_(s32) = G_ZEXT [[OR4]](s16) 7591 ; CI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[ZEXT3]], [[C5]](s32) 7592 ; CI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[ZEXT2]], [[SHL5]] 7593 ; CI: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR5]](s32) 7594 ; CI: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST]](<2 x s16>), [[BITCAST1]](<2 x s16>) 7595 ; CI: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>) 7596 ; CI-DS128-LABEL: name: test_load_local_v4s16_align1 7597 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 7598 ; CI-DS128: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 7599 ; CI-DS128: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 7600 ; CI-DS128: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 7601 ; CI-DS128: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 7602 ; CI-DS128: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 7603 ; CI-DS128: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) 7604 ; CI-DS128: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C1]] 7605 ; CI-DS128: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 7606 ; CI-DS128: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 7607 ; CI-DS128: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 7608 ; CI-DS128: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 7609 ; CI-DS128: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 7610 ; CI-DS128: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[SHL]](s32) 7611 ; CI-DS128: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[TRUNC1]] 7612 ; CI-DS128: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 7613 ; CI-DS128: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 7614 ; CI-DS128: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 7615 ; CI-DS128: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 7616 ; CI-DS128: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 7617 ; CI-DS128: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) 7618 ; CI-DS128: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C1]] 7619 ; CI-DS128: [[COPY2:%[0-9]+]]:_(s32) = COPY [[C2]](s32) 7620 ; CI-DS128: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 7621 ; CI-DS128: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 7622 ; CI-DS128: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[COPY2]](s32) 7623 ; CI-DS128: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[SHL1]](s32) 7624 ; CI-DS128: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[TRUNC3]] 7625 ; CI-DS128: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[OR]](s16) 7626 ; CI-DS128: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[OR1]](s16) 7627 ; CI-DS128: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 7628 ; CI-DS128: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[ZEXT1]], [[C5]](s32) 7629 ; CI-DS128: [[OR2:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL2]] 7630 ; CI-DS128: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR2]](s32) 7631 ; CI-DS128: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 7632 ; CI-DS128: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C6]](s32) 7633 ; CI-DS128: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 7634 ; CI-DS128: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 7635 ; CI-DS128: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 7636 ; CI-DS128: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD4]](s32) 7637 ; CI-DS128: [[AND4:%[0-9]+]]:_(s16) = G_AND [[TRUNC4]], [[C1]] 7638 ; CI-DS128: [[COPY4:%[0-9]+]]:_(s32) = COPY [[C2]](s32) 7639 ; CI-DS128: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 7640 ; CI-DS128: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 7641 ; CI-DS128: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[COPY4]](s32) 7642 ; CI-DS128: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[SHL3]](s32) 7643 ; CI-DS128: [[OR3:%[0-9]+]]:_(s16) = G_OR [[AND4]], [[TRUNC5]] 7644 ; CI-DS128: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C4]](s32) 7645 ; CI-DS128: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 7646 ; CI-DS128: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD5]], [[C]](s32) 7647 ; CI-DS128: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 7648 ; CI-DS128: [[TRUNC6:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD6]](s32) 7649 ; CI-DS128: [[AND6:%[0-9]+]]:_(s16) = G_AND [[TRUNC6]], [[C1]] 7650 ; CI-DS128: [[COPY6:%[0-9]+]]:_(s32) = COPY [[C2]](s32) 7651 ; CI-DS128: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 7652 ; CI-DS128: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 7653 ; CI-DS128: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[COPY6]](s32) 7654 ; CI-DS128: [[TRUNC7:%[0-9]+]]:_(s16) = G_TRUNC [[SHL4]](s32) 7655 ; CI-DS128: [[OR4:%[0-9]+]]:_(s16) = G_OR [[AND6]], [[TRUNC7]] 7656 ; CI-DS128: [[ZEXT2:%[0-9]+]]:_(s32) = G_ZEXT [[OR3]](s16) 7657 ; CI-DS128: [[ZEXT3:%[0-9]+]]:_(s32) = G_ZEXT [[OR4]](s16) 7658 ; CI-DS128: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[ZEXT3]], [[C5]](s32) 7659 ; CI-DS128: [[OR5:%[0-9]+]]:_(s32) = G_OR [[ZEXT2]], [[SHL5]] 7660 ; CI-DS128: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR5]](s32) 7661 ; CI-DS128: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST]](<2 x s16>), [[BITCAST1]](<2 x s16>) 7662 ; CI-DS128: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>) 7663 ; VI-LABEL: name: test_load_local_v4s16_align1 7664 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 7665 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 7666 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 7667 ; VI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 7668 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 7669 ; VI: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 7670 ; VI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) 7671 ; VI: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C1]] 7672 ; VI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD1]](s32) 7673 ; VI: [[AND1:%[0-9]+]]:_(s16) = G_AND [[TRUNC1]], [[C1]] 7674 ; VI: [[C2:%[0-9]+]]:_(s16) = G_CONSTANT i16 8 7675 ; VI: [[SHL:%[0-9]+]]:_(s16) = G_SHL [[AND1]], [[C2]](s16) 7676 ; VI: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[SHL]] 7677 ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 7678 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C3]](s32) 7679 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 7680 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 7681 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 7682 ; VI: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) 7683 ; VI: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C1]] 7684 ; VI: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD3]](s32) 7685 ; VI: [[AND3:%[0-9]+]]:_(s16) = G_AND [[TRUNC3]], [[C1]] 7686 ; VI: [[SHL1:%[0-9]+]]:_(s16) = G_SHL [[AND3]], [[C2]](s16) 7687 ; VI: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[SHL1]] 7688 ; VI: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[OR]](s16) 7689 ; VI: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[OR1]](s16) 7690 ; VI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 7691 ; VI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[ZEXT1]], [[C4]](s32) 7692 ; VI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL2]] 7693 ; VI: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR2]](s32) 7694 ; VI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 7695 ; VI: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C5]](s32) 7696 ; VI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 7697 ; VI: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 7698 ; VI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 7699 ; VI: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD4]](s32) 7700 ; VI: [[AND4:%[0-9]+]]:_(s16) = G_AND [[TRUNC4]], [[C1]] 7701 ; VI: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD5]](s32) 7702 ; VI: [[AND5:%[0-9]+]]:_(s16) = G_AND [[TRUNC5]], [[C1]] 7703 ; VI: [[SHL3:%[0-9]+]]:_(s16) = G_SHL [[AND5]], [[C2]](s16) 7704 ; VI: [[OR3:%[0-9]+]]:_(s16) = G_OR [[AND4]], [[SHL3]] 7705 ; VI: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C3]](s32) 7706 ; VI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 7707 ; VI: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD5]], [[C]](s32) 7708 ; VI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 7709 ; VI: [[TRUNC6:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD6]](s32) 7710 ; VI: [[AND6:%[0-9]+]]:_(s16) = G_AND [[TRUNC6]], [[C1]] 7711 ; VI: [[TRUNC7:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD7]](s32) 7712 ; VI: [[AND7:%[0-9]+]]:_(s16) = G_AND [[TRUNC7]], [[C1]] 7713 ; VI: [[SHL4:%[0-9]+]]:_(s16) = G_SHL [[AND7]], [[C2]](s16) 7714 ; VI: [[OR4:%[0-9]+]]:_(s16) = G_OR [[AND6]], [[SHL4]] 7715 ; VI: [[ZEXT2:%[0-9]+]]:_(s32) = G_ZEXT [[OR3]](s16) 7716 ; VI: [[ZEXT3:%[0-9]+]]:_(s32) = G_ZEXT [[OR4]](s16) 7717 ; VI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[ZEXT3]], [[C4]](s32) 7718 ; VI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[ZEXT2]], [[SHL5]] 7719 ; VI: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR5]](s32) 7720 ; VI: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST]](<2 x s16>), [[BITCAST1]](<2 x s16>) 7721 ; VI: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>) 7722 ; GFX9-LABEL: name: test_load_local_v4s16_align1 7723 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 7724 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 7725 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 7726 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 7727 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 7728 ; GFX9: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 7729 ; GFX9: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) 7730 ; GFX9: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C1]] 7731 ; GFX9: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD1]](s32) 7732 ; GFX9: [[AND1:%[0-9]+]]:_(s16) = G_AND [[TRUNC1]], [[C1]] 7733 ; GFX9: [[C2:%[0-9]+]]:_(s16) = G_CONSTANT i16 8 7734 ; GFX9: [[SHL:%[0-9]+]]:_(s16) = G_SHL [[AND1]], [[C2]](s16) 7735 ; GFX9: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[SHL]] 7736 ; GFX9: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 7737 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C3]](s32) 7738 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 7739 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 7740 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 7741 ; GFX9: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) 7742 ; GFX9: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C1]] 7743 ; GFX9: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD3]](s32) 7744 ; GFX9: [[AND3:%[0-9]+]]:_(s16) = G_AND [[TRUNC3]], [[C1]] 7745 ; GFX9: [[SHL1:%[0-9]+]]:_(s16) = G_SHL [[AND3]], [[C2]](s16) 7746 ; GFX9: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[SHL1]] 7747 ; GFX9: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[OR]](s16) 7748 ; GFX9: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[OR1]](s16) 7749 ; GFX9: [[BUILD_VECTOR_TRUNC:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC [[ANYEXT]](s32), [[ANYEXT1]](s32) 7750 ; GFX9: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 7751 ; GFX9: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 7752 ; GFX9: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 7753 ; GFX9: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 7754 ; GFX9: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 7755 ; GFX9: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD4]](s32) 7756 ; GFX9: [[AND4:%[0-9]+]]:_(s16) = G_AND [[TRUNC4]], [[C1]] 7757 ; GFX9: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD5]](s32) 7758 ; GFX9: [[AND5:%[0-9]+]]:_(s16) = G_AND [[TRUNC5]], [[C1]] 7759 ; GFX9: [[SHL2:%[0-9]+]]:_(s16) = G_SHL [[AND5]], [[C2]](s16) 7760 ; GFX9: [[OR2:%[0-9]+]]:_(s16) = G_OR [[AND4]], [[SHL2]] 7761 ; GFX9: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C3]](s32) 7762 ; GFX9: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 7763 ; GFX9: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD5]], [[C]](s32) 7764 ; GFX9: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 7765 ; GFX9: [[TRUNC6:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD6]](s32) 7766 ; GFX9: [[AND6:%[0-9]+]]:_(s16) = G_AND [[TRUNC6]], [[C1]] 7767 ; GFX9: [[TRUNC7:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD7]](s32) 7768 ; GFX9: [[AND7:%[0-9]+]]:_(s16) = G_AND [[TRUNC7]], [[C1]] 7769 ; GFX9: [[SHL3:%[0-9]+]]:_(s16) = G_SHL [[AND7]], [[C2]](s16) 7770 ; GFX9: [[OR3:%[0-9]+]]:_(s16) = G_OR [[AND6]], [[SHL3]] 7771 ; GFX9: [[ANYEXT2:%[0-9]+]]:_(s32) = G_ANYEXT [[OR2]](s16) 7772 ; GFX9: [[ANYEXT3:%[0-9]+]]:_(s32) = G_ANYEXT [[OR3]](s16) 7773 ; GFX9: [[BUILD_VECTOR_TRUNC1:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC [[ANYEXT2]](s32), [[ANYEXT3]](s32) 7774 ; GFX9: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BUILD_VECTOR_TRUNC]](<2 x s16>), [[BUILD_VECTOR_TRUNC1]](<2 x s16>) 7775 ; GFX9: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>) 7776 ; GFX9-UNALIGNED-LABEL: name: test_load_local_v4s16_align1 7777 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 7778 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(<4 x s16>) = G_LOAD [[COPY]](p3) :: (load 8, align 1, addrspace 3) 7779 ; GFX9-UNALIGNED: $vgpr0_vgpr1 = COPY [[LOAD]](<4 x s16>) 7780 %0:_(p3) = COPY $vgpr0 7781 %1:_(<4 x s16>) = G_LOAD %0 :: (load 8, align 1, addrspace 3) 7782 $vgpr0_vgpr1 = COPY %1 7783... 7784 7785--- 7786name: test_load_local_v2s32_align8 7787body: | 7788 bb.0: 7789 liveins: $vgpr0 7790 7791 ; SI-LABEL: name: test_load_local_v2s32_align8 7792 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 7793 ; SI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) 7794 ; SI: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x s32>) 7795 ; CI-LABEL: name: test_load_local_v2s32_align8 7796 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 7797 ; CI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) 7798 ; CI: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x s32>) 7799 ; CI-DS128-LABEL: name: test_load_local_v2s32_align8 7800 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 7801 ; CI-DS128: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) 7802 ; CI-DS128: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x s32>) 7803 ; VI-LABEL: name: test_load_local_v2s32_align8 7804 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 7805 ; VI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) 7806 ; VI: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x s32>) 7807 ; GFX9-LABEL: name: test_load_local_v2s32_align8 7808 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 7809 ; GFX9: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) 7810 ; GFX9: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x s32>) 7811 ; GFX9-UNALIGNED-LABEL: name: test_load_local_v2s32_align8 7812 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 7813 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) 7814 ; GFX9-UNALIGNED: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x s32>) 7815 %0:_(p3) = COPY $vgpr0 7816 %1:_(<2 x s32>) = G_LOAD %0 :: (load 8, align 8, addrspace 3) 7817 $vgpr0_vgpr1 = COPY %1 7818... 7819 7820--- 7821name: test_load_local_v2s32_align4 7822body: | 7823 bb.0: 7824 liveins: $vgpr0 7825 7826 ; SI-LABEL: name: test_load_local_v2s32_align4 7827 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 7828 ; SI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 8, align 4, addrspace 3) 7829 ; SI: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x s32>) 7830 ; CI-LABEL: name: test_load_local_v2s32_align4 7831 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 7832 ; CI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 8, align 4, addrspace 3) 7833 ; CI: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x s32>) 7834 ; CI-DS128-LABEL: name: test_load_local_v2s32_align4 7835 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 7836 ; CI-DS128: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 8, align 4, addrspace 3) 7837 ; CI-DS128: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x s32>) 7838 ; VI-LABEL: name: test_load_local_v2s32_align4 7839 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 7840 ; VI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 8, align 4, addrspace 3) 7841 ; VI: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x s32>) 7842 ; GFX9-LABEL: name: test_load_local_v2s32_align4 7843 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 7844 ; GFX9: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 8, align 4, addrspace 3) 7845 ; GFX9: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x s32>) 7846 ; GFX9-UNALIGNED-LABEL: name: test_load_local_v2s32_align4 7847 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 7848 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 8, align 4, addrspace 3) 7849 ; GFX9-UNALIGNED: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x s32>) 7850 %0:_(p3) = COPY $vgpr0 7851 %1:_(<2 x s32>) = G_LOAD %0 :: (load 8, align 4, addrspace 3) 7852 $vgpr0_vgpr1 = COPY %1 7853... 7854 7855--- 7856name: test_load_local_v2s32_align2 7857body: | 7858 bb.0: 7859 liveins: $vgpr0 7860 7861 ; SI-LABEL: name: test_load_local_v2s32_align2 7862 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 7863 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 7864 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 7865 ; SI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 7866 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 7867 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 7868 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 7869 ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 7870 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 7871 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 7872 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 7873 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 7874 ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 7875 ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 7876 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C3]](s32) 7877 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 2 + 4, addrspace 3) 7878 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 7879 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 2 + 6, addrspace 3) 7880 ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 7881 ; SI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C1]] 7882 ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 7883 ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C1]] 7884 ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C2]](s32) 7885 ; SI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 7886 ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR]](s32), [[OR1]](s32) 7887 ; SI: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) 7888 ; CI-LABEL: name: test_load_local_v2s32_align2 7889 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 7890 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 7891 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 7892 ; CI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 7893 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 7894 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 7895 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 7896 ; CI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 7897 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 7898 ; CI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 7899 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 7900 ; CI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 7901 ; CI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 7902 ; CI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 7903 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C3]](s32) 7904 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 2 + 4, addrspace 3) 7905 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 7906 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 2 + 6, addrspace 3) 7907 ; CI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 7908 ; CI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C1]] 7909 ; CI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 7910 ; CI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C1]] 7911 ; CI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C2]](s32) 7912 ; CI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 7913 ; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR]](s32), [[OR1]](s32) 7914 ; CI: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) 7915 ; CI-DS128-LABEL: name: test_load_local_v2s32_align2 7916 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 7917 ; CI-DS128: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 7918 ; CI-DS128: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 7919 ; CI-DS128: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 7920 ; CI-DS128: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 7921 ; CI-DS128: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 7922 ; CI-DS128: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 7923 ; CI-DS128: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 7924 ; CI-DS128: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 7925 ; CI-DS128: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 7926 ; CI-DS128: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 7927 ; CI-DS128: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 7928 ; CI-DS128: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 7929 ; CI-DS128: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 7930 ; CI-DS128: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C3]](s32) 7931 ; CI-DS128: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 2 + 4, addrspace 3) 7932 ; CI-DS128: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 7933 ; CI-DS128: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 2 + 6, addrspace 3) 7934 ; CI-DS128: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 7935 ; CI-DS128: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C1]] 7936 ; CI-DS128: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 7937 ; CI-DS128: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C1]] 7938 ; CI-DS128: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C2]](s32) 7939 ; CI-DS128: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 7940 ; CI-DS128: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR]](s32), [[OR1]](s32) 7941 ; CI-DS128: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) 7942 ; VI-LABEL: name: test_load_local_v2s32_align2 7943 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 7944 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 7945 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 7946 ; VI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 7947 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 7948 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 7949 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 7950 ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 7951 ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 7952 ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 7953 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 7954 ; VI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 7955 ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 7956 ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 7957 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C3]](s32) 7958 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 2 + 4, addrspace 3) 7959 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 7960 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 2 + 6, addrspace 3) 7961 ; VI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 7962 ; VI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C1]] 7963 ; VI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 7964 ; VI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C1]] 7965 ; VI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C2]](s32) 7966 ; VI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 7967 ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR]](s32), [[OR1]](s32) 7968 ; VI: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) 7969 ; GFX9-LABEL: name: test_load_local_v2s32_align2 7970 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 7971 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 7972 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 7973 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 7974 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 7975 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 7976 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 7977 ; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 7978 ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 7979 ; GFX9: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 7980 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 7981 ; GFX9: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 7982 ; GFX9: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 7983 ; GFX9: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 7984 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C3]](s32) 7985 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 2 + 4, addrspace 3) 7986 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 7987 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 2 + 6, addrspace 3) 7988 ; GFX9: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 7989 ; GFX9: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C1]] 7990 ; GFX9: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 7991 ; GFX9: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C1]] 7992 ; GFX9: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C2]](s32) 7993 ; GFX9: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 7994 ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR]](s32), [[OR1]](s32) 7995 ; GFX9: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) 7996 ; GFX9-UNALIGNED-LABEL: name: test_load_local_v2s32_align2 7997 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 7998 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 8, align 2, addrspace 3) 7999 ; GFX9-UNALIGNED: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x s32>) 8000 %0:_(p3) = COPY $vgpr0 8001 %1:_(<2 x s32>) = G_LOAD %0 :: (load 8, align 2, addrspace 3) 8002 $vgpr0_vgpr1 = COPY %1 8003... 8004 8005--- 8006name: test_load_local_v2s32_align1 8007body: | 8008 bb.0: 8009 liveins: $vgpr0 8010 8011 ; SI-LABEL: name: test_load_local_v2s32_align1 8012 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 8013 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 8014 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 8015 ; SI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 8016 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 8017 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 8018 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 8019 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 8020 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 8021 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 8022 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 8023 ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 8024 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 8025 ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 8026 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 8027 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 8028 ; SI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 8029 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 8030 ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 8031 ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 8032 ; SI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 8033 ; SI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 8034 ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 8035 ; SI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 8036 ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 8037 ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 8038 ; SI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 8039 ; SI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 8040 ; SI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 8041 ; SI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 8042 ; SI: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C7]](s32) 8043 ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 8044 ; SI: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 8045 ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 8046 ; SI: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 8047 ; SI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 8048 ; SI: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 8049 ; SI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 8050 ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 8051 ; SI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 8052 ; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 8053 ; SI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 8054 ; SI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 8055 ; SI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 8056 ; SI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 8057 ; SI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 8058 ; SI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 8059 ; SI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 8060 ; SI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 8061 ; SI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 8062 ; SI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 8063 ; SI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 8064 ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32) 8065 ; SI: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) 8066 ; CI-LABEL: name: test_load_local_v2s32_align1 8067 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 8068 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 8069 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 8070 ; CI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 8071 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 8072 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 8073 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 8074 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 8075 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 8076 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 8077 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 8078 ; CI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 8079 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 8080 ; CI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 8081 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 8082 ; CI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 8083 ; CI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 8084 ; CI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 8085 ; CI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 8086 ; CI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 8087 ; CI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 8088 ; CI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 8089 ; CI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 8090 ; CI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 8091 ; CI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 8092 ; CI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 8093 ; CI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 8094 ; CI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 8095 ; CI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 8096 ; CI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 8097 ; CI: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C7]](s32) 8098 ; CI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 8099 ; CI: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 8100 ; CI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 8101 ; CI: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 8102 ; CI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 8103 ; CI: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 8104 ; CI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 8105 ; CI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 8106 ; CI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 8107 ; CI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 8108 ; CI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 8109 ; CI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 8110 ; CI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 8111 ; CI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 8112 ; CI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 8113 ; CI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 8114 ; CI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 8115 ; CI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 8116 ; CI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 8117 ; CI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 8118 ; CI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 8119 ; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32) 8120 ; CI: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) 8121 ; CI-DS128-LABEL: name: test_load_local_v2s32_align1 8122 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 8123 ; CI-DS128: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 8124 ; CI-DS128: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 8125 ; CI-DS128: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 8126 ; CI-DS128: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 8127 ; CI-DS128: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 8128 ; CI-DS128: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 8129 ; CI-DS128: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 8130 ; CI-DS128: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 8131 ; CI-DS128: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 8132 ; CI-DS128: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 8133 ; CI-DS128: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 8134 ; CI-DS128: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 8135 ; CI-DS128: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 8136 ; CI-DS128: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 8137 ; CI-DS128: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 8138 ; CI-DS128: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 8139 ; CI-DS128: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 8140 ; CI-DS128: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 8141 ; CI-DS128: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 8142 ; CI-DS128: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 8143 ; CI-DS128: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 8144 ; CI-DS128: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 8145 ; CI-DS128: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 8146 ; CI-DS128: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 8147 ; CI-DS128: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 8148 ; CI-DS128: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 8149 ; CI-DS128: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 8150 ; CI-DS128: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 8151 ; CI-DS128: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 8152 ; CI-DS128: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C7]](s32) 8153 ; CI-DS128: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 8154 ; CI-DS128: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 8155 ; CI-DS128: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 8156 ; CI-DS128: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 8157 ; CI-DS128: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 8158 ; CI-DS128: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 8159 ; CI-DS128: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 8160 ; CI-DS128: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 8161 ; CI-DS128: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 8162 ; CI-DS128: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 8163 ; CI-DS128: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 8164 ; CI-DS128: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 8165 ; CI-DS128: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 8166 ; CI-DS128: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 8167 ; CI-DS128: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 8168 ; CI-DS128: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 8169 ; CI-DS128: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 8170 ; CI-DS128: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 8171 ; CI-DS128: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 8172 ; CI-DS128: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 8173 ; CI-DS128: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 8174 ; CI-DS128: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32) 8175 ; CI-DS128: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) 8176 ; VI-LABEL: name: test_load_local_v2s32_align1 8177 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 8178 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 8179 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 8180 ; VI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 8181 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 8182 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 8183 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 8184 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 8185 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 8186 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 8187 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 8188 ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 8189 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 8190 ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 8191 ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 8192 ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 8193 ; VI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 8194 ; VI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 8195 ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 8196 ; VI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 8197 ; VI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 8198 ; VI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 8199 ; VI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 8200 ; VI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 8201 ; VI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 8202 ; VI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 8203 ; VI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 8204 ; VI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 8205 ; VI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 8206 ; VI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 8207 ; VI: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C7]](s32) 8208 ; VI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 8209 ; VI: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 8210 ; VI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 8211 ; VI: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 8212 ; VI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 8213 ; VI: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 8214 ; VI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 8215 ; VI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 8216 ; VI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 8217 ; VI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 8218 ; VI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 8219 ; VI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 8220 ; VI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 8221 ; VI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 8222 ; VI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 8223 ; VI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 8224 ; VI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 8225 ; VI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 8226 ; VI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 8227 ; VI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 8228 ; VI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 8229 ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32) 8230 ; VI: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) 8231 ; GFX9-LABEL: name: test_load_local_v2s32_align1 8232 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 8233 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 8234 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 8235 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 8236 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 8237 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 8238 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 8239 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 8240 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 8241 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 8242 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 8243 ; GFX9: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 8244 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 8245 ; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 8246 ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 8247 ; GFX9: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 8248 ; GFX9: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 8249 ; GFX9: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 8250 ; GFX9: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 8251 ; GFX9: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 8252 ; GFX9: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 8253 ; GFX9: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 8254 ; GFX9: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 8255 ; GFX9: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 8256 ; GFX9: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 8257 ; GFX9: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 8258 ; GFX9: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 8259 ; GFX9: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 8260 ; GFX9: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 8261 ; GFX9: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 8262 ; GFX9: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C7]](s32) 8263 ; GFX9: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 8264 ; GFX9: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 8265 ; GFX9: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 8266 ; GFX9: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 8267 ; GFX9: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 8268 ; GFX9: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 8269 ; GFX9: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 8270 ; GFX9: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 8271 ; GFX9: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 8272 ; GFX9: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 8273 ; GFX9: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 8274 ; GFX9: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 8275 ; GFX9: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 8276 ; GFX9: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 8277 ; GFX9: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 8278 ; GFX9: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 8279 ; GFX9: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 8280 ; GFX9: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 8281 ; GFX9: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 8282 ; GFX9: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 8283 ; GFX9: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 8284 ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32) 8285 ; GFX9: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) 8286 ; GFX9-UNALIGNED-LABEL: name: test_load_local_v2s32_align1 8287 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 8288 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 8, align 1, addrspace 3) 8289 ; GFX9-UNALIGNED: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x s32>) 8290 %0:_(p3) = COPY $vgpr0 8291 %1:_(<2 x s32>) = G_LOAD %0 :: (load 8, align 1, addrspace 3) 8292 $vgpr0_vgpr1 = COPY %1 8293... 8294 8295--- 8296name: test_load_local_v3s32_align16 8297body: | 8298 bb.0: 8299 liveins: $vgpr0 8300 8301 ; SI-LABEL: name: test_load_local_v3s32_align16 8302 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 8303 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 8304 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 8305 ; SI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 8306 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 8307 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 8308 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 8309 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 8310 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 8311 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 8312 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 8313 ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 8314 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 8315 ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 8316 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 8317 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 8318 ; SI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 8319 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 8320 ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 8321 ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 8322 ; SI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 8323 ; SI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 8324 ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 8325 ; SI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 8326 ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 8327 ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 8328 ; SI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 8329 ; SI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 8330 ; SI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 8331 ; SI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 8332 ; SI: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C7]](s32) 8333 ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 8334 ; SI: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 8335 ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 8336 ; SI: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 8337 ; SI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 8338 ; SI: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 8339 ; SI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 8340 ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 8341 ; SI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 8342 ; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 8343 ; SI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 8344 ; SI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 8345 ; SI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 8346 ; SI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 8347 ; SI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 8348 ; SI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 8349 ; SI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 8350 ; SI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 8351 ; SI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 8352 ; SI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 8353 ; SI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 8354 ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32) 8355 ; SI: [[PTR_ADD7:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 8356 ; SI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p3) :: (load 1 + 8, addrspace 3) 8357 ; SI: [[PTR_ADD8:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 8358 ; SI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p3) :: (load 1 + 9, addrspace 3) 8359 ; SI: [[PTR_ADD9:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 8360 ; SI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p3) :: (load 1 + 10, addrspace 3) 8361 ; SI: [[PTR_ADD10:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 8362 ; SI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p3) :: (load 1 + 11, addrspace 3) 8363 ; SI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 8364 ; SI: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 8365 ; SI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 8366 ; SI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 8367 ; SI: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 8368 ; SI: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 8369 ; SI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 8370 ; SI: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 8371 ; SI: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 8372 ; SI: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 8373 ; SI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 8374 ; SI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 8375 ; SI: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 8376 ; SI: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 8377 ; SI: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF 8378 ; SI: [[INSERT:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[DEF]], [[BUILD_VECTOR]](<2 x s32>), 0 8379 ; SI: [[INSERT1:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT]], [[OR8]](s32), 64 8380 ; SI: $vgpr0_vgpr1_vgpr2 = COPY [[INSERT1]](<3 x s32>) 8381 ; CI-LABEL: name: test_load_local_v3s32_align16 8382 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 8383 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 8384 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 8385 ; CI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 8386 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 8387 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 8388 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 8389 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 8390 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 8391 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 8392 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 8393 ; CI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 8394 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 8395 ; CI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 8396 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 8397 ; CI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 8398 ; CI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 8399 ; CI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 8400 ; CI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 8401 ; CI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 8402 ; CI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 8403 ; CI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 8404 ; CI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 8405 ; CI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 8406 ; CI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 8407 ; CI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 8408 ; CI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 8409 ; CI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 8410 ; CI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 8411 ; CI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 8412 ; CI: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C7]](s32) 8413 ; CI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 8414 ; CI: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 8415 ; CI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 8416 ; CI: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 8417 ; CI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 8418 ; CI: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 8419 ; CI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 8420 ; CI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 8421 ; CI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 8422 ; CI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 8423 ; CI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 8424 ; CI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 8425 ; CI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 8426 ; CI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 8427 ; CI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 8428 ; CI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 8429 ; CI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 8430 ; CI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 8431 ; CI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 8432 ; CI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 8433 ; CI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 8434 ; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32) 8435 ; CI: [[PTR_ADD7:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 8436 ; CI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p3) :: (load 1 + 8, addrspace 3) 8437 ; CI: [[PTR_ADD8:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 8438 ; CI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p3) :: (load 1 + 9, addrspace 3) 8439 ; CI: [[PTR_ADD9:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 8440 ; CI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p3) :: (load 1 + 10, addrspace 3) 8441 ; CI: [[PTR_ADD10:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 8442 ; CI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p3) :: (load 1 + 11, addrspace 3) 8443 ; CI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 8444 ; CI: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 8445 ; CI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 8446 ; CI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 8447 ; CI: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 8448 ; CI: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 8449 ; CI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 8450 ; CI: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 8451 ; CI: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 8452 ; CI: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 8453 ; CI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 8454 ; CI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 8455 ; CI: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 8456 ; CI: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 8457 ; CI: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF 8458 ; CI: [[INSERT:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[DEF]], [[BUILD_VECTOR]](<2 x s32>), 0 8459 ; CI: [[INSERT1:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT]], [[OR8]](s32), 64 8460 ; CI: $vgpr0_vgpr1_vgpr2 = COPY [[INSERT1]](<3 x s32>) 8461 ; CI-DS128-LABEL: name: test_load_local_v3s32_align16 8462 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 8463 ; CI-DS128: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 8464 ; CI-DS128: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 8465 ; CI-DS128: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 8466 ; CI-DS128: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 8467 ; CI-DS128: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 8468 ; CI-DS128: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 8469 ; CI-DS128: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 8470 ; CI-DS128: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 8471 ; CI-DS128: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 8472 ; CI-DS128: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 8473 ; CI-DS128: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 8474 ; CI-DS128: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 8475 ; CI-DS128: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 8476 ; CI-DS128: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 8477 ; CI-DS128: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 8478 ; CI-DS128: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 8479 ; CI-DS128: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 8480 ; CI-DS128: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 8481 ; CI-DS128: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 8482 ; CI-DS128: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 8483 ; CI-DS128: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 8484 ; CI-DS128: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 8485 ; CI-DS128: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 8486 ; CI-DS128: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 8487 ; CI-DS128: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 8488 ; CI-DS128: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 8489 ; CI-DS128: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 8490 ; CI-DS128: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 8491 ; CI-DS128: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 8492 ; CI-DS128: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C7]](s32) 8493 ; CI-DS128: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 8494 ; CI-DS128: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 8495 ; CI-DS128: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 8496 ; CI-DS128: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 8497 ; CI-DS128: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 8498 ; CI-DS128: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 8499 ; CI-DS128: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 8500 ; CI-DS128: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 8501 ; CI-DS128: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 8502 ; CI-DS128: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 8503 ; CI-DS128: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 8504 ; CI-DS128: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 8505 ; CI-DS128: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 8506 ; CI-DS128: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 8507 ; CI-DS128: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 8508 ; CI-DS128: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 8509 ; CI-DS128: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 8510 ; CI-DS128: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 8511 ; CI-DS128: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 8512 ; CI-DS128: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 8513 ; CI-DS128: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 8514 ; CI-DS128: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32) 8515 ; CI-DS128: [[PTR_ADD7:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 8516 ; CI-DS128: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p3) :: (load 1 + 8, addrspace 3) 8517 ; CI-DS128: [[PTR_ADD8:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 8518 ; CI-DS128: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p3) :: (load 1 + 9, addrspace 3) 8519 ; CI-DS128: [[PTR_ADD9:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 8520 ; CI-DS128: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p3) :: (load 1 + 10, addrspace 3) 8521 ; CI-DS128: [[PTR_ADD10:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 8522 ; CI-DS128: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p3) :: (load 1 + 11, addrspace 3) 8523 ; CI-DS128: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 8524 ; CI-DS128: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 8525 ; CI-DS128: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 8526 ; CI-DS128: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 8527 ; CI-DS128: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 8528 ; CI-DS128: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 8529 ; CI-DS128: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 8530 ; CI-DS128: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 8531 ; CI-DS128: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 8532 ; CI-DS128: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 8533 ; CI-DS128: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 8534 ; CI-DS128: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 8535 ; CI-DS128: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 8536 ; CI-DS128: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 8537 ; CI-DS128: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF 8538 ; CI-DS128: [[INSERT:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[DEF]], [[BUILD_VECTOR]](<2 x s32>), 0 8539 ; CI-DS128: [[INSERT1:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT]], [[OR8]](s32), 64 8540 ; CI-DS128: $vgpr0_vgpr1_vgpr2 = COPY [[INSERT1]](<3 x s32>) 8541 ; VI-LABEL: name: test_load_local_v3s32_align16 8542 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 8543 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 8544 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 8545 ; VI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 8546 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 8547 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 8548 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 8549 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 8550 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 8551 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 8552 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 8553 ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 8554 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 8555 ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 8556 ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 8557 ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 8558 ; VI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 8559 ; VI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 8560 ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 8561 ; VI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 8562 ; VI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 8563 ; VI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 8564 ; VI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 8565 ; VI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 8566 ; VI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 8567 ; VI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 8568 ; VI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 8569 ; VI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 8570 ; VI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 8571 ; VI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 8572 ; VI: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C7]](s32) 8573 ; VI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 8574 ; VI: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 8575 ; VI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 8576 ; VI: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 8577 ; VI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 8578 ; VI: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 8579 ; VI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 8580 ; VI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 8581 ; VI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 8582 ; VI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 8583 ; VI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 8584 ; VI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 8585 ; VI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 8586 ; VI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 8587 ; VI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 8588 ; VI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 8589 ; VI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 8590 ; VI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 8591 ; VI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 8592 ; VI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 8593 ; VI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 8594 ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32) 8595 ; VI: [[PTR_ADD7:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 8596 ; VI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p3) :: (load 1 + 8, addrspace 3) 8597 ; VI: [[PTR_ADD8:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 8598 ; VI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p3) :: (load 1 + 9, addrspace 3) 8599 ; VI: [[PTR_ADD9:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 8600 ; VI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p3) :: (load 1 + 10, addrspace 3) 8601 ; VI: [[PTR_ADD10:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 8602 ; VI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p3) :: (load 1 + 11, addrspace 3) 8603 ; VI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 8604 ; VI: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 8605 ; VI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 8606 ; VI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 8607 ; VI: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 8608 ; VI: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 8609 ; VI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 8610 ; VI: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 8611 ; VI: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 8612 ; VI: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 8613 ; VI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 8614 ; VI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 8615 ; VI: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 8616 ; VI: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 8617 ; VI: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF 8618 ; VI: [[INSERT:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[DEF]], [[BUILD_VECTOR]](<2 x s32>), 0 8619 ; VI: [[INSERT1:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT]], [[OR8]](s32), 64 8620 ; VI: $vgpr0_vgpr1_vgpr2 = COPY [[INSERT1]](<3 x s32>) 8621 ; GFX9-LABEL: name: test_load_local_v3s32_align16 8622 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 8623 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 8624 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 8625 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 8626 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 8627 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 8628 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 8629 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 8630 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 8631 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 8632 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 8633 ; GFX9: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 8634 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 8635 ; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 8636 ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 8637 ; GFX9: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 8638 ; GFX9: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 8639 ; GFX9: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 8640 ; GFX9: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 8641 ; GFX9: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 8642 ; GFX9: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 8643 ; GFX9: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 8644 ; GFX9: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 8645 ; GFX9: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 8646 ; GFX9: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 8647 ; GFX9: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 8648 ; GFX9: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 8649 ; GFX9: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 8650 ; GFX9: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 8651 ; GFX9: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 8652 ; GFX9: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C7]](s32) 8653 ; GFX9: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 8654 ; GFX9: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 8655 ; GFX9: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 8656 ; GFX9: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 8657 ; GFX9: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 8658 ; GFX9: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 8659 ; GFX9: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 8660 ; GFX9: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 8661 ; GFX9: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 8662 ; GFX9: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 8663 ; GFX9: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 8664 ; GFX9: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 8665 ; GFX9: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 8666 ; GFX9: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 8667 ; GFX9: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 8668 ; GFX9: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 8669 ; GFX9: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 8670 ; GFX9: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 8671 ; GFX9: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 8672 ; GFX9: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 8673 ; GFX9: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 8674 ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32) 8675 ; GFX9: [[PTR_ADD7:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 8676 ; GFX9: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p3) :: (load 1 + 8, addrspace 3) 8677 ; GFX9: [[PTR_ADD8:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 8678 ; GFX9: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p3) :: (load 1 + 9, addrspace 3) 8679 ; GFX9: [[PTR_ADD9:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 8680 ; GFX9: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p3) :: (load 1 + 10, addrspace 3) 8681 ; GFX9: [[PTR_ADD10:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 8682 ; GFX9: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p3) :: (load 1 + 11, addrspace 3) 8683 ; GFX9: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 8684 ; GFX9: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 8685 ; GFX9: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 8686 ; GFX9: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 8687 ; GFX9: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 8688 ; GFX9: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 8689 ; GFX9: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 8690 ; GFX9: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 8691 ; GFX9: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 8692 ; GFX9: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 8693 ; GFX9: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 8694 ; GFX9: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 8695 ; GFX9: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 8696 ; GFX9: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 8697 ; GFX9: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF 8698 ; GFX9: [[INSERT:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[DEF]], [[BUILD_VECTOR]](<2 x s32>), 0 8699 ; GFX9: [[INSERT1:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT]], [[OR8]](s32), 64 8700 ; GFX9: $vgpr0_vgpr1_vgpr2 = COPY [[INSERT1]](<3 x s32>) 8701 ; GFX9-UNALIGNED-LABEL: name: test_load_local_v3s32_align16 8702 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 8703 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(<3 x s32>) = G_LOAD [[COPY]](p3) :: (load 12, align 1, addrspace 3) 8704 ; GFX9-UNALIGNED: $vgpr0_vgpr1_vgpr2 = COPY [[LOAD]](<3 x s32>) 8705 %0:_(p3) = COPY $vgpr0 8706 %1:_(<3 x s32>) = G_LOAD %0 :: (load 12, align 1, addrspace 3) 8707 $vgpr0_vgpr1_vgpr2 = COPY %1 8708... 8709 8710--- 8711name: test_load_local_v3s32_align4 8712body: | 8713 bb.0: 8714 liveins: $vgpr0 8715 8716 ; SI-LABEL: name: test_load_local_v3s32_align4 8717 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 8718 ; SI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 8, align 4, addrspace 3) 8719 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 8720 ; SI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 8721 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 4 + 8, addrspace 3) 8722 ; SI: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF 8723 ; SI: [[INSERT:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[DEF]], [[LOAD]](<2 x s32>), 0 8724 ; SI: [[INSERT1:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT]], [[LOAD1]](s32), 64 8725 ; SI: $vgpr0_vgpr1_vgpr2 = COPY [[INSERT1]](<3 x s32>) 8726 ; CI-LABEL: name: test_load_local_v3s32_align4 8727 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 8728 ; CI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 8, align 4, addrspace 3) 8729 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 8730 ; CI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 8731 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 4 + 8, addrspace 3) 8732 ; CI: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF 8733 ; CI: [[INSERT:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[DEF]], [[LOAD]](<2 x s32>), 0 8734 ; CI: [[INSERT1:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT]], [[LOAD1]](s32), 64 8735 ; CI: $vgpr0_vgpr1_vgpr2 = COPY [[INSERT1]](<3 x s32>) 8736 ; CI-DS128-LABEL: name: test_load_local_v3s32_align4 8737 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 8738 ; CI-DS128: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 8, align 4, addrspace 3) 8739 ; CI-DS128: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 8740 ; CI-DS128: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 8741 ; CI-DS128: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 4 + 8, addrspace 3) 8742 ; CI-DS128: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF 8743 ; CI-DS128: [[INSERT:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[DEF]], [[LOAD]](<2 x s32>), 0 8744 ; CI-DS128: [[INSERT1:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT]], [[LOAD1]](s32), 64 8745 ; CI-DS128: $vgpr0_vgpr1_vgpr2 = COPY [[INSERT1]](<3 x s32>) 8746 ; VI-LABEL: name: test_load_local_v3s32_align4 8747 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 8748 ; VI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 8, align 4, addrspace 3) 8749 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 8750 ; VI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 8751 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 4 + 8, addrspace 3) 8752 ; VI: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF 8753 ; VI: [[INSERT:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[DEF]], [[LOAD]](<2 x s32>), 0 8754 ; VI: [[INSERT1:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT]], [[LOAD1]](s32), 64 8755 ; VI: $vgpr0_vgpr1_vgpr2 = COPY [[INSERT1]](<3 x s32>) 8756 ; GFX9-LABEL: name: test_load_local_v3s32_align4 8757 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 8758 ; GFX9: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 8, align 4, addrspace 3) 8759 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 8760 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 8761 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 4 + 8, addrspace 3) 8762 ; GFX9: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF 8763 ; GFX9: [[INSERT:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[DEF]], [[LOAD]](<2 x s32>), 0 8764 ; GFX9: [[INSERT1:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT]], [[LOAD1]](s32), 64 8765 ; GFX9: $vgpr0_vgpr1_vgpr2 = COPY [[INSERT1]](<3 x s32>) 8766 ; GFX9-UNALIGNED-LABEL: name: test_load_local_v3s32_align4 8767 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 8768 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(<3 x s32>) = G_LOAD [[COPY]](p3) :: (load 12, align 4, addrspace 3) 8769 ; GFX9-UNALIGNED: $vgpr0_vgpr1_vgpr2 = COPY [[LOAD]](<3 x s32>) 8770 %0:_(p3) = COPY $vgpr0 8771 %1:_(<3 x s32>) = G_LOAD %0 :: (load 12, align 4, addrspace 3) 8772 $vgpr0_vgpr1_vgpr2 = COPY %1 8773... 8774 8775--- 8776name: test_load_local_v4s32_align16 8777body: | 8778 bb.0: 8779 liveins: $vgpr0 8780 8781 ; SI-LABEL: name: test_load_local_v4s32_align16 8782 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 8783 ; SI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 8, align 16, addrspace 3) 8784 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 8785 ; SI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 8786 ; SI: [[LOAD1:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[PTR_ADD]](p3) :: (load 8 + 8, addrspace 3) 8787 ; SI: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s32>) = G_CONCAT_VECTORS [[LOAD]](<2 x s32>), [[LOAD1]](<2 x s32>) 8788 ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[CONCAT_VECTORS]](<4 x s32>) 8789 ; CI-LABEL: name: test_load_local_v4s32_align16 8790 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 8791 ; CI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 8, align 16, addrspace 3) 8792 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 8793 ; CI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 8794 ; CI: [[LOAD1:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[PTR_ADD]](p3) :: (load 8 + 8, addrspace 3) 8795 ; CI: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s32>) = G_CONCAT_VECTORS [[LOAD]](<2 x s32>), [[LOAD1]](<2 x s32>) 8796 ; CI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[CONCAT_VECTORS]](<4 x s32>) 8797 ; CI-DS128-LABEL: name: test_load_local_v4s32_align16 8798 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 8799 ; CI-DS128: [[LOAD:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[COPY]](p3) :: (load 16, addrspace 3) 8800 ; CI-DS128: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[LOAD]](<4 x s32>) 8801 ; VI-LABEL: name: test_load_local_v4s32_align16 8802 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 8803 ; VI: [[LOAD:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[COPY]](p3) :: (load 16, addrspace 3) 8804 ; VI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[LOAD]](<4 x s32>) 8805 ; GFX9-LABEL: name: test_load_local_v4s32_align16 8806 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 8807 ; GFX9: [[LOAD:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[COPY]](p3) :: (load 16, addrspace 3) 8808 ; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[LOAD]](<4 x s32>) 8809 ; GFX9-UNALIGNED-LABEL: name: test_load_local_v4s32_align16 8810 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 8811 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[COPY]](p3) :: (load 16, addrspace 3) 8812 ; GFX9-UNALIGNED: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[LOAD]](<4 x s32>) 8813 %0:_(p3) = COPY $vgpr0 8814 %1:_(<4 x s32>) = G_LOAD %0 :: (load 16, align 16, addrspace 3) 8815 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1 8816... 8817 8818--- 8819name: test_load_local_v4s32_align8 8820body: | 8821 bb.0: 8822 liveins: $vgpr0 8823 8824 ; SI-LABEL: name: test_load_local_v4s32_align8 8825 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 8826 ; SI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) 8827 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 8828 ; SI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 8829 ; SI: [[LOAD1:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[PTR_ADD]](p3) :: (load 8 + 8, addrspace 3) 8830 ; SI: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s32>) = G_CONCAT_VECTORS [[LOAD]](<2 x s32>), [[LOAD1]](<2 x s32>) 8831 ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[CONCAT_VECTORS]](<4 x s32>) 8832 ; CI-LABEL: name: test_load_local_v4s32_align8 8833 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 8834 ; CI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) 8835 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 8836 ; CI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 8837 ; CI: [[LOAD1:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[PTR_ADD]](p3) :: (load 8 + 8, addrspace 3) 8838 ; CI: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s32>) = G_CONCAT_VECTORS [[LOAD]](<2 x s32>), [[LOAD1]](<2 x s32>) 8839 ; CI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[CONCAT_VECTORS]](<4 x s32>) 8840 ; CI-DS128-LABEL: name: test_load_local_v4s32_align8 8841 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 8842 ; CI-DS128: [[LOAD:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[COPY]](p3) :: (load 16, align 8, addrspace 3) 8843 ; CI-DS128: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[LOAD]](<4 x s32>) 8844 ; VI-LABEL: name: test_load_local_v4s32_align8 8845 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 8846 ; VI: [[LOAD:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[COPY]](p3) :: (load 16, align 8, addrspace 3) 8847 ; VI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[LOAD]](<4 x s32>) 8848 ; GFX9-LABEL: name: test_load_local_v4s32_align8 8849 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 8850 ; GFX9: [[LOAD:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[COPY]](p3) :: (load 16, align 8, addrspace 3) 8851 ; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[LOAD]](<4 x s32>) 8852 ; GFX9-UNALIGNED-LABEL: name: test_load_local_v4s32_align8 8853 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 8854 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[COPY]](p3) :: (load 16, align 8, addrspace 3) 8855 ; GFX9-UNALIGNED: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[LOAD]](<4 x s32>) 8856 %0:_(p3) = COPY $vgpr0 8857 %1:_(<4 x s32>) = G_LOAD %0 :: (load 16, align 8, addrspace 3) 8858 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1 8859... 8860 8861--- 8862name: test_load_local_v4s32_align4 8863body: | 8864 bb.0: 8865 liveins: $vgpr0 8866 8867 ; SI-LABEL: name: test_load_local_v4s32_align4 8868 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 8869 ; SI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 8, align 4, addrspace 3) 8870 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 8871 ; SI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 8872 ; SI: [[LOAD1:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[PTR_ADD]](p3) :: (load 8 + 8, align 4, addrspace 3) 8873 ; SI: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s32>) = G_CONCAT_VECTORS [[LOAD]](<2 x s32>), [[LOAD1]](<2 x s32>) 8874 ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[CONCAT_VECTORS]](<4 x s32>) 8875 ; CI-LABEL: name: test_load_local_v4s32_align4 8876 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 8877 ; CI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 8, align 4, addrspace 3) 8878 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 8879 ; CI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 8880 ; CI: [[LOAD1:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[PTR_ADD]](p3) :: (load 8 + 8, align 4, addrspace 3) 8881 ; CI: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s32>) = G_CONCAT_VECTORS [[LOAD]](<2 x s32>), [[LOAD1]](<2 x s32>) 8882 ; CI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[CONCAT_VECTORS]](<4 x s32>) 8883 ; CI-DS128-LABEL: name: test_load_local_v4s32_align4 8884 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 8885 ; CI-DS128: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) 8886 ; CI-DS128: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 8887 ; CI-DS128: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 8888 ; CI-DS128: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 4 + 4, addrspace 3) 8889 ; CI-DS128: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 8890 ; CI-DS128: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 8891 ; CI-DS128: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 4 + 8, addrspace 3) 8892 ; CI-DS128: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 8893 ; CI-DS128: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 8894 ; CI-DS128: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 4 + 12, addrspace 3) 8895 ; CI-DS128: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32) 8896 ; CI-DS128: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>) 8897 ; VI-LABEL: name: test_load_local_v4s32_align4 8898 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 8899 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) 8900 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 8901 ; VI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 8902 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 4 + 4, addrspace 3) 8903 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 8904 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 8905 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 4 + 8, addrspace 3) 8906 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 8907 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 8908 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 4 + 12, addrspace 3) 8909 ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32) 8910 ; VI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>) 8911 ; GFX9-LABEL: name: test_load_local_v4s32_align4 8912 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 8913 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) 8914 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 8915 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 8916 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 4 + 4, addrspace 3) 8917 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 8918 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 8919 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 4 + 8, addrspace 3) 8920 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 8921 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 8922 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 4 + 12, addrspace 3) 8923 ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32) 8924 ; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>) 8925 ; GFX9-UNALIGNED-LABEL: name: test_load_local_v4s32_align4 8926 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 8927 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[COPY]](p3) :: (load 16, align 4, addrspace 3) 8928 ; GFX9-UNALIGNED: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[LOAD]](<4 x s32>) 8929 %0:_(p3) = COPY $vgpr0 8930 %1:_(<4 x s32>) = G_LOAD %0 :: (load 16, align 4, addrspace 3) 8931 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1 8932... 8933 8934--- 8935name: test_load_local_v4s32_align2 8936body: | 8937 bb.0: 8938 liveins: $vgpr0 8939 8940 ; SI-LABEL: name: test_load_local_v4s32_align2 8941 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 8942 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 8943 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 8944 ; SI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 8945 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 8946 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 8947 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 8948 ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 8949 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 8950 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 8951 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 8952 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 8953 ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 8954 ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 8955 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C3]](s32) 8956 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 2 + 4, addrspace 3) 8957 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 8958 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 2 + 6, addrspace 3) 8959 ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 8960 ; SI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C1]] 8961 ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 8962 ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C1]] 8963 ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C2]](s32) 8964 ; SI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 8965 ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR]](s32), [[OR1]](s32) 8966 ; SI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 8967 ; SI: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 8968 ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 2 + 8, addrspace 3) 8969 ; SI: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 8970 ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 2 + 10, addrspace 3) 8971 ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 8972 ; SI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C1]] 8973 ; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 8974 ; SI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C1]] 8975 ; SI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C2]](s32) 8976 ; SI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL2]] 8977 ; SI: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C3]](s32) 8978 ; SI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 2 + 12, addrspace 3) 8979 ; SI: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD5]], [[C]](s32) 8980 ; SI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 2 + 14, addrspace 3) 8981 ; SI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 8982 ; SI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C1]] 8983 ; SI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 8984 ; SI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C1]] 8985 ; SI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C2]](s32) 8986 ; SI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND6]], [[SHL3]] 8987 ; SI: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR3]](s32) 8988 ; SI: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s32>) = G_CONCAT_VECTORS [[BUILD_VECTOR]](<2 x s32>), [[BUILD_VECTOR1]](<2 x s32>) 8989 ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[CONCAT_VECTORS]](<4 x s32>) 8990 ; CI-LABEL: name: test_load_local_v4s32_align2 8991 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 8992 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 8993 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 8994 ; CI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 8995 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 8996 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 8997 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 8998 ; CI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 8999 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 9000 ; CI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 9001 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 9002 ; CI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 9003 ; CI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 9004 ; CI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 9005 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C3]](s32) 9006 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 2 + 4, addrspace 3) 9007 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 9008 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 2 + 6, addrspace 3) 9009 ; CI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 9010 ; CI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C1]] 9011 ; CI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 9012 ; CI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C1]] 9013 ; CI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C2]](s32) 9014 ; CI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 9015 ; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR]](s32), [[OR1]](s32) 9016 ; CI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 9017 ; CI: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 9018 ; CI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 2 + 8, addrspace 3) 9019 ; CI: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 9020 ; CI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 2 + 10, addrspace 3) 9021 ; CI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 9022 ; CI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C1]] 9023 ; CI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 9024 ; CI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C1]] 9025 ; CI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C2]](s32) 9026 ; CI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL2]] 9027 ; CI: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C3]](s32) 9028 ; CI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 2 + 12, addrspace 3) 9029 ; CI: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD5]], [[C]](s32) 9030 ; CI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 2 + 14, addrspace 3) 9031 ; CI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 9032 ; CI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C1]] 9033 ; CI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 9034 ; CI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C1]] 9035 ; CI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C2]](s32) 9036 ; CI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND6]], [[SHL3]] 9037 ; CI: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR3]](s32) 9038 ; CI: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s32>) = G_CONCAT_VECTORS [[BUILD_VECTOR]](<2 x s32>), [[BUILD_VECTOR1]](<2 x s32>) 9039 ; CI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[CONCAT_VECTORS]](<4 x s32>) 9040 ; CI-DS128-LABEL: name: test_load_local_v4s32_align2 9041 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 9042 ; CI-DS128: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 9043 ; CI-DS128: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 9044 ; CI-DS128: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 9045 ; CI-DS128: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 9046 ; CI-DS128: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 9047 ; CI-DS128: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 9048 ; CI-DS128: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 9049 ; CI-DS128: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 9050 ; CI-DS128: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 9051 ; CI-DS128: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 9052 ; CI-DS128: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 9053 ; CI-DS128: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 9054 ; CI-DS128: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 9055 ; CI-DS128: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C3]](s32) 9056 ; CI-DS128: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 2 + 4, addrspace 3) 9057 ; CI-DS128: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 9058 ; CI-DS128: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 2 + 6, addrspace 3) 9059 ; CI-DS128: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 9060 ; CI-DS128: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C1]] 9061 ; CI-DS128: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 9062 ; CI-DS128: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C1]] 9063 ; CI-DS128: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C2]](s32) 9064 ; CI-DS128: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 9065 ; CI-DS128: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR]](s32), [[OR1]](s32) 9066 ; CI-DS128: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 9067 ; CI-DS128: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 9068 ; CI-DS128: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 2 + 8, addrspace 3) 9069 ; CI-DS128: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 9070 ; CI-DS128: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 2 + 10, addrspace 3) 9071 ; CI-DS128: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 9072 ; CI-DS128: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C1]] 9073 ; CI-DS128: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 9074 ; CI-DS128: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C1]] 9075 ; CI-DS128: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C2]](s32) 9076 ; CI-DS128: [[OR2:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL2]] 9077 ; CI-DS128: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C3]](s32) 9078 ; CI-DS128: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 2 + 12, addrspace 3) 9079 ; CI-DS128: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD5]], [[C]](s32) 9080 ; CI-DS128: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 2 + 14, addrspace 3) 9081 ; CI-DS128: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 9082 ; CI-DS128: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C1]] 9083 ; CI-DS128: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 9084 ; CI-DS128: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C1]] 9085 ; CI-DS128: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C2]](s32) 9086 ; CI-DS128: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND6]], [[SHL3]] 9087 ; CI-DS128: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR3]](s32) 9088 ; CI-DS128: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s32>) = G_CONCAT_VECTORS [[BUILD_VECTOR]](<2 x s32>), [[BUILD_VECTOR1]](<2 x s32>) 9089 ; CI-DS128: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[CONCAT_VECTORS]](<4 x s32>) 9090 ; VI-LABEL: name: test_load_local_v4s32_align2 9091 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 9092 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 9093 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 9094 ; VI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 9095 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 9096 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 9097 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 9098 ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 9099 ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 9100 ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 9101 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 9102 ; VI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 9103 ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 9104 ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 9105 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C3]](s32) 9106 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 2 + 4, addrspace 3) 9107 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 9108 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 2 + 6, addrspace 3) 9109 ; VI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 9110 ; VI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C1]] 9111 ; VI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 9112 ; VI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C1]] 9113 ; VI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C2]](s32) 9114 ; VI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 9115 ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR]](s32), [[OR1]](s32) 9116 ; VI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 9117 ; VI: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 9118 ; VI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 2 + 8, addrspace 3) 9119 ; VI: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 9120 ; VI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 2 + 10, addrspace 3) 9121 ; VI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 9122 ; VI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C1]] 9123 ; VI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 9124 ; VI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C1]] 9125 ; VI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C2]](s32) 9126 ; VI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL2]] 9127 ; VI: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C3]](s32) 9128 ; VI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 2 + 12, addrspace 3) 9129 ; VI: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD5]], [[C]](s32) 9130 ; VI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 2 + 14, addrspace 3) 9131 ; VI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 9132 ; VI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C1]] 9133 ; VI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 9134 ; VI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C1]] 9135 ; VI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C2]](s32) 9136 ; VI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND6]], [[SHL3]] 9137 ; VI: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR3]](s32) 9138 ; VI: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s32>) = G_CONCAT_VECTORS [[BUILD_VECTOR]](<2 x s32>), [[BUILD_VECTOR1]](<2 x s32>) 9139 ; VI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[CONCAT_VECTORS]](<4 x s32>) 9140 ; GFX9-LABEL: name: test_load_local_v4s32_align2 9141 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 9142 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 9143 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 9144 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 9145 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 9146 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 9147 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 9148 ; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 9149 ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 9150 ; GFX9: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 9151 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 9152 ; GFX9: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 9153 ; GFX9: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 9154 ; GFX9: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 9155 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C3]](s32) 9156 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 2 + 4, addrspace 3) 9157 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 9158 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 2 + 6, addrspace 3) 9159 ; GFX9: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 9160 ; GFX9: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C1]] 9161 ; GFX9: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 9162 ; GFX9: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C1]] 9163 ; GFX9: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C2]](s32) 9164 ; GFX9: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 9165 ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR]](s32), [[OR1]](s32) 9166 ; GFX9: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 9167 ; GFX9: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 9168 ; GFX9: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 2 + 8, addrspace 3) 9169 ; GFX9: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 9170 ; GFX9: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 2 + 10, addrspace 3) 9171 ; GFX9: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 9172 ; GFX9: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C1]] 9173 ; GFX9: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 9174 ; GFX9: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C1]] 9175 ; GFX9: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C2]](s32) 9176 ; GFX9: [[OR2:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL2]] 9177 ; GFX9: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C3]](s32) 9178 ; GFX9: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 2 + 12, addrspace 3) 9179 ; GFX9: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD5]], [[C]](s32) 9180 ; GFX9: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 2 + 14, addrspace 3) 9181 ; GFX9: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 9182 ; GFX9: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C1]] 9183 ; GFX9: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 9184 ; GFX9: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C1]] 9185 ; GFX9: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C2]](s32) 9186 ; GFX9: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND6]], [[SHL3]] 9187 ; GFX9: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR3]](s32) 9188 ; GFX9: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s32>) = G_CONCAT_VECTORS [[BUILD_VECTOR]](<2 x s32>), [[BUILD_VECTOR1]](<2 x s32>) 9189 ; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[CONCAT_VECTORS]](<4 x s32>) 9190 ; GFX9-UNALIGNED-LABEL: name: test_load_local_v4s32_align2 9191 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 9192 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[COPY]](p3) :: (load 16, align 2, addrspace 3) 9193 ; GFX9-UNALIGNED: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[LOAD]](<4 x s32>) 9194 %0:_(p3) = COPY $vgpr0 9195 %1:_(<4 x s32>) = G_LOAD %0 :: (load 16, align 2, addrspace 3) 9196 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1 9197... 9198 9199--- 9200name: test_load_local_v4s32_align1 9201body: | 9202 bb.0: 9203 liveins: $vgpr0 9204 9205 ; SI-LABEL: name: test_load_local_v4s32_align1 9206 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 9207 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 9208 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 9209 ; SI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 9210 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 9211 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 9212 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 9213 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 9214 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 9215 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 9216 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 9217 ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 9218 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 9219 ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 9220 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 9221 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 9222 ; SI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 9223 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 9224 ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 9225 ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 9226 ; SI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 9227 ; SI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 9228 ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 9229 ; SI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 9230 ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 9231 ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 9232 ; SI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 9233 ; SI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 9234 ; SI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 9235 ; SI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 9236 ; SI: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C7]](s32) 9237 ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 9238 ; SI: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 9239 ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 9240 ; SI: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 9241 ; SI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 9242 ; SI: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 9243 ; SI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 9244 ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 9245 ; SI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 9246 ; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 9247 ; SI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 9248 ; SI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 9249 ; SI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 9250 ; SI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 9251 ; SI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 9252 ; SI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 9253 ; SI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 9254 ; SI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 9255 ; SI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 9256 ; SI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 9257 ; SI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 9258 ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32) 9259 ; SI: [[PTR_ADD7:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 9260 ; SI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p3) :: (load 1 + 8, addrspace 3) 9261 ; SI: [[PTR_ADD8:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 9262 ; SI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p3) :: (load 1 + 9, addrspace 3) 9263 ; SI: [[PTR_ADD9:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 9264 ; SI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p3) :: (load 1 + 10, addrspace 3) 9265 ; SI: [[PTR_ADD10:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 9266 ; SI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p3) :: (load 1 + 11, addrspace 3) 9267 ; SI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 9268 ; SI: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 9269 ; SI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 9270 ; SI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 9271 ; SI: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 9272 ; SI: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 9273 ; SI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 9274 ; SI: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 9275 ; SI: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 9276 ; SI: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 9277 ; SI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 9278 ; SI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 9279 ; SI: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 9280 ; SI: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 9281 ; SI: [[PTR_ADD11:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C7]](s32) 9282 ; SI: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p3) :: (load 1 + 12, addrspace 3) 9283 ; SI: [[PTR_ADD12:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C]](s32) 9284 ; SI: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p3) :: (load 1 + 13, addrspace 3) 9285 ; SI: [[PTR_ADD13:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C1]](s32) 9286 ; SI: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p3) :: (load 1 + 14, addrspace 3) 9287 ; SI: [[PTR_ADD14:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C2]](s32) 9288 ; SI: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p3) :: (load 1 + 15, addrspace 3) 9289 ; SI: [[COPY13:%[0-9]+]]:_(s32) = COPY [[LOAD12]](s32) 9290 ; SI: [[AND12:%[0-9]+]]:_(s32) = G_AND [[COPY13]], [[C3]] 9291 ; SI: [[COPY14:%[0-9]+]]:_(s32) = COPY [[LOAD13]](s32) 9292 ; SI: [[AND13:%[0-9]+]]:_(s32) = G_AND [[COPY14]], [[C3]] 9293 ; SI: [[SHL9:%[0-9]+]]:_(s32) = G_SHL [[AND13]], [[C4]](s32) 9294 ; SI: [[OR9:%[0-9]+]]:_(s32) = G_OR [[AND12]], [[SHL9]] 9295 ; SI: [[COPY15:%[0-9]+]]:_(s32) = COPY [[LOAD14]](s32) 9296 ; SI: [[AND14:%[0-9]+]]:_(s32) = G_AND [[COPY15]], [[C3]] 9297 ; SI: [[SHL10:%[0-9]+]]:_(s32) = G_SHL [[AND14]], [[C5]](s32) 9298 ; SI: [[OR10:%[0-9]+]]:_(s32) = G_OR [[OR9]], [[SHL10]] 9299 ; SI: [[COPY16:%[0-9]+]]:_(s32) = COPY [[LOAD15]](s32) 9300 ; SI: [[AND15:%[0-9]+]]:_(s32) = G_AND [[COPY16]], [[C3]] 9301 ; SI: [[SHL11:%[0-9]+]]:_(s32) = G_SHL [[AND15]], [[C6]](s32) 9302 ; SI: [[OR11:%[0-9]+]]:_(s32) = G_OR [[OR10]], [[SHL11]] 9303 ; SI: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR8]](s32), [[OR11]](s32) 9304 ; SI: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s32>) = G_CONCAT_VECTORS [[BUILD_VECTOR]](<2 x s32>), [[BUILD_VECTOR1]](<2 x s32>) 9305 ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[CONCAT_VECTORS]](<4 x s32>) 9306 ; CI-LABEL: name: test_load_local_v4s32_align1 9307 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 9308 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 9309 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 9310 ; CI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 9311 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 9312 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 9313 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 9314 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 9315 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 9316 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 9317 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 9318 ; CI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 9319 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 9320 ; CI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 9321 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 9322 ; CI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 9323 ; CI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 9324 ; CI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 9325 ; CI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 9326 ; CI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 9327 ; CI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 9328 ; CI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 9329 ; CI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 9330 ; CI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 9331 ; CI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 9332 ; CI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 9333 ; CI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 9334 ; CI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 9335 ; CI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 9336 ; CI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 9337 ; CI: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C7]](s32) 9338 ; CI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 9339 ; CI: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 9340 ; CI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 9341 ; CI: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 9342 ; CI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 9343 ; CI: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 9344 ; CI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 9345 ; CI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 9346 ; CI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 9347 ; CI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 9348 ; CI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 9349 ; CI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 9350 ; CI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 9351 ; CI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 9352 ; CI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 9353 ; CI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 9354 ; CI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 9355 ; CI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 9356 ; CI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 9357 ; CI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 9358 ; CI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 9359 ; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32) 9360 ; CI: [[PTR_ADD7:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 9361 ; CI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p3) :: (load 1 + 8, addrspace 3) 9362 ; CI: [[PTR_ADD8:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 9363 ; CI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p3) :: (load 1 + 9, addrspace 3) 9364 ; CI: [[PTR_ADD9:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 9365 ; CI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p3) :: (load 1 + 10, addrspace 3) 9366 ; CI: [[PTR_ADD10:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 9367 ; CI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p3) :: (load 1 + 11, addrspace 3) 9368 ; CI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 9369 ; CI: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 9370 ; CI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 9371 ; CI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 9372 ; CI: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 9373 ; CI: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 9374 ; CI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 9375 ; CI: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 9376 ; CI: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 9377 ; CI: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 9378 ; CI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 9379 ; CI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 9380 ; CI: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 9381 ; CI: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 9382 ; CI: [[PTR_ADD11:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C7]](s32) 9383 ; CI: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p3) :: (load 1 + 12, addrspace 3) 9384 ; CI: [[PTR_ADD12:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C]](s32) 9385 ; CI: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p3) :: (load 1 + 13, addrspace 3) 9386 ; CI: [[PTR_ADD13:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C1]](s32) 9387 ; CI: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p3) :: (load 1 + 14, addrspace 3) 9388 ; CI: [[PTR_ADD14:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C2]](s32) 9389 ; CI: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p3) :: (load 1 + 15, addrspace 3) 9390 ; CI: [[COPY13:%[0-9]+]]:_(s32) = COPY [[LOAD12]](s32) 9391 ; CI: [[AND12:%[0-9]+]]:_(s32) = G_AND [[COPY13]], [[C3]] 9392 ; CI: [[COPY14:%[0-9]+]]:_(s32) = COPY [[LOAD13]](s32) 9393 ; CI: [[AND13:%[0-9]+]]:_(s32) = G_AND [[COPY14]], [[C3]] 9394 ; CI: [[SHL9:%[0-9]+]]:_(s32) = G_SHL [[AND13]], [[C4]](s32) 9395 ; CI: [[OR9:%[0-9]+]]:_(s32) = G_OR [[AND12]], [[SHL9]] 9396 ; CI: [[COPY15:%[0-9]+]]:_(s32) = COPY [[LOAD14]](s32) 9397 ; CI: [[AND14:%[0-9]+]]:_(s32) = G_AND [[COPY15]], [[C3]] 9398 ; CI: [[SHL10:%[0-9]+]]:_(s32) = G_SHL [[AND14]], [[C5]](s32) 9399 ; CI: [[OR10:%[0-9]+]]:_(s32) = G_OR [[OR9]], [[SHL10]] 9400 ; CI: [[COPY16:%[0-9]+]]:_(s32) = COPY [[LOAD15]](s32) 9401 ; CI: [[AND15:%[0-9]+]]:_(s32) = G_AND [[COPY16]], [[C3]] 9402 ; CI: [[SHL11:%[0-9]+]]:_(s32) = G_SHL [[AND15]], [[C6]](s32) 9403 ; CI: [[OR11:%[0-9]+]]:_(s32) = G_OR [[OR10]], [[SHL11]] 9404 ; CI: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR8]](s32), [[OR11]](s32) 9405 ; CI: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s32>) = G_CONCAT_VECTORS [[BUILD_VECTOR]](<2 x s32>), [[BUILD_VECTOR1]](<2 x s32>) 9406 ; CI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[CONCAT_VECTORS]](<4 x s32>) 9407 ; CI-DS128-LABEL: name: test_load_local_v4s32_align1 9408 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 9409 ; CI-DS128: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 9410 ; CI-DS128: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 9411 ; CI-DS128: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 9412 ; CI-DS128: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 9413 ; CI-DS128: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 9414 ; CI-DS128: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 9415 ; CI-DS128: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 9416 ; CI-DS128: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 9417 ; CI-DS128: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 9418 ; CI-DS128: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 9419 ; CI-DS128: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 9420 ; CI-DS128: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 9421 ; CI-DS128: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 9422 ; CI-DS128: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 9423 ; CI-DS128: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 9424 ; CI-DS128: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 9425 ; CI-DS128: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 9426 ; CI-DS128: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 9427 ; CI-DS128: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 9428 ; CI-DS128: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 9429 ; CI-DS128: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 9430 ; CI-DS128: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 9431 ; CI-DS128: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 9432 ; CI-DS128: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 9433 ; CI-DS128: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 9434 ; CI-DS128: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 9435 ; CI-DS128: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 9436 ; CI-DS128: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 9437 ; CI-DS128: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 9438 ; CI-DS128: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C7]](s32) 9439 ; CI-DS128: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 9440 ; CI-DS128: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 9441 ; CI-DS128: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 9442 ; CI-DS128: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 9443 ; CI-DS128: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 9444 ; CI-DS128: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 9445 ; CI-DS128: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 9446 ; CI-DS128: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 9447 ; CI-DS128: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 9448 ; CI-DS128: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 9449 ; CI-DS128: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 9450 ; CI-DS128: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 9451 ; CI-DS128: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 9452 ; CI-DS128: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 9453 ; CI-DS128: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 9454 ; CI-DS128: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 9455 ; CI-DS128: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 9456 ; CI-DS128: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 9457 ; CI-DS128: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 9458 ; CI-DS128: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 9459 ; CI-DS128: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 9460 ; CI-DS128: [[PTR_ADD7:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 9461 ; CI-DS128: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p3) :: (load 1 + 8, addrspace 3) 9462 ; CI-DS128: [[PTR_ADD8:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 9463 ; CI-DS128: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p3) :: (load 1 + 9, addrspace 3) 9464 ; CI-DS128: [[PTR_ADD9:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 9465 ; CI-DS128: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p3) :: (load 1 + 10, addrspace 3) 9466 ; CI-DS128: [[PTR_ADD10:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 9467 ; CI-DS128: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p3) :: (load 1 + 11, addrspace 3) 9468 ; CI-DS128: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 9469 ; CI-DS128: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 9470 ; CI-DS128: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 9471 ; CI-DS128: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 9472 ; CI-DS128: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 9473 ; CI-DS128: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 9474 ; CI-DS128: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 9475 ; CI-DS128: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 9476 ; CI-DS128: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 9477 ; CI-DS128: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 9478 ; CI-DS128: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 9479 ; CI-DS128: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 9480 ; CI-DS128: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 9481 ; CI-DS128: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 9482 ; CI-DS128: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 9483 ; CI-DS128: [[PTR_ADD11:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C8]](s32) 9484 ; CI-DS128: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p3) :: (load 1 + 12, addrspace 3) 9485 ; CI-DS128: [[PTR_ADD12:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C]](s32) 9486 ; CI-DS128: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p3) :: (load 1 + 13, addrspace 3) 9487 ; CI-DS128: [[PTR_ADD13:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C1]](s32) 9488 ; CI-DS128: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p3) :: (load 1 + 14, addrspace 3) 9489 ; CI-DS128: [[PTR_ADD14:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C2]](s32) 9490 ; CI-DS128: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p3) :: (load 1 + 15, addrspace 3) 9491 ; CI-DS128: [[COPY13:%[0-9]+]]:_(s32) = COPY [[LOAD12]](s32) 9492 ; CI-DS128: [[AND12:%[0-9]+]]:_(s32) = G_AND [[COPY13]], [[C3]] 9493 ; CI-DS128: [[COPY14:%[0-9]+]]:_(s32) = COPY [[LOAD13]](s32) 9494 ; CI-DS128: [[AND13:%[0-9]+]]:_(s32) = G_AND [[COPY14]], [[C3]] 9495 ; CI-DS128: [[SHL9:%[0-9]+]]:_(s32) = G_SHL [[AND13]], [[C4]](s32) 9496 ; CI-DS128: [[OR9:%[0-9]+]]:_(s32) = G_OR [[AND12]], [[SHL9]] 9497 ; CI-DS128: [[COPY15:%[0-9]+]]:_(s32) = COPY [[LOAD14]](s32) 9498 ; CI-DS128: [[AND14:%[0-9]+]]:_(s32) = G_AND [[COPY15]], [[C3]] 9499 ; CI-DS128: [[SHL10:%[0-9]+]]:_(s32) = G_SHL [[AND14]], [[C5]](s32) 9500 ; CI-DS128: [[OR10:%[0-9]+]]:_(s32) = G_OR [[OR9]], [[SHL10]] 9501 ; CI-DS128: [[COPY16:%[0-9]+]]:_(s32) = COPY [[LOAD15]](s32) 9502 ; CI-DS128: [[AND15:%[0-9]+]]:_(s32) = G_AND [[COPY16]], [[C3]] 9503 ; CI-DS128: [[SHL11:%[0-9]+]]:_(s32) = G_SHL [[AND15]], [[C6]](s32) 9504 ; CI-DS128: [[OR11:%[0-9]+]]:_(s32) = G_OR [[OR10]], [[SHL11]] 9505 ; CI-DS128: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32), [[OR8]](s32), [[OR11]](s32) 9506 ; CI-DS128: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>) 9507 ; VI-LABEL: name: test_load_local_v4s32_align1 9508 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 9509 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 9510 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 9511 ; VI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 9512 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 9513 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 9514 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 9515 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 9516 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 9517 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 9518 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 9519 ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 9520 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 9521 ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 9522 ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 9523 ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 9524 ; VI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 9525 ; VI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 9526 ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 9527 ; VI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 9528 ; VI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 9529 ; VI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 9530 ; VI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 9531 ; VI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 9532 ; VI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 9533 ; VI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 9534 ; VI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 9535 ; VI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 9536 ; VI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 9537 ; VI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 9538 ; VI: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C7]](s32) 9539 ; VI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 9540 ; VI: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 9541 ; VI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 9542 ; VI: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 9543 ; VI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 9544 ; VI: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 9545 ; VI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 9546 ; VI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 9547 ; VI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 9548 ; VI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 9549 ; VI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 9550 ; VI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 9551 ; VI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 9552 ; VI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 9553 ; VI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 9554 ; VI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 9555 ; VI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 9556 ; VI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 9557 ; VI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 9558 ; VI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 9559 ; VI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 9560 ; VI: [[PTR_ADD7:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 9561 ; VI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p3) :: (load 1 + 8, addrspace 3) 9562 ; VI: [[PTR_ADD8:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 9563 ; VI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p3) :: (load 1 + 9, addrspace 3) 9564 ; VI: [[PTR_ADD9:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 9565 ; VI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p3) :: (load 1 + 10, addrspace 3) 9566 ; VI: [[PTR_ADD10:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 9567 ; VI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p3) :: (load 1 + 11, addrspace 3) 9568 ; VI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 9569 ; VI: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 9570 ; VI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 9571 ; VI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 9572 ; VI: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 9573 ; VI: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 9574 ; VI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 9575 ; VI: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 9576 ; VI: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 9577 ; VI: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 9578 ; VI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 9579 ; VI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 9580 ; VI: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 9581 ; VI: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 9582 ; VI: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 9583 ; VI: [[PTR_ADD11:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C8]](s32) 9584 ; VI: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p3) :: (load 1 + 12, addrspace 3) 9585 ; VI: [[PTR_ADD12:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C]](s32) 9586 ; VI: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p3) :: (load 1 + 13, addrspace 3) 9587 ; VI: [[PTR_ADD13:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C1]](s32) 9588 ; VI: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p3) :: (load 1 + 14, addrspace 3) 9589 ; VI: [[PTR_ADD14:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C2]](s32) 9590 ; VI: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p3) :: (load 1 + 15, addrspace 3) 9591 ; VI: [[COPY13:%[0-9]+]]:_(s32) = COPY [[LOAD12]](s32) 9592 ; VI: [[AND12:%[0-9]+]]:_(s32) = G_AND [[COPY13]], [[C3]] 9593 ; VI: [[COPY14:%[0-9]+]]:_(s32) = COPY [[LOAD13]](s32) 9594 ; VI: [[AND13:%[0-9]+]]:_(s32) = G_AND [[COPY14]], [[C3]] 9595 ; VI: [[SHL9:%[0-9]+]]:_(s32) = G_SHL [[AND13]], [[C4]](s32) 9596 ; VI: [[OR9:%[0-9]+]]:_(s32) = G_OR [[AND12]], [[SHL9]] 9597 ; VI: [[COPY15:%[0-9]+]]:_(s32) = COPY [[LOAD14]](s32) 9598 ; VI: [[AND14:%[0-9]+]]:_(s32) = G_AND [[COPY15]], [[C3]] 9599 ; VI: [[SHL10:%[0-9]+]]:_(s32) = G_SHL [[AND14]], [[C5]](s32) 9600 ; VI: [[OR10:%[0-9]+]]:_(s32) = G_OR [[OR9]], [[SHL10]] 9601 ; VI: [[COPY16:%[0-9]+]]:_(s32) = COPY [[LOAD15]](s32) 9602 ; VI: [[AND15:%[0-9]+]]:_(s32) = G_AND [[COPY16]], [[C3]] 9603 ; VI: [[SHL11:%[0-9]+]]:_(s32) = G_SHL [[AND15]], [[C6]](s32) 9604 ; VI: [[OR11:%[0-9]+]]:_(s32) = G_OR [[OR10]], [[SHL11]] 9605 ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32), [[OR8]](s32), [[OR11]](s32) 9606 ; VI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>) 9607 ; GFX9-LABEL: name: test_load_local_v4s32_align1 9608 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 9609 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 9610 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 9611 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 9612 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 9613 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 9614 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 9615 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 9616 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 9617 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 9618 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 9619 ; GFX9: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 9620 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 9621 ; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 9622 ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 9623 ; GFX9: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 9624 ; GFX9: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 9625 ; GFX9: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 9626 ; GFX9: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 9627 ; GFX9: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 9628 ; GFX9: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 9629 ; GFX9: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 9630 ; GFX9: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 9631 ; GFX9: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 9632 ; GFX9: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 9633 ; GFX9: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 9634 ; GFX9: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 9635 ; GFX9: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 9636 ; GFX9: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 9637 ; GFX9: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 9638 ; GFX9: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C7]](s32) 9639 ; GFX9: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 9640 ; GFX9: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 9641 ; GFX9: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 9642 ; GFX9: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 9643 ; GFX9: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 9644 ; GFX9: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 9645 ; GFX9: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 9646 ; GFX9: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 9647 ; GFX9: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 9648 ; GFX9: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 9649 ; GFX9: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 9650 ; GFX9: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 9651 ; GFX9: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 9652 ; GFX9: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 9653 ; GFX9: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 9654 ; GFX9: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 9655 ; GFX9: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 9656 ; GFX9: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 9657 ; GFX9: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 9658 ; GFX9: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 9659 ; GFX9: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 9660 ; GFX9: [[PTR_ADD7:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 9661 ; GFX9: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p3) :: (load 1 + 8, addrspace 3) 9662 ; GFX9: [[PTR_ADD8:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 9663 ; GFX9: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p3) :: (load 1 + 9, addrspace 3) 9664 ; GFX9: [[PTR_ADD9:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 9665 ; GFX9: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p3) :: (load 1 + 10, addrspace 3) 9666 ; GFX9: [[PTR_ADD10:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 9667 ; GFX9: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p3) :: (load 1 + 11, addrspace 3) 9668 ; GFX9: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 9669 ; GFX9: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 9670 ; GFX9: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 9671 ; GFX9: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 9672 ; GFX9: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 9673 ; GFX9: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 9674 ; GFX9: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 9675 ; GFX9: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 9676 ; GFX9: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 9677 ; GFX9: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 9678 ; GFX9: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 9679 ; GFX9: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 9680 ; GFX9: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 9681 ; GFX9: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 9682 ; GFX9: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 9683 ; GFX9: [[PTR_ADD11:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C8]](s32) 9684 ; GFX9: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p3) :: (load 1 + 12, addrspace 3) 9685 ; GFX9: [[PTR_ADD12:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C]](s32) 9686 ; GFX9: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p3) :: (load 1 + 13, addrspace 3) 9687 ; GFX9: [[PTR_ADD13:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C1]](s32) 9688 ; GFX9: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p3) :: (load 1 + 14, addrspace 3) 9689 ; GFX9: [[PTR_ADD14:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C2]](s32) 9690 ; GFX9: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p3) :: (load 1 + 15, addrspace 3) 9691 ; GFX9: [[COPY13:%[0-9]+]]:_(s32) = COPY [[LOAD12]](s32) 9692 ; GFX9: [[AND12:%[0-9]+]]:_(s32) = G_AND [[COPY13]], [[C3]] 9693 ; GFX9: [[COPY14:%[0-9]+]]:_(s32) = COPY [[LOAD13]](s32) 9694 ; GFX9: [[AND13:%[0-9]+]]:_(s32) = G_AND [[COPY14]], [[C3]] 9695 ; GFX9: [[SHL9:%[0-9]+]]:_(s32) = G_SHL [[AND13]], [[C4]](s32) 9696 ; GFX9: [[OR9:%[0-9]+]]:_(s32) = G_OR [[AND12]], [[SHL9]] 9697 ; GFX9: [[COPY15:%[0-9]+]]:_(s32) = COPY [[LOAD14]](s32) 9698 ; GFX9: [[AND14:%[0-9]+]]:_(s32) = G_AND [[COPY15]], [[C3]] 9699 ; GFX9: [[SHL10:%[0-9]+]]:_(s32) = G_SHL [[AND14]], [[C5]](s32) 9700 ; GFX9: [[OR10:%[0-9]+]]:_(s32) = G_OR [[OR9]], [[SHL10]] 9701 ; GFX9: [[COPY16:%[0-9]+]]:_(s32) = COPY [[LOAD15]](s32) 9702 ; GFX9: [[AND15:%[0-9]+]]:_(s32) = G_AND [[COPY16]], [[C3]] 9703 ; GFX9: [[SHL11:%[0-9]+]]:_(s32) = G_SHL [[AND15]], [[C6]](s32) 9704 ; GFX9: [[OR11:%[0-9]+]]:_(s32) = G_OR [[OR10]], [[SHL11]] 9705 ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32), [[OR8]](s32), [[OR11]](s32) 9706 ; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>) 9707 ; GFX9-UNALIGNED-LABEL: name: test_load_local_v4s32_align1 9708 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 9709 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[COPY]](p3) :: (load 16, align 1, addrspace 3) 9710 ; GFX9-UNALIGNED: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[LOAD]](<4 x s32>) 9711 %0:_(p3) = COPY $vgpr0 9712 %1:_(<4 x s32>) = G_LOAD %0 :: (load 16, align 1, addrspace 3) 9713 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1 9714... 9715 9716--- 9717name: test_load_local_v8s32_align32 9718body: | 9719 bb.0: 9720 liveins: $vgpr0 9721 9722 ; SI-LABEL: name: test_load_local_v8s32_align32 9723 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 9724 ; SI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 8, align 32, addrspace 3) 9725 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 9726 ; SI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 9727 ; SI: [[LOAD1:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[PTR_ADD]](p3) :: (load 8 + 8, addrspace 3) 9728 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 9729 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 9730 ; SI: [[LOAD2:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[PTR_ADD1]](p3) :: (load 8 + 16, align 16, addrspace 3) 9731 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 9732 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 9733 ; SI: [[LOAD3:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[PTR_ADD2]](p3) :: (load 8 + 24, addrspace 3) 9734 ; SI: [[CONCAT_VECTORS:%[0-9]+]]:_(<8 x s32>) = G_CONCAT_VECTORS [[LOAD]](<2 x s32>), [[LOAD1]](<2 x s32>), [[LOAD2]](<2 x s32>), [[LOAD3]](<2 x s32>) 9735 ; SI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[CONCAT_VECTORS]](<8 x s32>) 9736 ; CI-LABEL: name: test_load_local_v8s32_align32 9737 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 9738 ; CI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 8, align 32, addrspace 3) 9739 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 9740 ; CI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 9741 ; CI: [[LOAD1:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[PTR_ADD]](p3) :: (load 8 + 8, addrspace 3) 9742 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 9743 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 9744 ; CI: [[LOAD2:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[PTR_ADD1]](p3) :: (load 8 + 16, align 16, addrspace 3) 9745 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 9746 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 9747 ; CI: [[LOAD3:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[PTR_ADD2]](p3) :: (load 8 + 24, addrspace 3) 9748 ; CI: [[CONCAT_VECTORS:%[0-9]+]]:_(<8 x s32>) = G_CONCAT_VECTORS [[LOAD]](<2 x s32>), [[LOAD1]](<2 x s32>), [[LOAD2]](<2 x s32>), [[LOAD3]](<2 x s32>) 9749 ; CI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[CONCAT_VECTORS]](<8 x s32>) 9750 ; CI-DS128-LABEL: name: test_load_local_v8s32_align32 9751 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 9752 ; CI-DS128: [[LOAD:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[COPY]](p3) :: (load 16, align 32, addrspace 3) 9753 ; CI-DS128: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 9754 ; CI-DS128: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 9755 ; CI-DS128: [[LOAD1:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[PTR_ADD]](p3) :: (load 16 + 16, addrspace 3) 9756 ; CI-DS128: [[CONCAT_VECTORS:%[0-9]+]]:_(<8 x s32>) = G_CONCAT_VECTORS [[LOAD]](<4 x s32>), [[LOAD1]](<4 x s32>) 9757 ; CI-DS128: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[CONCAT_VECTORS]](<8 x s32>) 9758 ; VI-LABEL: name: test_load_local_v8s32_align32 9759 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 9760 ; VI: [[LOAD:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[COPY]](p3) :: (load 16, align 32, addrspace 3) 9761 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 9762 ; VI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 9763 ; VI: [[LOAD1:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[PTR_ADD]](p3) :: (load 16 + 16, addrspace 3) 9764 ; VI: [[CONCAT_VECTORS:%[0-9]+]]:_(<8 x s32>) = G_CONCAT_VECTORS [[LOAD]](<4 x s32>), [[LOAD1]](<4 x s32>) 9765 ; VI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[CONCAT_VECTORS]](<8 x s32>) 9766 ; GFX9-LABEL: name: test_load_local_v8s32_align32 9767 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 9768 ; GFX9: [[LOAD:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[COPY]](p3) :: (load 16, align 32, addrspace 3) 9769 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 9770 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 9771 ; GFX9: [[LOAD1:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[PTR_ADD]](p3) :: (load 16 + 16, addrspace 3) 9772 ; GFX9: [[CONCAT_VECTORS:%[0-9]+]]:_(<8 x s32>) = G_CONCAT_VECTORS [[LOAD]](<4 x s32>), [[LOAD1]](<4 x s32>) 9773 ; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[CONCAT_VECTORS]](<8 x s32>) 9774 ; GFX9-UNALIGNED-LABEL: name: test_load_local_v8s32_align32 9775 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 9776 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[COPY]](p3) :: (load 16, align 32, addrspace 3) 9777 ; GFX9-UNALIGNED: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 9778 ; GFX9-UNALIGNED: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 9779 ; GFX9-UNALIGNED: [[LOAD1:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[PTR_ADD]](p3) :: (load 16 + 16, addrspace 3) 9780 ; GFX9-UNALIGNED: [[CONCAT_VECTORS:%[0-9]+]]:_(<8 x s32>) = G_CONCAT_VECTORS [[LOAD]](<4 x s32>), [[LOAD1]](<4 x s32>) 9781 ; GFX9-UNALIGNED: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[CONCAT_VECTORS]](<8 x s32>) 9782 %0:_(p3) = COPY $vgpr0 9783 %1:_(<8 x s32>) = G_LOAD %0 :: (load 32, align 32, addrspace 3) 9784 $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY %1 9785... 9786 9787--- 9788name: test_load_local_v16s32_align32 9789body: | 9790 bb.0: 9791 liveins: $vgpr0 9792 9793 ; SI-LABEL: name: test_load_local_v16s32_align32 9794 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 9795 ; SI: [[LOAD:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[COPY]](p3) :: (load 16, align 32, addrspace 3) 9796 ; SI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = COPY [[LOAD]](<16 x s32>) 9797 ; CI-LABEL: name: test_load_local_v16s32_align32 9798 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 9799 ; CI: [[LOAD:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[COPY]](p3) :: (load 16, align 32, addrspace 3) 9800 ; CI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = COPY [[LOAD]](<16 x s32>) 9801 ; CI-DS128-LABEL: name: test_load_local_v16s32_align32 9802 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 9803 ; CI-DS128: [[LOAD:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[COPY]](p3) :: (load 16, align 32, addrspace 3) 9804 ; CI-DS128: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = COPY [[LOAD]](<16 x s32>) 9805 ; VI-LABEL: name: test_load_local_v16s32_align32 9806 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 9807 ; VI: [[LOAD:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[COPY]](p3) :: (load 16, align 32, addrspace 3) 9808 ; VI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = COPY [[LOAD]](<16 x s32>) 9809 ; GFX9-LABEL: name: test_load_local_v16s32_align32 9810 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 9811 ; GFX9: [[LOAD:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[COPY]](p3) :: (load 16, align 32, addrspace 3) 9812 ; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = COPY [[LOAD]](<16 x s32>) 9813 ; GFX9-UNALIGNED-LABEL: name: test_load_local_v16s32_align32 9814 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 9815 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[COPY]](p3) :: (load 16, align 32, addrspace 3) 9816 ; GFX9-UNALIGNED: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = COPY [[LOAD]](<16 x s32>) 9817 %0:_(p3) = COPY $vgpr0 9818 %1:_(<16 x s32>) = G_LOAD %0 :: (load 16, align 32, addrspace 3) 9819 $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = COPY %1 9820... 9821 9822--- 9823name: test_load_local_v2s64_align4 9824body: | 9825 bb.0: 9826 liveins: $vgpr0 9827 9828 ; SI-LABEL: name: test_load_local_v2s64_align4 9829 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 9830 ; SI: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p3) :: (load 8, align 4, addrspace 3) 9831 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 9832 ; SI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 9833 ; SI: [[LOAD1:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD]](p3) :: (load 8 + 8, align 4, addrspace 3) 9834 ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[LOAD]](s64), [[LOAD1]](s64) 9835 ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>) 9836 ; CI-LABEL: name: test_load_local_v2s64_align4 9837 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 9838 ; CI: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p3) :: (load 8, align 4, addrspace 3) 9839 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 9840 ; CI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 9841 ; CI: [[LOAD1:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD]](p3) :: (load 8 + 8, align 4, addrspace 3) 9842 ; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[LOAD]](s64), [[LOAD1]](s64) 9843 ; CI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>) 9844 ; CI-DS128-LABEL: name: test_load_local_v2s64_align4 9845 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 9846 ; CI-DS128: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p3) :: (load 8, align 4, addrspace 3) 9847 ; CI-DS128: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 9848 ; CI-DS128: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 9849 ; CI-DS128: [[LOAD1:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD]](p3) :: (load 8 + 8, align 4, addrspace 3) 9850 ; CI-DS128: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[LOAD]](s64), [[LOAD1]](s64) 9851 ; CI-DS128: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>) 9852 ; VI-LABEL: name: test_load_local_v2s64_align4 9853 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 9854 ; VI: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p3) :: (load 8, align 4, addrspace 3) 9855 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 9856 ; VI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 9857 ; VI: [[LOAD1:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD]](p3) :: (load 8 + 8, align 4, addrspace 3) 9858 ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[LOAD]](s64), [[LOAD1]](s64) 9859 ; VI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>) 9860 ; GFX9-LABEL: name: test_load_local_v2s64_align4 9861 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 9862 ; GFX9: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p3) :: (load 8, align 4, addrspace 3) 9863 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 9864 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 9865 ; GFX9: [[LOAD1:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD]](p3) :: (load 8 + 8, align 4, addrspace 3) 9866 ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[LOAD]](s64), [[LOAD1]](s64) 9867 ; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>) 9868 ; GFX9-UNALIGNED-LABEL: name: test_load_local_v2s64_align4 9869 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 9870 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(<2 x s64>) = G_LOAD [[COPY]](p3) :: (load 16, align 4, addrspace 3) 9871 ; GFX9-UNALIGNED: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[LOAD]](<2 x s64>) 9872 %0:_(p3) = COPY $vgpr0 9873 %1:_(<2 x s64>) = G_LOAD %0 :: (load 16, align 4, addrspace 3) 9874 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1 9875... 9876 9877--- 9878name: test_load_local_v2s64_align16 9879body: | 9880 bb.0: 9881 liveins: $vgpr0 9882 9883 ; SI-LABEL: name: test_load_local_v2s64_align16 9884 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 9885 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 9886 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 9887 ; SI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 9888 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 9889 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 9890 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 9891 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 9892 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 9893 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 9894 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 9895 ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 9896 ; SI: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C3]](s32) 9897 ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 9898 ; SI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 5 9899 ; SI: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 9900 ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 9901 ; SI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 6 9902 ; SI: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C5]](s32) 9903 ; SI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 9904 ; SI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 7 9905 ; SI: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C6]](s32) 9906 ; SI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 9907 ; SI: [[C7:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 9908 ; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) 9909 ; SI: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C7]] 9910 ; SI: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 9911 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[C8]](s32) 9912 ; SI: [[C9:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 9913 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 9914 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C9]] 9915 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[COPY1]](s32) 9916 ; SI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[SHL]](s32) 9917 ; SI: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[TRUNC1]] 9918 ; SI: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) 9919 ; SI: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C7]] 9920 ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[C8]](s32) 9921 ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 9922 ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C9]] 9923 ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[COPY3]](s32) 9924 ; SI: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[SHL1]](s32) 9925 ; SI: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[TRUNC3]] 9926 ; SI: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD4]](s32) 9927 ; SI: [[AND4:%[0-9]+]]:_(s16) = G_AND [[TRUNC4]], [[C7]] 9928 ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[C8]](s32) 9929 ; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 9930 ; SI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C9]] 9931 ; SI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[COPY5]](s32) 9932 ; SI: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[SHL2]](s32) 9933 ; SI: [[OR2:%[0-9]+]]:_(s16) = G_OR [[AND4]], [[TRUNC5]] 9934 ; SI: [[TRUNC6:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD6]](s32) 9935 ; SI: [[AND6:%[0-9]+]]:_(s16) = G_AND [[TRUNC6]], [[C7]] 9936 ; SI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[C8]](s32) 9937 ; SI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 9938 ; SI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C9]] 9939 ; SI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[COPY7]](s32) 9940 ; SI: [[TRUNC7:%[0-9]+]]:_(s16) = G_TRUNC [[SHL3]](s32) 9941 ; SI: [[OR3:%[0-9]+]]:_(s16) = G_OR [[AND6]], [[TRUNC7]] 9942 ; SI: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[OR]](s16) 9943 ; SI: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[OR1]](s16) 9944 ; SI: [[C10:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 9945 ; SI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[ZEXT1]], [[C10]](s32) 9946 ; SI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL4]] 9947 ; SI: [[ZEXT2:%[0-9]+]]:_(s32) = G_ZEXT [[OR2]](s16) 9948 ; SI: [[ZEXT3:%[0-9]+]]:_(s32) = G_ZEXT [[OR3]](s16) 9949 ; SI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[ZEXT3]], [[C10]](s32) 9950 ; SI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[ZEXT2]], [[SHL5]] 9951 ; SI: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR4]](s32), [[OR5]](s32) 9952 ; SI: [[PTR_ADD7:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C8]](s32) 9953 ; SI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p3) :: (load 1 + 8, addrspace 3) 9954 ; SI: [[PTR_ADD8:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 9955 ; SI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p3) :: (load 1 + 9, addrspace 3) 9956 ; SI: [[PTR_ADD9:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 9957 ; SI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p3) :: (load 1 + 10, addrspace 3) 9958 ; SI: [[PTR_ADD10:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 9959 ; SI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p3) :: (load 1 + 11, addrspace 3) 9960 ; SI: [[PTR_ADD11:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C3]](s32) 9961 ; SI: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p3) :: (load 1 + 12, addrspace 3) 9962 ; SI: [[PTR_ADD12:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C4]](s32) 9963 ; SI: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p3) :: (load 1 + 13, addrspace 3) 9964 ; SI: [[PTR_ADD13:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C5]](s32) 9965 ; SI: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p3) :: (load 1 + 14, addrspace 3) 9966 ; SI: [[PTR_ADD14:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C6]](s32) 9967 ; SI: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p3) :: (load 1 + 15, addrspace 3) 9968 ; SI: [[TRUNC8:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD8]](s32) 9969 ; SI: [[AND8:%[0-9]+]]:_(s16) = G_AND [[TRUNC8]], [[C7]] 9970 ; SI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[C8]](s32) 9971 ; SI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 9972 ; SI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C9]] 9973 ; SI: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[COPY9]](s32) 9974 ; SI: [[TRUNC9:%[0-9]+]]:_(s16) = G_TRUNC [[SHL6]](s32) 9975 ; SI: [[OR6:%[0-9]+]]:_(s16) = G_OR [[AND8]], [[TRUNC9]] 9976 ; SI: [[TRUNC10:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD10]](s32) 9977 ; SI: [[AND10:%[0-9]+]]:_(s16) = G_AND [[TRUNC10]], [[C7]] 9978 ; SI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[C8]](s32) 9979 ; SI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 9980 ; SI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C9]] 9981 ; SI: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[COPY11]](s32) 9982 ; SI: [[TRUNC11:%[0-9]+]]:_(s16) = G_TRUNC [[SHL7]](s32) 9983 ; SI: [[OR7:%[0-9]+]]:_(s16) = G_OR [[AND10]], [[TRUNC11]] 9984 ; SI: [[TRUNC12:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD12]](s32) 9985 ; SI: [[AND12:%[0-9]+]]:_(s16) = G_AND [[TRUNC12]], [[C7]] 9986 ; SI: [[COPY13:%[0-9]+]]:_(s32) = COPY [[C8]](s32) 9987 ; SI: [[COPY14:%[0-9]+]]:_(s32) = COPY [[LOAD13]](s32) 9988 ; SI: [[AND13:%[0-9]+]]:_(s32) = G_AND [[COPY14]], [[C9]] 9989 ; SI: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND13]], [[COPY13]](s32) 9990 ; SI: [[TRUNC13:%[0-9]+]]:_(s16) = G_TRUNC [[SHL8]](s32) 9991 ; SI: [[OR8:%[0-9]+]]:_(s16) = G_OR [[AND12]], [[TRUNC13]] 9992 ; SI: [[TRUNC14:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD14]](s32) 9993 ; SI: [[AND14:%[0-9]+]]:_(s16) = G_AND [[TRUNC14]], [[C7]] 9994 ; SI: [[COPY15:%[0-9]+]]:_(s32) = COPY [[C8]](s32) 9995 ; SI: [[COPY16:%[0-9]+]]:_(s32) = COPY [[LOAD15]](s32) 9996 ; SI: [[AND15:%[0-9]+]]:_(s32) = G_AND [[COPY16]], [[C9]] 9997 ; SI: [[SHL9:%[0-9]+]]:_(s32) = G_SHL [[AND15]], [[COPY15]](s32) 9998 ; SI: [[TRUNC15:%[0-9]+]]:_(s16) = G_TRUNC [[SHL9]](s32) 9999 ; SI: [[OR9:%[0-9]+]]:_(s16) = G_OR [[AND14]], [[TRUNC15]] 10000 ; SI: [[ZEXT4:%[0-9]+]]:_(s32) = G_ZEXT [[OR6]](s16) 10001 ; SI: [[ZEXT5:%[0-9]+]]:_(s32) = G_ZEXT [[OR7]](s16) 10002 ; SI: [[SHL10:%[0-9]+]]:_(s32) = G_SHL [[ZEXT5]], [[C10]](s32) 10003 ; SI: [[OR10:%[0-9]+]]:_(s32) = G_OR [[ZEXT4]], [[SHL10]] 10004 ; SI: [[ZEXT6:%[0-9]+]]:_(s32) = G_ZEXT [[OR8]](s16) 10005 ; SI: [[ZEXT7:%[0-9]+]]:_(s32) = G_ZEXT [[OR9]](s16) 10006 ; SI: [[SHL11:%[0-9]+]]:_(s32) = G_SHL [[ZEXT7]], [[C10]](s32) 10007 ; SI: [[OR11:%[0-9]+]]:_(s32) = G_OR [[ZEXT6]], [[SHL11]] 10008 ; SI: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR10]](s32), [[OR11]](s32) 10009 ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[MV]](s64), [[MV1]](s64) 10010 ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>) 10011 ; CI-LABEL: name: test_load_local_v2s64_align16 10012 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 10013 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 10014 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 10015 ; CI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 10016 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 10017 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 10018 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 10019 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 10020 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 10021 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 10022 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 10023 ; CI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 10024 ; CI: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C3]](s32) 10025 ; CI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 10026 ; CI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 5 10027 ; CI: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 10028 ; CI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 10029 ; CI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 6 10030 ; CI: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C5]](s32) 10031 ; CI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 10032 ; CI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 7 10033 ; CI: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C6]](s32) 10034 ; CI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 10035 ; CI: [[C7:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 10036 ; CI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) 10037 ; CI: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C7]] 10038 ; CI: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 10039 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[C8]](s32) 10040 ; CI: [[C9:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 10041 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 10042 ; CI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C9]] 10043 ; CI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[COPY1]](s32) 10044 ; CI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[SHL]](s32) 10045 ; CI: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[TRUNC1]] 10046 ; CI: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) 10047 ; CI: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C7]] 10048 ; CI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[C8]](s32) 10049 ; CI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 10050 ; CI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C9]] 10051 ; CI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[COPY3]](s32) 10052 ; CI: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[SHL1]](s32) 10053 ; CI: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[TRUNC3]] 10054 ; CI: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD4]](s32) 10055 ; CI: [[AND4:%[0-9]+]]:_(s16) = G_AND [[TRUNC4]], [[C7]] 10056 ; CI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[C8]](s32) 10057 ; CI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 10058 ; CI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C9]] 10059 ; CI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[COPY5]](s32) 10060 ; CI: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[SHL2]](s32) 10061 ; CI: [[OR2:%[0-9]+]]:_(s16) = G_OR [[AND4]], [[TRUNC5]] 10062 ; CI: [[TRUNC6:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD6]](s32) 10063 ; CI: [[AND6:%[0-9]+]]:_(s16) = G_AND [[TRUNC6]], [[C7]] 10064 ; CI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[C8]](s32) 10065 ; CI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 10066 ; CI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C9]] 10067 ; CI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[COPY7]](s32) 10068 ; CI: [[TRUNC7:%[0-9]+]]:_(s16) = G_TRUNC [[SHL3]](s32) 10069 ; CI: [[OR3:%[0-9]+]]:_(s16) = G_OR [[AND6]], [[TRUNC7]] 10070 ; CI: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[OR]](s16) 10071 ; CI: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[OR1]](s16) 10072 ; CI: [[C10:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 10073 ; CI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[ZEXT1]], [[C10]](s32) 10074 ; CI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL4]] 10075 ; CI: [[ZEXT2:%[0-9]+]]:_(s32) = G_ZEXT [[OR2]](s16) 10076 ; CI: [[ZEXT3:%[0-9]+]]:_(s32) = G_ZEXT [[OR3]](s16) 10077 ; CI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[ZEXT3]], [[C10]](s32) 10078 ; CI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[ZEXT2]], [[SHL5]] 10079 ; CI: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR4]](s32), [[OR5]](s32) 10080 ; CI: [[PTR_ADD7:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C8]](s32) 10081 ; CI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p3) :: (load 1 + 8, addrspace 3) 10082 ; CI: [[PTR_ADD8:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 10083 ; CI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p3) :: (load 1 + 9, addrspace 3) 10084 ; CI: [[PTR_ADD9:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 10085 ; CI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p3) :: (load 1 + 10, addrspace 3) 10086 ; CI: [[PTR_ADD10:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 10087 ; CI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p3) :: (load 1 + 11, addrspace 3) 10088 ; CI: [[PTR_ADD11:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C3]](s32) 10089 ; CI: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p3) :: (load 1 + 12, addrspace 3) 10090 ; CI: [[PTR_ADD12:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C4]](s32) 10091 ; CI: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p3) :: (load 1 + 13, addrspace 3) 10092 ; CI: [[PTR_ADD13:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C5]](s32) 10093 ; CI: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p3) :: (load 1 + 14, addrspace 3) 10094 ; CI: [[PTR_ADD14:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C6]](s32) 10095 ; CI: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p3) :: (load 1 + 15, addrspace 3) 10096 ; CI: [[TRUNC8:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD8]](s32) 10097 ; CI: [[AND8:%[0-9]+]]:_(s16) = G_AND [[TRUNC8]], [[C7]] 10098 ; CI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[C8]](s32) 10099 ; CI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 10100 ; CI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C9]] 10101 ; CI: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[COPY9]](s32) 10102 ; CI: [[TRUNC9:%[0-9]+]]:_(s16) = G_TRUNC [[SHL6]](s32) 10103 ; CI: [[OR6:%[0-9]+]]:_(s16) = G_OR [[AND8]], [[TRUNC9]] 10104 ; CI: [[TRUNC10:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD10]](s32) 10105 ; CI: [[AND10:%[0-9]+]]:_(s16) = G_AND [[TRUNC10]], [[C7]] 10106 ; CI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[C8]](s32) 10107 ; CI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 10108 ; CI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C9]] 10109 ; CI: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[COPY11]](s32) 10110 ; CI: [[TRUNC11:%[0-9]+]]:_(s16) = G_TRUNC [[SHL7]](s32) 10111 ; CI: [[OR7:%[0-9]+]]:_(s16) = G_OR [[AND10]], [[TRUNC11]] 10112 ; CI: [[TRUNC12:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD12]](s32) 10113 ; CI: [[AND12:%[0-9]+]]:_(s16) = G_AND [[TRUNC12]], [[C7]] 10114 ; CI: [[COPY13:%[0-9]+]]:_(s32) = COPY [[C8]](s32) 10115 ; CI: [[COPY14:%[0-9]+]]:_(s32) = COPY [[LOAD13]](s32) 10116 ; CI: [[AND13:%[0-9]+]]:_(s32) = G_AND [[COPY14]], [[C9]] 10117 ; CI: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND13]], [[COPY13]](s32) 10118 ; CI: [[TRUNC13:%[0-9]+]]:_(s16) = G_TRUNC [[SHL8]](s32) 10119 ; CI: [[OR8:%[0-9]+]]:_(s16) = G_OR [[AND12]], [[TRUNC13]] 10120 ; CI: [[TRUNC14:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD14]](s32) 10121 ; CI: [[AND14:%[0-9]+]]:_(s16) = G_AND [[TRUNC14]], [[C7]] 10122 ; CI: [[COPY15:%[0-9]+]]:_(s32) = COPY [[C8]](s32) 10123 ; CI: [[COPY16:%[0-9]+]]:_(s32) = COPY [[LOAD15]](s32) 10124 ; CI: [[AND15:%[0-9]+]]:_(s32) = G_AND [[COPY16]], [[C9]] 10125 ; CI: [[SHL9:%[0-9]+]]:_(s32) = G_SHL [[AND15]], [[COPY15]](s32) 10126 ; CI: [[TRUNC15:%[0-9]+]]:_(s16) = G_TRUNC [[SHL9]](s32) 10127 ; CI: [[OR9:%[0-9]+]]:_(s16) = G_OR [[AND14]], [[TRUNC15]] 10128 ; CI: [[ZEXT4:%[0-9]+]]:_(s32) = G_ZEXT [[OR6]](s16) 10129 ; CI: [[ZEXT5:%[0-9]+]]:_(s32) = G_ZEXT [[OR7]](s16) 10130 ; CI: [[SHL10:%[0-9]+]]:_(s32) = G_SHL [[ZEXT5]], [[C10]](s32) 10131 ; CI: [[OR10:%[0-9]+]]:_(s32) = G_OR [[ZEXT4]], [[SHL10]] 10132 ; CI: [[ZEXT6:%[0-9]+]]:_(s32) = G_ZEXT [[OR8]](s16) 10133 ; CI: [[ZEXT7:%[0-9]+]]:_(s32) = G_ZEXT [[OR9]](s16) 10134 ; CI: [[SHL11:%[0-9]+]]:_(s32) = G_SHL [[ZEXT7]], [[C10]](s32) 10135 ; CI: [[OR11:%[0-9]+]]:_(s32) = G_OR [[ZEXT6]], [[SHL11]] 10136 ; CI: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR10]](s32), [[OR11]](s32) 10137 ; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[MV]](s64), [[MV1]](s64) 10138 ; CI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>) 10139 ; CI-DS128-LABEL: name: test_load_local_v2s64_align16 10140 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 10141 ; CI-DS128: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 10142 ; CI-DS128: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 10143 ; CI-DS128: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 10144 ; CI-DS128: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 10145 ; CI-DS128: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 10146 ; CI-DS128: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 10147 ; CI-DS128: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 10148 ; CI-DS128: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 10149 ; CI-DS128: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 10150 ; CI-DS128: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 10151 ; CI-DS128: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 10152 ; CI-DS128: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C3]](s32) 10153 ; CI-DS128: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 10154 ; CI-DS128: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 5 10155 ; CI-DS128: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 10156 ; CI-DS128: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 10157 ; CI-DS128: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 6 10158 ; CI-DS128: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C5]](s32) 10159 ; CI-DS128: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 10160 ; CI-DS128: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 7 10161 ; CI-DS128: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C6]](s32) 10162 ; CI-DS128: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 10163 ; CI-DS128: [[C7:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 10164 ; CI-DS128: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) 10165 ; CI-DS128: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C7]] 10166 ; CI-DS128: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 10167 ; CI-DS128: [[COPY1:%[0-9]+]]:_(s32) = COPY [[C8]](s32) 10168 ; CI-DS128: [[C9:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 10169 ; CI-DS128: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 10170 ; CI-DS128: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C9]] 10171 ; CI-DS128: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[COPY1]](s32) 10172 ; CI-DS128: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[SHL]](s32) 10173 ; CI-DS128: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[TRUNC1]] 10174 ; CI-DS128: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) 10175 ; CI-DS128: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C7]] 10176 ; CI-DS128: [[COPY3:%[0-9]+]]:_(s32) = COPY [[C8]](s32) 10177 ; CI-DS128: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 10178 ; CI-DS128: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C9]] 10179 ; CI-DS128: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[COPY3]](s32) 10180 ; CI-DS128: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[SHL1]](s32) 10181 ; CI-DS128: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[TRUNC3]] 10182 ; CI-DS128: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD4]](s32) 10183 ; CI-DS128: [[AND4:%[0-9]+]]:_(s16) = G_AND [[TRUNC4]], [[C7]] 10184 ; CI-DS128: [[COPY5:%[0-9]+]]:_(s32) = COPY [[C8]](s32) 10185 ; CI-DS128: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 10186 ; CI-DS128: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C9]] 10187 ; CI-DS128: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[COPY5]](s32) 10188 ; CI-DS128: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[SHL2]](s32) 10189 ; CI-DS128: [[OR2:%[0-9]+]]:_(s16) = G_OR [[AND4]], [[TRUNC5]] 10190 ; CI-DS128: [[TRUNC6:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD6]](s32) 10191 ; CI-DS128: [[AND6:%[0-9]+]]:_(s16) = G_AND [[TRUNC6]], [[C7]] 10192 ; CI-DS128: [[COPY7:%[0-9]+]]:_(s32) = COPY [[C8]](s32) 10193 ; CI-DS128: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 10194 ; CI-DS128: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C9]] 10195 ; CI-DS128: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[COPY7]](s32) 10196 ; CI-DS128: [[TRUNC7:%[0-9]+]]:_(s16) = G_TRUNC [[SHL3]](s32) 10197 ; CI-DS128: [[OR3:%[0-9]+]]:_(s16) = G_OR [[AND6]], [[TRUNC7]] 10198 ; CI-DS128: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[OR]](s16) 10199 ; CI-DS128: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[OR1]](s16) 10200 ; CI-DS128: [[C10:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 10201 ; CI-DS128: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[ZEXT1]], [[C10]](s32) 10202 ; CI-DS128: [[OR4:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL4]] 10203 ; CI-DS128: [[ZEXT2:%[0-9]+]]:_(s32) = G_ZEXT [[OR2]](s16) 10204 ; CI-DS128: [[ZEXT3:%[0-9]+]]:_(s32) = G_ZEXT [[OR3]](s16) 10205 ; CI-DS128: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[ZEXT3]], [[C10]](s32) 10206 ; CI-DS128: [[OR5:%[0-9]+]]:_(s32) = G_OR [[ZEXT2]], [[SHL5]] 10207 ; CI-DS128: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR4]](s32), [[OR5]](s32) 10208 ; CI-DS128: [[PTR_ADD7:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C8]](s32) 10209 ; CI-DS128: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p3) :: (load 1 + 8, addrspace 3) 10210 ; CI-DS128: [[PTR_ADD8:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 10211 ; CI-DS128: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p3) :: (load 1 + 9, addrspace 3) 10212 ; CI-DS128: [[PTR_ADD9:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 10213 ; CI-DS128: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p3) :: (load 1 + 10, addrspace 3) 10214 ; CI-DS128: [[PTR_ADD10:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 10215 ; CI-DS128: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p3) :: (load 1 + 11, addrspace 3) 10216 ; CI-DS128: [[PTR_ADD11:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C3]](s32) 10217 ; CI-DS128: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p3) :: (load 1 + 12, addrspace 3) 10218 ; CI-DS128: [[PTR_ADD12:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C4]](s32) 10219 ; CI-DS128: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p3) :: (load 1 + 13, addrspace 3) 10220 ; CI-DS128: [[PTR_ADD13:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C5]](s32) 10221 ; CI-DS128: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p3) :: (load 1 + 14, addrspace 3) 10222 ; CI-DS128: [[PTR_ADD14:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C6]](s32) 10223 ; CI-DS128: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p3) :: (load 1 + 15, addrspace 3) 10224 ; CI-DS128: [[TRUNC8:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD8]](s32) 10225 ; CI-DS128: [[AND8:%[0-9]+]]:_(s16) = G_AND [[TRUNC8]], [[C7]] 10226 ; CI-DS128: [[COPY9:%[0-9]+]]:_(s32) = COPY [[C8]](s32) 10227 ; CI-DS128: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 10228 ; CI-DS128: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C9]] 10229 ; CI-DS128: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[COPY9]](s32) 10230 ; CI-DS128: [[TRUNC9:%[0-9]+]]:_(s16) = G_TRUNC [[SHL6]](s32) 10231 ; CI-DS128: [[OR6:%[0-9]+]]:_(s16) = G_OR [[AND8]], [[TRUNC9]] 10232 ; CI-DS128: [[TRUNC10:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD10]](s32) 10233 ; CI-DS128: [[AND10:%[0-9]+]]:_(s16) = G_AND [[TRUNC10]], [[C7]] 10234 ; CI-DS128: [[COPY11:%[0-9]+]]:_(s32) = COPY [[C8]](s32) 10235 ; CI-DS128: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 10236 ; CI-DS128: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C9]] 10237 ; CI-DS128: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[COPY11]](s32) 10238 ; CI-DS128: [[TRUNC11:%[0-9]+]]:_(s16) = G_TRUNC [[SHL7]](s32) 10239 ; CI-DS128: [[OR7:%[0-9]+]]:_(s16) = G_OR [[AND10]], [[TRUNC11]] 10240 ; CI-DS128: [[TRUNC12:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD12]](s32) 10241 ; CI-DS128: [[AND12:%[0-9]+]]:_(s16) = G_AND [[TRUNC12]], [[C7]] 10242 ; CI-DS128: [[COPY13:%[0-9]+]]:_(s32) = COPY [[C8]](s32) 10243 ; CI-DS128: [[COPY14:%[0-9]+]]:_(s32) = COPY [[LOAD13]](s32) 10244 ; CI-DS128: [[AND13:%[0-9]+]]:_(s32) = G_AND [[COPY14]], [[C9]] 10245 ; CI-DS128: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND13]], [[COPY13]](s32) 10246 ; CI-DS128: [[TRUNC13:%[0-9]+]]:_(s16) = G_TRUNC [[SHL8]](s32) 10247 ; CI-DS128: [[OR8:%[0-9]+]]:_(s16) = G_OR [[AND12]], [[TRUNC13]] 10248 ; CI-DS128: [[TRUNC14:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD14]](s32) 10249 ; CI-DS128: [[AND14:%[0-9]+]]:_(s16) = G_AND [[TRUNC14]], [[C7]] 10250 ; CI-DS128: [[COPY15:%[0-9]+]]:_(s32) = COPY [[C8]](s32) 10251 ; CI-DS128: [[COPY16:%[0-9]+]]:_(s32) = COPY [[LOAD15]](s32) 10252 ; CI-DS128: [[AND15:%[0-9]+]]:_(s32) = G_AND [[COPY16]], [[C9]] 10253 ; CI-DS128: [[SHL9:%[0-9]+]]:_(s32) = G_SHL [[AND15]], [[COPY15]](s32) 10254 ; CI-DS128: [[TRUNC15:%[0-9]+]]:_(s16) = G_TRUNC [[SHL9]](s32) 10255 ; CI-DS128: [[OR9:%[0-9]+]]:_(s16) = G_OR [[AND14]], [[TRUNC15]] 10256 ; CI-DS128: [[ZEXT4:%[0-9]+]]:_(s32) = G_ZEXT [[OR6]](s16) 10257 ; CI-DS128: [[ZEXT5:%[0-9]+]]:_(s32) = G_ZEXT [[OR7]](s16) 10258 ; CI-DS128: [[SHL10:%[0-9]+]]:_(s32) = G_SHL [[ZEXT5]], [[C10]](s32) 10259 ; CI-DS128: [[OR10:%[0-9]+]]:_(s32) = G_OR [[ZEXT4]], [[SHL10]] 10260 ; CI-DS128: [[ZEXT6:%[0-9]+]]:_(s32) = G_ZEXT [[OR8]](s16) 10261 ; CI-DS128: [[ZEXT7:%[0-9]+]]:_(s32) = G_ZEXT [[OR9]](s16) 10262 ; CI-DS128: [[SHL11:%[0-9]+]]:_(s32) = G_SHL [[ZEXT7]], [[C10]](s32) 10263 ; CI-DS128: [[OR11:%[0-9]+]]:_(s32) = G_OR [[ZEXT6]], [[SHL11]] 10264 ; CI-DS128: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR10]](s32), [[OR11]](s32) 10265 ; CI-DS128: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[MV]](s64), [[MV1]](s64) 10266 ; CI-DS128: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>) 10267 ; VI-LABEL: name: test_load_local_v2s64_align16 10268 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 10269 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 10270 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 10271 ; VI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 10272 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 10273 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 10274 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 10275 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 10276 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 10277 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 10278 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 10279 ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 10280 ; VI: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C3]](s32) 10281 ; VI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 10282 ; VI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 5 10283 ; VI: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 10284 ; VI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 10285 ; VI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 6 10286 ; VI: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C5]](s32) 10287 ; VI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 10288 ; VI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 7 10289 ; VI: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C6]](s32) 10290 ; VI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 10291 ; VI: [[C7:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 10292 ; VI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) 10293 ; VI: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C7]] 10294 ; VI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD1]](s32) 10295 ; VI: [[AND1:%[0-9]+]]:_(s16) = G_AND [[TRUNC1]], [[C7]] 10296 ; VI: [[C8:%[0-9]+]]:_(s16) = G_CONSTANT i16 8 10297 ; VI: [[SHL:%[0-9]+]]:_(s16) = G_SHL [[AND1]], [[C8]](s16) 10298 ; VI: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[SHL]] 10299 ; VI: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) 10300 ; VI: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C7]] 10301 ; VI: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD3]](s32) 10302 ; VI: [[AND3:%[0-9]+]]:_(s16) = G_AND [[TRUNC3]], [[C7]] 10303 ; VI: [[SHL1:%[0-9]+]]:_(s16) = G_SHL [[AND3]], [[C8]](s16) 10304 ; VI: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[SHL1]] 10305 ; VI: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD4]](s32) 10306 ; VI: [[AND4:%[0-9]+]]:_(s16) = G_AND [[TRUNC4]], [[C7]] 10307 ; VI: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD5]](s32) 10308 ; VI: [[AND5:%[0-9]+]]:_(s16) = G_AND [[TRUNC5]], [[C7]] 10309 ; VI: [[SHL2:%[0-9]+]]:_(s16) = G_SHL [[AND5]], [[C8]](s16) 10310 ; VI: [[OR2:%[0-9]+]]:_(s16) = G_OR [[AND4]], [[SHL2]] 10311 ; VI: [[TRUNC6:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD6]](s32) 10312 ; VI: [[AND6:%[0-9]+]]:_(s16) = G_AND [[TRUNC6]], [[C7]] 10313 ; VI: [[TRUNC7:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD7]](s32) 10314 ; VI: [[AND7:%[0-9]+]]:_(s16) = G_AND [[TRUNC7]], [[C7]] 10315 ; VI: [[SHL3:%[0-9]+]]:_(s16) = G_SHL [[AND7]], [[C8]](s16) 10316 ; VI: [[OR3:%[0-9]+]]:_(s16) = G_OR [[AND6]], [[SHL3]] 10317 ; VI: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[OR]](s16) 10318 ; VI: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[OR1]](s16) 10319 ; VI: [[C9:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 10320 ; VI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[ZEXT1]], [[C9]](s32) 10321 ; VI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL4]] 10322 ; VI: [[ZEXT2:%[0-9]+]]:_(s32) = G_ZEXT [[OR2]](s16) 10323 ; VI: [[ZEXT3:%[0-9]+]]:_(s32) = G_ZEXT [[OR3]](s16) 10324 ; VI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[ZEXT3]], [[C9]](s32) 10325 ; VI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[ZEXT2]], [[SHL5]] 10326 ; VI: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR4]](s32), [[OR5]](s32) 10327 ; VI: [[C10:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 10328 ; VI: [[PTR_ADD7:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C10]](s32) 10329 ; VI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p3) :: (load 1 + 8, addrspace 3) 10330 ; VI: [[PTR_ADD8:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 10331 ; VI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p3) :: (load 1 + 9, addrspace 3) 10332 ; VI: [[PTR_ADD9:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 10333 ; VI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p3) :: (load 1 + 10, addrspace 3) 10334 ; VI: [[PTR_ADD10:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 10335 ; VI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p3) :: (load 1 + 11, addrspace 3) 10336 ; VI: [[PTR_ADD11:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C3]](s32) 10337 ; VI: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p3) :: (load 1 + 12, addrspace 3) 10338 ; VI: [[PTR_ADD12:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C4]](s32) 10339 ; VI: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p3) :: (load 1 + 13, addrspace 3) 10340 ; VI: [[PTR_ADD13:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C5]](s32) 10341 ; VI: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p3) :: (load 1 + 14, addrspace 3) 10342 ; VI: [[PTR_ADD14:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C6]](s32) 10343 ; VI: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p3) :: (load 1 + 15, addrspace 3) 10344 ; VI: [[TRUNC8:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD8]](s32) 10345 ; VI: [[AND8:%[0-9]+]]:_(s16) = G_AND [[TRUNC8]], [[C7]] 10346 ; VI: [[TRUNC9:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD9]](s32) 10347 ; VI: [[AND9:%[0-9]+]]:_(s16) = G_AND [[TRUNC9]], [[C7]] 10348 ; VI: [[SHL6:%[0-9]+]]:_(s16) = G_SHL [[AND9]], [[C8]](s16) 10349 ; VI: [[OR6:%[0-9]+]]:_(s16) = G_OR [[AND8]], [[SHL6]] 10350 ; VI: [[TRUNC10:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD10]](s32) 10351 ; VI: [[AND10:%[0-9]+]]:_(s16) = G_AND [[TRUNC10]], [[C7]] 10352 ; VI: [[TRUNC11:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD11]](s32) 10353 ; VI: [[AND11:%[0-9]+]]:_(s16) = G_AND [[TRUNC11]], [[C7]] 10354 ; VI: [[SHL7:%[0-9]+]]:_(s16) = G_SHL [[AND11]], [[C8]](s16) 10355 ; VI: [[OR7:%[0-9]+]]:_(s16) = G_OR [[AND10]], [[SHL7]] 10356 ; VI: [[TRUNC12:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD12]](s32) 10357 ; VI: [[AND12:%[0-9]+]]:_(s16) = G_AND [[TRUNC12]], [[C7]] 10358 ; VI: [[TRUNC13:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD13]](s32) 10359 ; VI: [[AND13:%[0-9]+]]:_(s16) = G_AND [[TRUNC13]], [[C7]] 10360 ; VI: [[SHL8:%[0-9]+]]:_(s16) = G_SHL [[AND13]], [[C8]](s16) 10361 ; VI: [[OR8:%[0-9]+]]:_(s16) = G_OR [[AND12]], [[SHL8]] 10362 ; VI: [[TRUNC14:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD14]](s32) 10363 ; VI: [[AND14:%[0-9]+]]:_(s16) = G_AND [[TRUNC14]], [[C7]] 10364 ; VI: [[TRUNC15:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD15]](s32) 10365 ; VI: [[AND15:%[0-9]+]]:_(s16) = G_AND [[TRUNC15]], [[C7]] 10366 ; VI: [[SHL9:%[0-9]+]]:_(s16) = G_SHL [[AND15]], [[C8]](s16) 10367 ; VI: [[OR9:%[0-9]+]]:_(s16) = G_OR [[AND14]], [[SHL9]] 10368 ; VI: [[ZEXT4:%[0-9]+]]:_(s32) = G_ZEXT [[OR6]](s16) 10369 ; VI: [[ZEXT5:%[0-9]+]]:_(s32) = G_ZEXT [[OR7]](s16) 10370 ; VI: [[SHL10:%[0-9]+]]:_(s32) = G_SHL [[ZEXT5]], [[C9]](s32) 10371 ; VI: [[OR10:%[0-9]+]]:_(s32) = G_OR [[ZEXT4]], [[SHL10]] 10372 ; VI: [[ZEXT6:%[0-9]+]]:_(s32) = G_ZEXT [[OR8]](s16) 10373 ; VI: [[ZEXT7:%[0-9]+]]:_(s32) = G_ZEXT [[OR9]](s16) 10374 ; VI: [[SHL11:%[0-9]+]]:_(s32) = G_SHL [[ZEXT7]], [[C9]](s32) 10375 ; VI: [[OR11:%[0-9]+]]:_(s32) = G_OR [[ZEXT6]], [[SHL11]] 10376 ; VI: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR10]](s32), [[OR11]](s32) 10377 ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[MV]](s64), [[MV1]](s64) 10378 ; VI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>) 10379 ; GFX9-LABEL: name: test_load_local_v2s64_align16 10380 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 10381 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 10382 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 10383 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 10384 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 10385 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 10386 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 10387 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 10388 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 10389 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 10390 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 10391 ; GFX9: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 10392 ; GFX9: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C3]](s32) 10393 ; GFX9: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 10394 ; GFX9: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 5 10395 ; GFX9: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 10396 ; GFX9: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 10397 ; GFX9: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 6 10398 ; GFX9: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C5]](s32) 10399 ; GFX9: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 10400 ; GFX9: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 7 10401 ; GFX9: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C6]](s32) 10402 ; GFX9: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 10403 ; GFX9: [[C7:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 10404 ; GFX9: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) 10405 ; GFX9: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C7]] 10406 ; GFX9: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD1]](s32) 10407 ; GFX9: [[AND1:%[0-9]+]]:_(s16) = G_AND [[TRUNC1]], [[C7]] 10408 ; GFX9: [[C8:%[0-9]+]]:_(s16) = G_CONSTANT i16 8 10409 ; GFX9: [[SHL:%[0-9]+]]:_(s16) = G_SHL [[AND1]], [[C8]](s16) 10410 ; GFX9: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[SHL]] 10411 ; GFX9: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) 10412 ; GFX9: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C7]] 10413 ; GFX9: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD3]](s32) 10414 ; GFX9: [[AND3:%[0-9]+]]:_(s16) = G_AND [[TRUNC3]], [[C7]] 10415 ; GFX9: [[SHL1:%[0-9]+]]:_(s16) = G_SHL [[AND3]], [[C8]](s16) 10416 ; GFX9: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[SHL1]] 10417 ; GFX9: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD4]](s32) 10418 ; GFX9: [[AND4:%[0-9]+]]:_(s16) = G_AND [[TRUNC4]], [[C7]] 10419 ; GFX9: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD5]](s32) 10420 ; GFX9: [[AND5:%[0-9]+]]:_(s16) = G_AND [[TRUNC5]], [[C7]] 10421 ; GFX9: [[SHL2:%[0-9]+]]:_(s16) = G_SHL [[AND5]], [[C8]](s16) 10422 ; GFX9: [[OR2:%[0-9]+]]:_(s16) = G_OR [[AND4]], [[SHL2]] 10423 ; GFX9: [[TRUNC6:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD6]](s32) 10424 ; GFX9: [[AND6:%[0-9]+]]:_(s16) = G_AND [[TRUNC6]], [[C7]] 10425 ; GFX9: [[TRUNC7:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD7]](s32) 10426 ; GFX9: [[AND7:%[0-9]+]]:_(s16) = G_AND [[TRUNC7]], [[C7]] 10427 ; GFX9: [[SHL3:%[0-9]+]]:_(s16) = G_SHL [[AND7]], [[C8]](s16) 10428 ; GFX9: [[OR3:%[0-9]+]]:_(s16) = G_OR [[AND6]], [[SHL3]] 10429 ; GFX9: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[OR]](s16) 10430 ; GFX9: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[OR1]](s16) 10431 ; GFX9: [[C9:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 10432 ; GFX9: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[ZEXT1]], [[C9]](s32) 10433 ; GFX9: [[OR4:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL4]] 10434 ; GFX9: [[ZEXT2:%[0-9]+]]:_(s32) = G_ZEXT [[OR2]](s16) 10435 ; GFX9: [[ZEXT3:%[0-9]+]]:_(s32) = G_ZEXT [[OR3]](s16) 10436 ; GFX9: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[ZEXT3]], [[C9]](s32) 10437 ; GFX9: [[OR5:%[0-9]+]]:_(s32) = G_OR [[ZEXT2]], [[SHL5]] 10438 ; GFX9: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR4]](s32), [[OR5]](s32) 10439 ; GFX9: [[C10:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 10440 ; GFX9: [[PTR_ADD7:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C10]](s32) 10441 ; GFX9: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p3) :: (load 1 + 8, addrspace 3) 10442 ; GFX9: [[PTR_ADD8:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 10443 ; GFX9: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p3) :: (load 1 + 9, addrspace 3) 10444 ; GFX9: [[PTR_ADD9:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 10445 ; GFX9: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p3) :: (load 1 + 10, addrspace 3) 10446 ; GFX9: [[PTR_ADD10:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 10447 ; GFX9: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p3) :: (load 1 + 11, addrspace 3) 10448 ; GFX9: [[PTR_ADD11:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C3]](s32) 10449 ; GFX9: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p3) :: (load 1 + 12, addrspace 3) 10450 ; GFX9: [[PTR_ADD12:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C4]](s32) 10451 ; GFX9: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p3) :: (load 1 + 13, addrspace 3) 10452 ; GFX9: [[PTR_ADD13:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C5]](s32) 10453 ; GFX9: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p3) :: (load 1 + 14, addrspace 3) 10454 ; GFX9: [[PTR_ADD14:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C6]](s32) 10455 ; GFX9: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p3) :: (load 1 + 15, addrspace 3) 10456 ; GFX9: [[TRUNC8:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD8]](s32) 10457 ; GFX9: [[AND8:%[0-9]+]]:_(s16) = G_AND [[TRUNC8]], [[C7]] 10458 ; GFX9: [[TRUNC9:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD9]](s32) 10459 ; GFX9: [[AND9:%[0-9]+]]:_(s16) = G_AND [[TRUNC9]], [[C7]] 10460 ; GFX9: [[SHL6:%[0-9]+]]:_(s16) = G_SHL [[AND9]], [[C8]](s16) 10461 ; GFX9: [[OR6:%[0-9]+]]:_(s16) = G_OR [[AND8]], [[SHL6]] 10462 ; GFX9: [[TRUNC10:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD10]](s32) 10463 ; GFX9: [[AND10:%[0-9]+]]:_(s16) = G_AND [[TRUNC10]], [[C7]] 10464 ; GFX9: [[TRUNC11:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD11]](s32) 10465 ; GFX9: [[AND11:%[0-9]+]]:_(s16) = G_AND [[TRUNC11]], [[C7]] 10466 ; GFX9: [[SHL7:%[0-9]+]]:_(s16) = G_SHL [[AND11]], [[C8]](s16) 10467 ; GFX9: [[OR7:%[0-9]+]]:_(s16) = G_OR [[AND10]], [[SHL7]] 10468 ; GFX9: [[TRUNC12:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD12]](s32) 10469 ; GFX9: [[AND12:%[0-9]+]]:_(s16) = G_AND [[TRUNC12]], [[C7]] 10470 ; GFX9: [[TRUNC13:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD13]](s32) 10471 ; GFX9: [[AND13:%[0-9]+]]:_(s16) = G_AND [[TRUNC13]], [[C7]] 10472 ; GFX9: [[SHL8:%[0-9]+]]:_(s16) = G_SHL [[AND13]], [[C8]](s16) 10473 ; GFX9: [[OR8:%[0-9]+]]:_(s16) = G_OR [[AND12]], [[SHL8]] 10474 ; GFX9: [[TRUNC14:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD14]](s32) 10475 ; GFX9: [[AND14:%[0-9]+]]:_(s16) = G_AND [[TRUNC14]], [[C7]] 10476 ; GFX9: [[TRUNC15:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD15]](s32) 10477 ; GFX9: [[AND15:%[0-9]+]]:_(s16) = G_AND [[TRUNC15]], [[C7]] 10478 ; GFX9: [[SHL9:%[0-9]+]]:_(s16) = G_SHL [[AND15]], [[C8]](s16) 10479 ; GFX9: [[OR9:%[0-9]+]]:_(s16) = G_OR [[AND14]], [[SHL9]] 10480 ; GFX9: [[ZEXT4:%[0-9]+]]:_(s32) = G_ZEXT [[OR6]](s16) 10481 ; GFX9: [[ZEXT5:%[0-9]+]]:_(s32) = G_ZEXT [[OR7]](s16) 10482 ; GFX9: [[SHL10:%[0-9]+]]:_(s32) = G_SHL [[ZEXT5]], [[C9]](s32) 10483 ; GFX9: [[OR10:%[0-9]+]]:_(s32) = G_OR [[ZEXT4]], [[SHL10]] 10484 ; GFX9: [[ZEXT6:%[0-9]+]]:_(s32) = G_ZEXT [[OR8]](s16) 10485 ; GFX9: [[ZEXT7:%[0-9]+]]:_(s32) = G_ZEXT [[OR9]](s16) 10486 ; GFX9: [[SHL11:%[0-9]+]]:_(s32) = G_SHL [[ZEXT7]], [[C9]](s32) 10487 ; GFX9: [[OR11:%[0-9]+]]:_(s32) = G_OR [[ZEXT6]], [[SHL11]] 10488 ; GFX9: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR10]](s32), [[OR11]](s32) 10489 ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[MV]](s64), [[MV1]](s64) 10490 ; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>) 10491 ; GFX9-UNALIGNED-LABEL: name: test_load_local_v2s64_align16 10492 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 10493 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(<2 x s64>) = G_LOAD [[COPY]](p3) :: (load 16, align 1, addrspace 3) 10494 ; GFX9-UNALIGNED: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[LOAD]](<2 x s64>) 10495 %0:_(p3) = COPY $vgpr0 10496 %1:_(<2 x s64>) = G_LOAD %0 :: (load 16, align 1, addrspace 3) 10497 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1 10498... 10499 10500--- 10501name: test_load_local_v3s64_align32 10502body: | 10503 bb.0: 10504 liveins: $vgpr0 10505 10506 ; SI-LABEL: name: test_load_local_v3s64_align32 10507 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 10508 ; SI: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p3) :: (load 8, align 32, addrspace 3) 10509 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 10510 ; SI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 10511 ; SI: [[LOAD1:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD]](p3) :: (load 8 + 8, addrspace 3) 10512 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 10513 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 10514 ; SI: [[LOAD2:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD1]](p3) :: (load 8 + 16, align 16, addrspace 3) 10515 ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s64>) = G_BUILD_VECTOR [[LOAD]](s64), [[LOAD1]](s64), [[LOAD2]](s64) 10516 ; SI: [[DEF:%[0-9]+]]:_(<4 x s64>) = G_IMPLICIT_DEF 10517 ; SI: [[INSERT:%[0-9]+]]:_(<4 x s64>) = G_INSERT [[DEF]], [[BUILD_VECTOR]](<3 x s64>), 0 10518 ; SI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[INSERT]](<4 x s64>) 10519 ; CI-LABEL: name: test_load_local_v3s64_align32 10520 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 10521 ; CI: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p3) :: (load 8, align 32, addrspace 3) 10522 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 10523 ; CI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 10524 ; CI: [[LOAD1:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD]](p3) :: (load 8 + 8, addrspace 3) 10525 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 10526 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 10527 ; CI: [[LOAD2:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD1]](p3) :: (load 8 + 16, align 16, addrspace 3) 10528 ; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s64>) = G_BUILD_VECTOR [[LOAD]](s64), [[LOAD1]](s64), [[LOAD2]](s64) 10529 ; CI: [[DEF:%[0-9]+]]:_(<4 x s64>) = G_IMPLICIT_DEF 10530 ; CI: [[INSERT:%[0-9]+]]:_(<4 x s64>) = G_INSERT [[DEF]], [[BUILD_VECTOR]](<3 x s64>), 0 10531 ; CI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[INSERT]](<4 x s64>) 10532 ; CI-DS128-LABEL: name: test_load_local_v3s64_align32 10533 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 10534 ; CI-DS128: [[LOAD:%[0-9]+]]:_(<2 x s64>) = G_LOAD [[COPY]](p3) :: (load 16, align 32, addrspace 3) 10535 ; CI-DS128: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 10536 ; CI-DS128: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 10537 ; CI-DS128: [[LOAD1:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD]](p3) :: (load 8 + 16, align 16, addrspace 3) 10538 ; CI-DS128: [[DEF:%[0-9]+]]:_(<3 x s64>) = G_IMPLICIT_DEF 10539 ; CI-DS128: [[INSERT:%[0-9]+]]:_(<3 x s64>) = G_INSERT [[DEF]], [[LOAD]](<2 x s64>), 0 10540 ; CI-DS128: [[INSERT1:%[0-9]+]]:_(<3 x s64>) = G_INSERT [[INSERT]], [[LOAD1]](s64), 128 10541 ; CI-DS128: [[DEF1:%[0-9]+]]:_(<4 x s64>) = G_IMPLICIT_DEF 10542 ; CI-DS128: [[INSERT2:%[0-9]+]]:_(<4 x s64>) = G_INSERT [[DEF1]], [[INSERT1]](<3 x s64>), 0 10543 ; CI-DS128: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[INSERT2]](<4 x s64>) 10544 ; VI-LABEL: name: test_load_local_v3s64_align32 10545 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 10546 ; VI: [[LOAD:%[0-9]+]]:_(<2 x s64>) = G_LOAD [[COPY]](p3) :: (load 16, align 32, addrspace 3) 10547 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 10548 ; VI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 10549 ; VI: [[LOAD1:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD]](p3) :: (load 8 + 16, align 16, addrspace 3) 10550 ; VI: [[DEF:%[0-9]+]]:_(<3 x s64>) = G_IMPLICIT_DEF 10551 ; VI: [[INSERT:%[0-9]+]]:_(<3 x s64>) = G_INSERT [[DEF]], [[LOAD]](<2 x s64>), 0 10552 ; VI: [[INSERT1:%[0-9]+]]:_(<3 x s64>) = G_INSERT [[INSERT]], [[LOAD1]](s64), 128 10553 ; VI: [[DEF1:%[0-9]+]]:_(<4 x s64>) = G_IMPLICIT_DEF 10554 ; VI: [[INSERT2:%[0-9]+]]:_(<4 x s64>) = G_INSERT [[DEF1]], [[INSERT1]](<3 x s64>), 0 10555 ; VI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[INSERT2]](<4 x s64>) 10556 ; GFX9-LABEL: name: test_load_local_v3s64_align32 10557 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 10558 ; GFX9: [[LOAD:%[0-9]+]]:_(<2 x s64>) = G_LOAD [[COPY]](p3) :: (load 16, align 32, addrspace 3) 10559 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 10560 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 10561 ; GFX9: [[LOAD1:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD]](p3) :: (load 8 + 16, align 16, addrspace 3) 10562 ; GFX9: [[DEF:%[0-9]+]]:_(<3 x s64>) = G_IMPLICIT_DEF 10563 ; GFX9: [[INSERT:%[0-9]+]]:_(<3 x s64>) = G_INSERT [[DEF]], [[LOAD]](<2 x s64>), 0 10564 ; GFX9: [[INSERT1:%[0-9]+]]:_(<3 x s64>) = G_INSERT [[INSERT]], [[LOAD1]](s64), 128 10565 ; GFX9: [[DEF1:%[0-9]+]]:_(<4 x s64>) = G_IMPLICIT_DEF 10566 ; GFX9: [[INSERT2:%[0-9]+]]:_(<4 x s64>) = G_INSERT [[DEF1]], [[INSERT1]](<3 x s64>), 0 10567 ; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[INSERT2]](<4 x s64>) 10568 ; GFX9-UNALIGNED-LABEL: name: test_load_local_v3s64_align32 10569 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 10570 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(<2 x s64>) = G_LOAD [[COPY]](p3) :: (load 16, align 32, addrspace 3) 10571 ; GFX9-UNALIGNED: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 10572 ; GFX9-UNALIGNED: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 10573 ; GFX9-UNALIGNED: [[LOAD1:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD]](p3) :: (load 8 + 16, align 16, addrspace 3) 10574 ; GFX9-UNALIGNED: [[DEF:%[0-9]+]]:_(<3 x s64>) = G_IMPLICIT_DEF 10575 ; GFX9-UNALIGNED: [[INSERT:%[0-9]+]]:_(<3 x s64>) = G_INSERT [[DEF]], [[LOAD]](<2 x s64>), 0 10576 ; GFX9-UNALIGNED: [[INSERT1:%[0-9]+]]:_(<3 x s64>) = G_INSERT [[INSERT]], [[LOAD1]](s64), 128 10577 ; GFX9-UNALIGNED: [[DEF1:%[0-9]+]]:_(<4 x s64>) = G_IMPLICIT_DEF 10578 ; GFX9-UNALIGNED: [[INSERT2:%[0-9]+]]:_(<4 x s64>) = G_INSERT [[DEF1]], [[INSERT1]](<3 x s64>), 0 10579 ; GFX9-UNALIGNED: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[INSERT2]](<4 x s64>) 10580 %0:_(p3) = COPY $vgpr0 10581 %1:_(<3 x s64>) = G_LOAD %0 :: (load 24, align 32, addrspace 3) 10582 %2:_(<4 x s64>) = G_IMPLICIT_DEF 10583 %3:_(<4 x s64>) = G_INSERT %2, %1, 0 10584 $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY %3 10585... 10586 10587--- 10588name: test_load_local_v4s64_align32 10589body: | 10590 bb.0: 10591 liveins: $vgpr0 10592 10593 ; SI-LABEL: name: test_load_local_v4s64_align32 10594 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 10595 ; SI: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p3) :: (load 8, align 32, addrspace 3) 10596 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 10597 ; SI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 10598 ; SI: [[LOAD1:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD]](p3) :: (load 8 + 8, addrspace 3) 10599 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 10600 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 10601 ; SI: [[LOAD2:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD1]](p3) :: (load 8 + 16, align 16, addrspace 3) 10602 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 10603 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 10604 ; SI: [[LOAD3:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD2]](p3) :: (load 8 + 24, addrspace 3) 10605 ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s64>) = G_BUILD_VECTOR [[LOAD]](s64), [[LOAD1]](s64), [[LOAD2]](s64), [[LOAD3]](s64) 10606 ; SI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[BUILD_VECTOR]](<4 x s64>) 10607 ; CI-LABEL: name: test_load_local_v4s64_align32 10608 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 10609 ; CI: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p3) :: (load 8, align 32, addrspace 3) 10610 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 10611 ; CI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 10612 ; CI: [[LOAD1:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD]](p3) :: (load 8 + 8, addrspace 3) 10613 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 10614 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 10615 ; CI: [[LOAD2:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD1]](p3) :: (load 8 + 16, align 16, addrspace 3) 10616 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 10617 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 10618 ; CI: [[LOAD3:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD2]](p3) :: (load 8 + 24, addrspace 3) 10619 ; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s64>) = G_BUILD_VECTOR [[LOAD]](s64), [[LOAD1]](s64), [[LOAD2]](s64), [[LOAD3]](s64) 10620 ; CI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[BUILD_VECTOR]](<4 x s64>) 10621 ; CI-DS128-LABEL: name: test_load_local_v4s64_align32 10622 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 10623 ; CI-DS128: [[LOAD:%[0-9]+]]:_(<2 x s64>) = G_LOAD [[COPY]](p3) :: (load 16, align 32, addrspace 3) 10624 ; CI-DS128: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 10625 ; CI-DS128: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 10626 ; CI-DS128: [[LOAD1:%[0-9]+]]:_(<2 x s64>) = G_LOAD [[PTR_ADD]](p3) :: (load 16 + 16, addrspace 3) 10627 ; CI-DS128: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s64>) = G_CONCAT_VECTORS [[LOAD]](<2 x s64>), [[LOAD1]](<2 x s64>) 10628 ; CI-DS128: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[CONCAT_VECTORS]](<4 x s64>) 10629 ; VI-LABEL: name: test_load_local_v4s64_align32 10630 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 10631 ; VI: [[LOAD:%[0-9]+]]:_(<2 x s64>) = G_LOAD [[COPY]](p3) :: (load 16, align 32, addrspace 3) 10632 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 10633 ; VI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 10634 ; VI: [[LOAD1:%[0-9]+]]:_(<2 x s64>) = G_LOAD [[PTR_ADD]](p3) :: (load 16 + 16, addrspace 3) 10635 ; VI: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s64>) = G_CONCAT_VECTORS [[LOAD]](<2 x s64>), [[LOAD1]](<2 x s64>) 10636 ; VI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[CONCAT_VECTORS]](<4 x s64>) 10637 ; GFX9-LABEL: name: test_load_local_v4s64_align32 10638 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 10639 ; GFX9: [[LOAD:%[0-9]+]]:_(<2 x s64>) = G_LOAD [[COPY]](p3) :: (load 16, align 32, addrspace 3) 10640 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 10641 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 10642 ; GFX9: [[LOAD1:%[0-9]+]]:_(<2 x s64>) = G_LOAD [[PTR_ADD]](p3) :: (load 16 + 16, addrspace 3) 10643 ; GFX9: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s64>) = G_CONCAT_VECTORS [[LOAD]](<2 x s64>), [[LOAD1]](<2 x s64>) 10644 ; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[CONCAT_VECTORS]](<4 x s64>) 10645 ; GFX9-UNALIGNED-LABEL: name: test_load_local_v4s64_align32 10646 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 10647 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(<2 x s64>) = G_LOAD [[COPY]](p3) :: (load 16, align 32, addrspace 3) 10648 ; GFX9-UNALIGNED: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 10649 ; GFX9-UNALIGNED: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 10650 ; GFX9-UNALIGNED: [[LOAD1:%[0-9]+]]:_(<2 x s64>) = G_LOAD [[PTR_ADD]](p3) :: (load 16 + 16, addrspace 3) 10651 ; GFX9-UNALIGNED: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s64>) = G_CONCAT_VECTORS [[LOAD]](<2 x s64>), [[LOAD1]](<2 x s64>) 10652 ; GFX9-UNALIGNED: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[CONCAT_VECTORS]](<4 x s64>) 10653 %0:_(p3) = COPY $vgpr0 10654 %1:_(<4 x s64>) = G_LOAD %0 :: (load 32, align 32, addrspace 3) 10655 $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY %1 10656... 10657 10658--- 10659name: test_load_local_v2p1_align4 10660body: | 10661 bb.0: 10662 liveins: $vgpr0 10663 10664 ; SI-LABEL: name: test_load_local_v2p1_align4 10665 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 10666 ; SI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 8, align 4, addrspace 3) 10667 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 10668 ; SI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 10669 ; SI: [[LOAD1:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[PTR_ADD]](p3) :: (load 8 + 8, align 4, addrspace 3) 10670 ; SI: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s32>) = G_CONCAT_VECTORS [[LOAD]](<2 x s32>), [[LOAD1]](<2 x s32>) 10671 ; SI: [[BITCAST:%[0-9]+]]:_(<2 x p1>) = G_BITCAST [[CONCAT_VECTORS]](<4 x s32>) 10672 ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BITCAST]](<2 x p1>) 10673 ; CI-LABEL: name: test_load_local_v2p1_align4 10674 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 10675 ; CI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 8, align 4, addrspace 3) 10676 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 10677 ; CI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 10678 ; CI: [[LOAD1:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[PTR_ADD]](p3) :: (load 8 + 8, align 4, addrspace 3) 10679 ; CI: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s32>) = G_CONCAT_VECTORS [[LOAD]](<2 x s32>), [[LOAD1]](<2 x s32>) 10680 ; CI: [[BITCAST:%[0-9]+]]:_(<2 x p1>) = G_BITCAST [[CONCAT_VECTORS]](<4 x s32>) 10681 ; CI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BITCAST]](<2 x p1>) 10682 ; CI-DS128-LABEL: name: test_load_local_v2p1_align4 10683 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 10684 ; CI-DS128: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) 10685 ; CI-DS128: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 10686 ; CI-DS128: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 10687 ; CI-DS128: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 4 + 4, addrspace 3) 10688 ; CI-DS128: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 10689 ; CI-DS128: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 10690 ; CI-DS128: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 4 + 8, addrspace 3) 10691 ; CI-DS128: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 10692 ; CI-DS128: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 10693 ; CI-DS128: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 4 + 12, addrspace 3) 10694 ; CI-DS128: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32) 10695 ; CI-DS128: [[BITCAST:%[0-9]+]]:_(<2 x p1>) = G_BITCAST [[BUILD_VECTOR]](<4 x s32>) 10696 ; CI-DS128: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BITCAST]](<2 x p1>) 10697 ; VI-LABEL: name: test_load_local_v2p1_align4 10698 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 10699 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) 10700 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 10701 ; VI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 10702 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 4 + 4, addrspace 3) 10703 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 10704 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 10705 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 4 + 8, addrspace 3) 10706 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 10707 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 10708 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 4 + 12, addrspace 3) 10709 ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32) 10710 ; VI: [[BITCAST:%[0-9]+]]:_(<2 x p1>) = G_BITCAST [[BUILD_VECTOR]](<4 x s32>) 10711 ; VI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BITCAST]](<2 x p1>) 10712 ; GFX9-LABEL: name: test_load_local_v2p1_align4 10713 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 10714 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) 10715 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 10716 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 10717 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 4 + 4, addrspace 3) 10718 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 10719 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 10720 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 4 + 8, addrspace 3) 10721 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 10722 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 10723 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 4 + 12, addrspace 3) 10724 ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32) 10725 ; GFX9: [[BITCAST:%[0-9]+]]:_(<2 x p1>) = G_BITCAST [[BUILD_VECTOR]](<4 x s32>) 10726 ; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BITCAST]](<2 x p1>) 10727 ; GFX9-UNALIGNED-LABEL: name: test_load_local_v2p1_align4 10728 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 10729 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[COPY]](p3) :: (load 16, align 4, addrspace 3) 10730 ; GFX9-UNALIGNED: [[BITCAST:%[0-9]+]]:_(<2 x p1>) = G_BITCAST [[LOAD]](<4 x s32>) 10731 ; GFX9-UNALIGNED: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BITCAST]](<2 x p1>) 10732 %0:_(p3) = COPY $vgpr0 10733 %1:_(<2 x p1>) = G_LOAD %0 :: (load 16, align 4, addrspace 3) 10734 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1 10735... 10736 10737--- 10738name: test_load_local_v2p3_align8 10739body: | 10740 bb.0: 10741 liveins: $vgpr0 10742 10743 ; SI-LABEL: name: test_load_local_v2p3_align8 10744 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 10745 ; SI: [[LOAD:%[0-9]+]]:_(<2 x p3>) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) 10746 ; SI: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x p3>) 10747 ; CI-LABEL: name: test_load_local_v2p3_align8 10748 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 10749 ; CI: [[LOAD:%[0-9]+]]:_(<2 x p3>) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) 10750 ; CI: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x p3>) 10751 ; CI-DS128-LABEL: name: test_load_local_v2p3_align8 10752 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 10753 ; CI-DS128: [[LOAD:%[0-9]+]]:_(<2 x p3>) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) 10754 ; CI-DS128: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x p3>) 10755 ; VI-LABEL: name: test_load_local_v2p3_align8 10756 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 10757 ; VI: [[LOAD:%[0-9]+]]:_(<2 x p3>) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) 10758 ; VI: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x p3>) 10759 ; GFX9-LABEL: name: test_load_local_v2p3_align8 10760 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 10761 ; GFX9: [[LOAD:%[0-9]+]]:_(<2 x p3>) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) 10762 ; GFX9: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x p3>) 10763 ; GFX9-UNALIGNED-LABEL: name: test_load_local_v2p3_align8 10764 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 10765 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(<2 x p3>) = G_LOAD [[COPY]](p3) :: (load 8, addrspace 3) 10766 ; GFX9-UNALIGNED: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x p3>) 10767 %0:_(p3) = COPY $vgpr0 10768 %1:_(<2 x p3>) = G_LOAD %0 :: (load 8, align 8, addrspace 3) 10769 $vgpr0_vgpr1 = COPY %1 10770... 10771 10772--- 10773name: test_extload_local_s32_from_1_align4 10774body: | 10775 bb.0: 10776 liveins: $vgpr0 10777 10778 ; SI-LABEL: name: test_extload_local_s32_from_1_align4 10779 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 10780 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, align 4, addrspace 3) 10781 ; SI: $vgpr0 = COPY [[LOAD]](s32) 10782 ; CI-LABEL: name: test_extload_local_s32_from_1_align4 10783 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 10784 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, align 4, addrspace 3) 10785 ; CI: $vgpr0 = COPY [[LOAD]](s32) 10786 ; CI-DS128-LABEL: name: test_extload_local_s32_from_1_align4 10787 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 10788 ; CI-DS128: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, align 4, addrspace 3) 10789 ; CI-DS128: $vgpr0 = COPY [[LOAD]](s32) 10790 ; VI-LABEL: name: test_extload_local_s32_from_1_align4 10791 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 10792 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, align 4, addrspace 3) 10793 ; VI: $vgpr0 = COPY [[LOAD]](s32) 10794 ; GFX9-LABEL: name: test_extload_local_s32_from_1_align4 10795 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 10796 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, align 4, addrspace 3) 10797 ; GFX9: $vgpr0 = COPY [[LOAD]](s32) 10798 ; GFX9-UNALIGNED-LABEL: name: test_extload_local_s32_from_1_align4 10799 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 10800 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, align 4, addrspace 3) 10801 ; GFX9-UNALIGNED: $vgpr0 = COPY [[LOAD]](s32) 10802 %0:_(p3) = COPY $vgpr0 10803 %1:_(s32) = G_LOAD %0 :: (load 1, align 4, addrspace 3) 10804 $vgpr0 = COPY %1 10805... 10806 10807--- 10808name: test_extload_local_s32_from_2_align4 10809body: | 10810 bb.0: 10811 liveins: $vgpr0 10812 10813 ; SI-LABEL: name: test_extload_local_s32_from_2_align4 10814 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 10815 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, align 4, addrspace 3) 10816 ; SI: $vgpr0 = COPY [[LOAD]](s32) 10817 ; CI-LABEL: name: test_extload_local_s32_from_2_align4 10818 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 10819 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, align 4, addrspace 3) 10820 ; CI: $vgpr0 = COPY [[LOAD]](s32) 10821 ; CI-DS128-LABEL: name: test_extload_local_s32_from_2_align4 10822 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 10823 ; CI-DS128: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, align 4, addrspace 3) 10824 ; CI-DS128: $vgpr0 = COPY [[LOAD]](s32) 10825 ; VI-LABEL: name: test_extload_local_s32_from_2_align4 10826 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 10827 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, align 4, addrspace 3) 10828 ; VI: $vgpr0 = COPY [[LOAD]](s32) 10829 ; GFX9-LABEL: name: test_extload_local_s32_from_2_align4 10830 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 10831 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, align 4, addrspace 3) 10832 ; GFX9: $vgpr0 = COPY [[LOAD]](s32) 10833 ; GFX9-UNALIGNED-LABEL: name: test_extload_local_s32_from_2_align4 10834 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 10835 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, align 4, addrspace 3) 10836 ; GFX9-UNALIGNED: $vgpr0 = COPY [[LOAD]](s32) 10837 %0:_(p3) = COPY $vgpr0 10838 %1:_(s32) = G_LOAD %0 :: (load 2, align 4, addrspace 3) 10839 $vgpr0 = COPY %1 10840... 10841 10842--- 10843name: test_extload_local_s64_from_1_align4 10844body: | 10845 bb.0: 10846 liveins: $vgpr0 10847 10848 10849 ; SI-LABEL: name: test_extload_local_s64_from_1_align4 10850 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 10851 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, align 4, addrspace 3) 10852 ; SI: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[LOAD]](s32) 10853 ; SI: $vgpr0_vgpr1 = COPY [[ANYEXT]](s64) 10854 ; CI-LABEL: name: test_extload_local_s64_from_1_align4 10855 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 10856 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, align 4, addrspace 3) 10857 ; CI: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[LOAD]](s32) 10858 ; CI: $vgpr0_vgpr1 = COPY [[ANYEXT]](s64) 10859 ; CI-DS128-LABEL: name: test_extload_local_s64_from_1_align4 10860 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 10861 ; CI-DS128: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, align 4, addrspace 3) 10862 ; CI-DS128: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[LOAD]](s32) 10863 ; CI-DS128: $vgpr0_vgpr1 = COPY [[ANYEXT]](s64) 10864 ; VI-LABEL: name: test_extload_local_s64_from_1_align4 10865 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 10866 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, align 4, addrspace 3) 10867 ; VI: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[LOAD]](s32) 10868 ; VI: $vgpr0_vgpr1 = COPY [[ANYEXT]](s64) 10869 ; GFX9-LABEL: name: test_extload_local_s64_from_1_align4 10870 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 10871 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, align 4, addrspace 3) 10872 ; GFX9: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[LOAD]](s32) 10873 ; GFX9: $vgpr0_vgpr1 = COPY [[ANYEXT]](s64) 10874 ; GFX9-UNALIGNED-LABEL: name: test_extload_local_s64_from_1_align4 10875 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 10876 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, align 4, addrspace 3) 10877 ; GFX9-UNALIGNED: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[LOAD]](s32) 10878 ; GFX9-UNALIGNED: $vgpr0_vgpr1 = COPY [[ANYEXT]](s64) 10879 %0:_(p3) = COPY $vgpr0 10880 %1:_(s64) = G_LOAD %0 :: (load 1, align 4, addrspace 3) 10881 $vgpr0_vgpr1 = COPY %1 10882... 10883 10884--- 10885name: test_extload_local_s64_from_2_align4 10886body: | 10887 bb.0: 10888 liveins: $vgpr0 10889 10890 ; SI-LABEL: name: test_extload_local_s64_from_2_align4 10891 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 10892 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, align 4, addrspace 3) 10893 ; SI: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[LOAD]](s32) 10894 ; SI: $vgpr0_vgpr1 = COPY [[ANYEXT]](s64) 10895 ; CI-LABEL: name: test_extload_local_s64_from_2_align4 10896 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 10897 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, align 4, addrspace 3) 10898 ; CI: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[LOAD]](s32) 10899 ; CI: $vgpr0_vgpr1 = COPY [[ANYEXT]](s64) 10900 ; CI-DS128-LABEL: name: test_extload_local_s64_from_2_align4 10901 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 10902 ; CI-DS128: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, align 4, addrspace 3) 10903 ; CI-DS128: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[LOAD]](s32) 10904 ; CI-DS128: $vgpr0_vgpr1 = COPY [[ANYEXT]](s64) 10905 ; VI-LABEL: name: test_extload_local_s64_from_2_align4 10906 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 10907 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, align 4, addrspace 3) 10908 ; VI: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[LOAD]](s32) 10909 ; VI: $vgpr0_vgpr1 = COPY [[ANYEXT]](s64) 10910 ; GFX9-LABEL: name: test_extload_local_s64_from_2_align4 10911 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 10912 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, align 4, addrspace 3) 10913 ; GFX9: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[LOAD]](s32) 10914 ; GFX9: $vgpr0_vgpr1 = COPY [[ANYEXT]](s64) 10915 ; GFX9-UNALIGNED-LABEL: name: test_extload_local_s64_from_2_align4 10916 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 10917 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, align 4, addrspace 3) 10918 ; GFX9-UNALIGNED: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[LOAD]](s32) 10919 ; GFX9-UNALIGNED: $vgpr0_vgpr1 = COPY [[ANYEXT]](s64) 10920 %0:_(p3) = COPY $vgpr0 10921 %1:_(s64) = G_LOAD %0 :: (load 2, align 4, addrspace 3) 10922 $vgpr0_vgpr1 = COPY %1 10923... 10924 10925--- 10926name: test_extload_local_s64_from_4_align4 10927body: | 10928 bb.0: 10929 liveins: $vgpr0 10930 10931 ; SI-LABEL: name: test_extload_local_s64_from_4_align4 10932 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 10933 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) 10934 ; SI: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[LOAD]](s32) 10935 ; SI: $vgpr0_vgpr1 = COPY [[ANYEXT]](s64) 10936 ; CI-LABEL: name: test_extload_local_s64_from_4_align4 10937 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 10938 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) 10939 ; CI: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[LOAD]](s32) 10940 ; CI: $vgpr0_vgpr1 = COPY [[ANYEXT]](s64) 10941 ; CI-DS128-LABEL: name: test_extload_local_s64_from_4_align4 10942 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 10943 ; CI-DS128: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) 10944 ; CI-DS128: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[LOAD]](s32) 10945 ; CI-DS128: $vgpr0_vgpr1 = COPY [[ANYEXT]](s64) 10946 ; VI-LABEL: name: test_extload_local_s64_from_4_align4 10947 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 10948 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) 10949 ; VI: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[LOAD]](s32) 10950 ; VI: $vgpr0_vgpr1 = COPY [[ANYEXT]](s64) 10951 ; GFX9-LABEL: name: test_extload_local_s64_from_4_align4 10952 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 10953 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) 10954 ; GFX9: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[LOAD]](s32) 10955 ; GFX9: $vgpr0_vgpr1 = COPY [[ANYEXT]](s64) 10956 ; GFX9-UNALIGNED-LABEL: name: test_extload_local_s64_from_4_align4 10957 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 10958 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) 10959 ; GFX9-UNALIGNED: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[LOAD]](s32) 10960 ; GFX9-UNALIGNED: $vgpr0_vgpr1 = COPY [[ANYEXT]](s64) 10961 %0:_(p3) = COPY $vgpr0 10962 %1:_(s64) = G_LOAD %0 :: (load 4, align 4, addrspace 3) 10963 $vgpr0_vgpr1 = COPY %1 10964... 10965 10966--- 10967name: test_extload_local_s128_from_4_align4 10968body: | 10969 bb.0: 10970 liveins: $vgpr0 10971 10972 ; SI-LABEL: name: test_extload_local_s128_from_4_align4 10973 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 10974 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) 10975 ; SI: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF 10976 ; SI: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD]](s32), [[DEF]](s32) 10977 ; SI: [[DEF1:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF 10978 ; SI: [[MV1:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[MV]](s64), [[DEF1]](s64) 10979 ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[MV1]](s128) 10980 ; CI-LABEL: name: test_extload_local_s128_from_4_align4 10981 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 10982 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) 10983 ; CI: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF 10984 ; CI: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD]](s32), [[DEF]](s32) 10985 ; CI: [[DEF1:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF 10986 ; CI: [[MV1:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[MV]](s64), [[DEF1]](s64) 10987 ; CI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[MV1]](s128) 10988 ; CI-DS128-LABEL: name: test_extload_local_s128_from_4_align4 10989 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 10990 ; CI-DS128: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) 10991 ; CI-DS128: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF 10992 ; CI-DS128: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD]](s32), [[DEF]](s32) 10993 ; CI-DS128: [[DEF1:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF 10994 ; CI-DS128: [[MV1:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[MV]](s64), [[DEF1]](s64) 10995 ; CI-DS128: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[MV1]](s128) 10996 ; VI-LABEL: name: test_extload_local_s128_from_4_align4 10997 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 10998 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) 10999 ; VI: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF 11000 ; VI: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD]](s32), [[DEF]](s32) 11001 ; VI: [[DEF1:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF 11002 ; VI: [[MV1:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[MV]](s64), [[DEF1]](s64) 11003 ; VI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[MV1]](s128) 11004 ; GFX9-LABEL: name: test_extload_local_s128_from_4_align4 11005 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 11006 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) 11007 ; GFX9: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF 11008 ; GFX9: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD]](s32), [[DEF]](s32) 11009 ; GFX9: [[DEF1:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF 11010 ; GFX9: [[MV1:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[MV]](s64), [[DEF1]](s64) 11011 ; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[MV1]](s128) 11012 ; GFX9-UNALIGNED-LABEL: name: test_extload_local_s128_from_4_align4 11013 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 11014 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) 11015 ; GFX9-UNALIGNED: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF 11016 ; GFX9-UNALIGNED: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD]](s32), [[DEF]](s32) 11017 ; GFX9-UNALIGNED: [[DEF1:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF 11018 ; GFX9-UNALIGNED: [[MV1:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[MV]](s64), [[DEF1]](s64) 11019 ; GFX9-UNALIGNED: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[MV1]](s128) 11020 %0:_(p3) = COPY $vgpr0 11021 %1:_(s128) = G_LOAD %0 :: (load 4, align 4, addrspace 3) 11022 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1 11023... 11024 11025--- 11026name: test_extload_local_s64_from_2_align2 11027body: | 11028 bb.0: 11029 liveins: $vgpr0 11030 11031 ; SI-LABEL: name: test_extload_local_s64_from_2_align2 11032 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 11033 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, align 4, addrspace 3) 11034 ; SI: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[LOAD]](s32) 11035 ; SI: $vgpr0_vgpr1 = COPY [[ANYEXT]](s64) 11036 ; CI-LABEL: name: test_extload_local_s64_from_2_align2 11037 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 11038 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, align 4, addrspace 3) 11039 ; CI: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[LOAD]](s32) 11040 ; CI: $vgpr0_vgpr1 = COPY [[ANYEXT]](s64) 11041 ; CI-DS128-LABEL: name: test_extload_local_s64_from_2_align2 11042 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 11043 ; CI-DS128: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, align 4, addrspace 3) 11044 ; CI-DS128: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[LOAD]](s32) 11045 ; CI-DS128: $vgpr0_vgpr1 = COPY [[ANYEXT]](s64) 11046 ; VI-LABEL: name: test_extload_local_s64_from_2_align2 11047 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 11048 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, align 4, addrspace 3) 11049 ; VI: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[LOAD]](s32) 11050 ; VI: $vgpr0_vgpr1 = COPY [[ANYEXT]](s64) 11051 ; GFX9-LABEL: name: test_extload_local_s64_from_2_align2 11052 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 11053 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, align 4, addrspace 3) 11054 ; GFX9: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[LOAD]](s32) 11055 ; GFX9: $vgpr0_vgpr1 = COPY [[ANYEXT]](s64) 11056 ; GFX9-UNALIGNED-LABEL: name: test_extload_local_s64_from_2_align2 11057 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 11058 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, align 4, addrspace 3) 11059 ; GFX9-UNALIGNED: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[LOAD]](s32) 11060 ; GFX9-UNALIGNED: $vgpr0_vgpr1 = COPY [[ANYEXT]](s64) 11061 %0:_(p3) = COPY $vgpr0 11062 %1:_(s64) = G_LOAD %0 :: (load 2, align 4, addrspace 3) 11063 $vgpr0_vgpr1 = COPY %1 11064... 11065 11066--- 11067name: test_extload_local_s64_from_1_align1 11068body: | 11069 bb.0: 11070 liveins: $vgpr0 11071 11072 ; SI-LABEL: name: test_extload_local_s64_from_1_align1 11073 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 11074 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, align 4, addrspace 3) 11075 ; SI: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[LOAD]](s32) 11076 ; SI: $vgpr0_vgpr1 = COPY [[ANYEXT]](s64) 11077 ; CI-LABEL: name: test_extload_local_s64_from_1_align1 11078 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 11079 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, align 4, addrspace 3) 11080 ; CI: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[LOAD]](s32) 11081 ; CI: $vgpr0_vgpr1 = COPY [[ANYEXT]](s64) 11082 ; CI-DS128-LABEL: name: test_extload_local_s64_from_1_align1 11083 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 11084 ; CI-DS128: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, align 4, addrspace 3) 11085 ; CI-DS128: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[LOAD]](s32) 11086 ; CI-DS128: $vgpr0_vgpr1 = COPY [[ANYEXT]](s64) 11087 ; VI-LABEL: name: test_extload_local_s64_from_1_align1 11088 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 11089 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, align 4, addrspace 3) 11090 ; VI: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[LOAD]](s32) 11091 ; VI: $vgpr0_vgpr1 = COPY [[ANYEXT]](s64) 11092 ; GFX9-LABEL: name: test_extload_local_s64_from_1_align1 11093 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 11094 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, align 4, addrspace 3) 11095 ; GFX9: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[LOAD]](s32) 11096 ; GFX9: $vgpr0_vgpr1 = COPY [[ANYEXT]](s64) 11097 ; GFX9-UNALIGNED-LABEL: name: test_extload_local_s64_from_1_align1 11098 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 11099 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, align 4, addrspace 3) 11100 ; GFX9-UNALIGNED: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[LOAD]](s32) 11101 ; GFX9-UNALIGNED: $vgpr0_vgpr1 = COPY [[ANYEXT]](s64) 11102 %0:_(p3) = COPY $vgpr0 11103 %1:_(s64) = G_LOAD %0 :: (load 1, align 4, addrspace 3) 11104 $vgpr0_vgpr1 = COPY %1 11105... 11106 11107--- 11108name: test_extload_local_v2s32_from_4_align1 11109body: | 11110 bb.0: 11111 liveins: $vgpr0 11112 11113 ; SI-LABEL: name: test_extload_local_v2s32_from_4_align1 11114 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 11115 ; SI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 4, align 1, addrspace 3) 11116 ; SI: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x s32>) 11117 ; CI-LABEL: name: test_extload_local_v2s32_from_4_align1 11118 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 11119 ; CI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 4, align 1, addrspace 3) 11120 ; CI: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x s32>) 11121 ; CI-DS128-LABEL: name: test_extload_local_v2s32_from_4_align1 11122 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 11123 ; CI-DS128: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 4, align 1, addrspace 3) 11124 ; CI-DS128: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x s32>) 11125 ; VI-LABEL: name: test_extload_local_v2s32_from_4_align1 11126 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 11127 ; VI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 4, align 1, addrspace 3) 11128 ; VI: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x s32>) 11129 ; GFX9-LABEL: name: test_extload_local_v2s32_from_4_align1 11130 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 11131 ; GFX9: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 4, align 1, addrspace 3) 11132 ; GFX9: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x s32>) 11133 ; GFX9-UNALIGNED-LABEL: name: test_extload_local_v2s32_from_4_align1 11134 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 11135 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 4, align 1, addrspace 3) 11136 ; GFX9-UNALIGNED: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x s32>) 11137 %0:_(p3) = COPY $vgpr0 11138 %1:_(<2 x s32>) = G_LOAD %0 :: (load 4, align 1, addrspace 3) 11139 $vgpr0_vgpr1 = COPY %1 11140... 11141 11142--- 11143name: test_extload_local_v2s32_from_4_align2 11144body: | 11145 bb.0: 11146 liveins: $vgpr0 11147 11148 ; SI-LABEL: name: test_extload_local_v2s32_from_4_align2 11149 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 11150 ; SI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 4, align 2, addrspace 3) 11151 ; SI: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x s32>) 11152 ; CI-LABEL: name: test_extload_local_v2s32_from_4_align2 11153 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 11154 ; CI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 4, align 2, addrspace 3) 11155 ; CI: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x s32>) 11156 ; CI-DS128-LABEL: name: test_extload_local_v2s32_from_4_align2 11157 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 11158 ; CI-DS128: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 4, align 2, addrspace 3) 11159 ; CI-DS128: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x s32>) 11160 ; VI-LABEL: name: test_extload_local_v2s32_from_4_align2 11161 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 11162 ; VI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 4, align 2, addrspace 3) 11163 ; VI: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x s32>) 11164 ; GFX9-LABEL: name: test_extload_local_v2s32_from_4_align2 11165 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 11166 ; GFX9: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 4, align 2, addrspace 3) 11167 ; GFX9: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x s32>) 11168 ; GFX9-UNALIGNED-LABEL: name: test_extload_local_v2s32_from_4_align2 11169 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 11170 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 4, align 2, addrspace 3) 11171 ; GFX9-UNALIGNED: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x s32>) 11172 %0:_(p3) = COPY $vgpr0 11173 %1:_(<2 x s32>) = G_LOAD %0 :: (load 4, align 2, addrspace 3) 11174 $vgpr0_vgpr1 = COPY %1 11175... 11176 11177--- 11178name: test_extload_local_v2s32_from_4_align4 11179body: | 11180 bb.0: 11181 liveins: $vgpr0 11182 11183 ; SI-LABEL: name: test_extload_local_v2s32_from_4_align4 11184 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 11185 ; SI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) 11186 ; SI: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x s32>) 11187 ; CI-LABEL: name: test_extload_local_v2s32_from_4_align4 11188 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 11189 ; CI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) 11190 ; CI: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x s32>) 11191 ; CI-DS128-LABEL: name: test_extload_local_v2s32_from_4_align4 11192 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 11193 ; CI-DS128: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) 11194 ; CI-DS128: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x s32>) 11195 ; VI-LABEL: name: test_extload_local_v2s32_from_4_align4 11196 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 11197 ; VI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) 11198 ; VI: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x s32>) 11199 ; GFX9-LABEL: name: test_extload_local_v2s32_from_4_align4 11200 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 11201 ; GFX9: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) 11202 ; GFX9: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x s32>) 11203 ; GFX9-UNALIGNED-LABEL: name: test_extload_local_v2s32_from_4_align4 11204 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 11205 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 4, addrspace 3) 11206 ; GFX9-UNALIGNED: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x s32>) 11207 %0:_(p3) = COPY $vgpr0 11208 %1:_(<2 x s32>) = G_LOAD %0 :: (load 4, align 4, addrspace 3) 11209 $vgpr0_vgpr1 = COPY %1 11210... 11211 11212--- 11213name: test_extload_local_v3s32_from_6_align4 11214body: | 11215 bb.0: 11216 liveins: $vgpr0 11217 11218 ; SI-LABEL: name: test_extload_local_v3s32_from_6_align4 11219 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 11220 ; SI: [[LOAD:%[0-9]+]]:_(<3 x s32>) = G_LOAD [[COPY]](p3) :: (load 6, align 4, addrspace 3) 11221 ; SI: $vgpr0_vgpr1_vgpr2 = COPY [[LOAD]](<3 x s32>) 11222 ; CI-LABEL: name: test_extload_local_v3s32_from_6_align4 11223 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 11224 ; CI: [[LOAD:%[0-9]+]]:_(<3 x s32>) = G_LOAD [[COPY]](p3) :: (load 6, align 4, addrspace 3) 11225 ; CI: $vgpr0_vgpr1_vgpr2 = COPY [[LOAD]](<3 x s32>) 11226 ; CI-DS128-LABEL: name: test_extload_local_v3s32_from_6_align4 11227 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 11228 ; CI-DS128: [[LOAD:%[0-9]+]]:_(<3 x s32>) = G_LOAD [[COPY]](p3) :: (load 6, align 4, addrspace 3) 11229 ; CI-DS128: $vgpr0_vgpr1_vgpr2 = COPY [[LOAD]](<3 x s32>) 11230 ; VI-LABEL: name: test_extload_local_v3s32_from_6_align4 11231 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 11232 ; VI: [[LOAD:%[0-9]+]]:_(<3 x s32>) = G_LOAD [[COPY]](p3) :: (load 6, align 4, addrspace 3) 11233 ; VI: $vgpr0_vgpr1_vgpr2 = COPY [[LOAD]](<3 x s32>) 11234 ; GFX9-LABEL: name: test_extload_local_v3s32_from_6_align4 11235 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 11236 ; GFX9: [[LOAD:%[0-9]+]]:_(<3 x s32>) = G_LOAD [[COPY]](p3) :: (load 6, align 4, addrspace 3) 11237 ; GFX9: $vgpr0_vgpr1_vgpr2 = COPY [[LOAD]](<3 x s32>) 11238 ; GFX9-UNALIGNED-LABEL: name: test_extload_local_v3s32_from_6_align4 11239 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 11240 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(<3 x s32>) = G_LOAD [[COPY]](p3) :: (load 6, align 4, addrspace 3) 11241 ; GFX9-UNALIGNED: $vgpr0_vgpr1_vgpr2 = COPY [[LOAD]](<3 x s32>) 11242 %0:_(p3) = COPY $vgpr0 11243 %1:_(<3 x s32>) = G_LOAD %0 :: (load 6, align 4, addrspace 3) 11244 $vgpr0_vgpr1_vgpr2 = COPY %1 11245... 11246 11247--- 11248name: test_extload_local_v4s32_from_8_align4 11249body: | 11250 bb.0: 11251 liveins: $vgpr0 11252 11253 ; SI-LABEL: name: test_extload_local_v4s32_from_8_align4 11254 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 11255 ; SI: [[LOAD:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[COPY]](p3) :: (load 8, align 4, addrspace 3) 11256 ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[LOAD]](<4 x s32>) 11257 ; CI-LABEL: name: test_extload_local_v4s32_from_8_align4 11258 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 11259 ; CI: [[LOAD:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[COPY]](p3) :: (load 8, align 4, addrspace 3) 11260 ; CI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[LOAD]](<4 x s32>) 11261 ; CI-DS128-LABEL: name: test_extload_local_v4s32_from_8_align4 11262 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 11263 ; CI-DS128: [[LOAD:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[COPY]](p3) :: (load 8, align 4, addrspace 3) 11264 ; CI-DS128: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[LOAD]](<4 x s32>) 11265 ; VI-LABEL: name: test_extload_local_v4s32_from_8_align4 11266 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 11267 ; VI: [[LOAD:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[COPY]](p3) :: (load 8, align 4, addrspace 3) 11268 ; VI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[LOAD]](<4 x s32>) 11269 ; GFX9-LABEL: name: test_extload_local_v4s32_from_8_align4 11270 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 11271 ; GFX9: [[LOAD:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[COPY]](p3) :: (load 8, align 4, addrspace 3) 11272 ; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[LOAD]](<4 x s32>) 11273 ; GFX9-UNALIGNED-LABEL: name: test_extload_local_v4s32_from_8_align4 11274 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 11275 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[COPY]](p3) :: (load 8, align 4, addrspace 3) 11276 ; GFX9-UNALIGNED: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[LOAD]](<4 x s32>) 11277 %0:_(p3) = COPY $vgpr0 11278 %1:_(<4 x s32>) = G_LOAD %0 :: (load 8, align 4, addrspace 3) 11279 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1 11280... 11281 11282--- 11283name: test_extload_local_v2s96_from_24_align1 11284body: | 11285 bb.0: 11286 liveins: $vgpr0 11287 11288 ; SI-LABEL: name: test_extload_local_v2s96_from_24_align1 11289 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 11290 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 11291 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 11292 ; SI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 11293 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 11294 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 11295 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 11296 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 11297 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 11298 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 11299 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 11300 ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 11301 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 11302 ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 11303 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 11304 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 11305 ; SI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 11306 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 11307 ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 11308 ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 11309 ; SI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 11310 ; SI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 11311 ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 11312 ; SI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 11313 ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 11314 ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 11315 ; SI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 11316 ; SI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 11317 ; SI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 11318 ; SI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 11319 ; SI: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C7]](s32) 11320 ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 11321 ; SI: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 11322 ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 11323 ; SI: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 11324 ; SI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 11325 ; SI: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 11326 ; SI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 11327 ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 11328 ; SI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 11329 ; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 11330 ; SI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 11331 ; SI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 11332 ; SI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 11333 ; SI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 11334 ; SI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 11335 ; SI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 11336 ; SI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 11337 ; SI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 11338 ; SI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 11339 ; SI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 11340 ; SI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 11341 ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32) 11342 ; SI: [[PTR_ADD7:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 11343 ; SI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p3) :: (load 1 + 8, addrspace 3) 11344 ; SI: [[PTR_ADD8:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 11345 ; SI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p3) :: (load 1 + 9, addrspace 3) 11346 ; SI: [[PTR_ADD9:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 11347 ; SI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p3) :: (load 1 + 10, addrspace 3) 11348 ; SI: [[PTR_ADD10:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 11349 ; SI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p3) :: (load 1 + 11, addrspace 3) 11350 ; SI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 11351 ; SI: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 11352 ; SI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 11353 ; SI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 11354 ; SI: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 11355 ; SI: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 11356 ; SI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 11357 ; SI: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 11358 ; SI: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 11359 ; SI: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 11360 ; SI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 11361 ; SI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 11362 ; SI: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 11363 ; SI: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 11364 ; SI: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF 11365 ; SI: [[COPY13:%[0-9]+]]:_(<3 x s32>) = COPY [[DEF]](<3 x s32>) 11366 ; SI: [[INSERT:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[COPY13]], [[BUILD_VECTOR]](<2 x s32>), 0 11367 ; SI: [[INSERT1:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT]], [[OR8]](s32), 64 11368 ; SI: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[INSERT1]](<3 x s32>) 11369 ; SI: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 11370 ; SI: [[PTR_ADD11:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C8]](s32) 11371 ; SI: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p3) :: (load 1 + 12, addrspace 3) 11372 ; SI: [[PTR_ADD12:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C]](s32) 11373 ; SI: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p3) :: (load 1 + 13, addrspace 3) 11374 ; SI: [[PTR_ADD13:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C1]](s32) 11375 ; SI: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p3) :: (load 1 + 14, addrspace 3) 11376 ; SI: [[PTR_ADD14:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C2]](s32) 11377 ; SI: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p3) :: (load 1 + 15, addrspace 3) 11378 ; SI: [[COPY14:%[0-9]+]]:_(s32) = COPY [[LOAD12]](s32) 11379 ; SI: [[AND12:%[0-9]+]]:_(s32) = G_AND [[COPY14]], [[C3]] 11380 ; SI: [[COPY15:%[0-9]+]]:_(s32) = COPY [[LOAD13]](s32) 11381 ; SI: [[AND13:%[0-9]+]]:_(s32) = G_AND [[COPY15]], [[C3]] 11382 ; SI: [[SHL9:%[0-9]+]]:_(s32) = G_SHL [[AND13]], [[C4]](s32) 11383 ; SI: [[OR9:%[0-9]+]]:_(s32) = G_OR [[AND12]], [[SHL9]] 11384 ; SI: [[COPY16:%[0-9]+]]:_(s32) = COPY [[LOAD14]](s32) 11385 ; SI: [[AND14:%[0-9]+]]:_(s32) = G_AND [[COPY16]], [[C3]] 11386 ; SI: [[SHL10:%[0-9]+]]:_(s32) = G_SHL [[AND14]], [[C5]](s32) 11387 ; SI: [[OR10:%[0-9]+]]:_(s32) = G_OR [[OR9]], [[SHL10]] 11388 ; SI: [[COPY17:%[0-9]+]]:_(s32) = COPY [[LOAD15]](s32) 11389 ; SI: [[AND15:%[0-9]+]]:_(s32) = G_AND [[COPY17]], [[C3]] 11390 ; SI: [[SHL11:%[0-9]+]]:_(s32) = G_SHL [[AND15]], [[C6]](s32) 11391 ; SI: [[OR11:%[0-9]+]]:_(s32) = G_OR [[OR10]], [[SHL11]] 11392 ; SI: [[PTR_ADD15:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C7]](s32) 11393 ; SI: [[LOAD16:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD15]](p3) :: (load 1 + 16, addrspace 3) 11394 ; SI: [[PTR_ADD16:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD15]], [[C]](s32) 11395 ; SI: [[LOAD17:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD16]](p3) :: (load 1 + 17, addrspace 3) 11396 ; SI: [[PTR_ADD17:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD15]], [[C1]](s32) 11397 ; SI: [[LOAD18:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD17]](p3) :: (load 1 + 18, addrspace 3) 11398 ; SI: [[PTR_ADD18:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD15]], [[C2]](s32) 11399 ; SI: [[LOAD19:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD18]](p3) :: (load 1 + 19, addrspace 3) 11400 ; SI: [[COPY18:%[0-9]+]]:_(s32) = COPY [[LOAD16]](s32) 11401 ; SI: [[AND16:%[0-9]+]]:_(s32) = G_AND [[COPY18]], [[C3]] 11402 ; SI: [[COPY19:%[0-9]+]]:_(s32) = COPY [[LOAD17]](s32) 11403 ; SI: [[AND17:%[0-9]+]]:_(s32) = G_AND [[COPY19]], [[C3]] 11404 ; SI: [[SHL12:%[0-9]+]]:_(s32) = G_SHL [[AND17]], [[C4]](s32) 11405 ; SI: [[OR12:%[0-9]+]]:_(s32) = G_OR [[AND16]], [[SHL12]] 11406 ; SI: [[COPY20:%[0-9]+]]:_(s32) = COPY [[LOAD18]](s32) 11407 ; SI: [[AND18:%[0-9]+]]:_(s32) = G_AND [[COPY20]], [[C3]] 11408 ; SI: [[SHL13:%[0-9]+]]:_(s32) = G_SHL [[AND18]], [[C5]](s32) 11409 ; SI: [[OR13:%[0-9]+]]:_(s32) = G_OR [[OR12]], [[SHL13]] 11410 ; SI: [[COPY21:%[0-9]+]]:_(s32) = COPY [[LOAD19]](s32) 11411 ; SI: [[AND19:%[0-9]+]]:_(s32) = G_AND [[COPY21]], [[C3]] 11412 ; SI: [[SHL14:%[0-9]+]]:_(s32) = G_SHL [[AND19]], [[C6]](s32) 11413 ; SI: [[OR14:%[0-9]+]]:_(s32) = G_OR [[OR13]], [[SHL14]] 11414 ; SI: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR11]](s32), [[OR14]](s32) 11415 ; SI: [[PTR_ADD19:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C4]](s32) 11416 ; SI: [[LOAD20:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD19]](p3) :: (load 1 + 20, addrspace 3) 11417 ; SI: [[PTR_ADD20:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD19]], [[C]](s32) 11418 ; SI: [[LOAD21:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD20]](p3) :: (load 1 + 21, addrspace 3) 11419 ; SI: [[PTR_ADD21:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD19]], [[C1]](s32) 11420 ; SI: [[LOAD22:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD21]](p3) :: (load 1 + 22, addrspace 3) 11421 ; SI: [[PTR_ADD22:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD19]], [[C2]](s32) 11422 ; SI: [[LOAD23:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD22]](p3) :: (load 1 + 23, addrspace 3) 11423 ; SI: [[COPY22:%[0-9]+]]:_(s32) = COPY [[LOAD20]](s32) 11424 ; SI: [[AND20:%[0-9]+]]:_(s32) = G_AND [[COPY22]], [[C3]] 11425 ; SI: [[COPY23:%[0-9]+]]:_(s32) = COPY [[LOAD21]](s32) 11426 ; SI: [[AND21:%[0-9]+]]:_(s32) = G_AND [[COPY23]], [[C3]] 11427 ; SI: [[SHL15:%[0-9]+]]:_(s32) = G_SHL [[AND21]], [[C4]](s32) 11428 ; SI: [[OR15:%[0-9]+]]:_(s32) = G_OR [[AND20]], [[SHL15]] 11429 ; SI: [[COPY24:%[0-9]+]]:_(s32) = COPY [[LOAD22]](s32) 11430 ; SI: [[AND22:%[0-9]+]]:_(s32) = G_AND [[COPY24]], [[C3]] 11431 ; SI: [[SHL16:%[0-9]+]]:_(s32) = G_SHL [[AND22]], [[C5]](s32) 11432 ; SI: [[OR16:%[0-9]+]]:_(s32) = G_OR [[OR15]], [[SHL16]] 11433 ; SI: [[COPY25:%[0-9]+]]:_(s32) = COPY [[LOAD23]](s32) 11434 ; SI: [[AND23:%[0-9]+]]:_(s32) = G_AND [[COPY25]], [[C3]] 11435 ; SI: [[SHL17:%[0-9]+]]:_(s32) = G_SHL [[AND23]], [[C6]](s32) 11436 ; SI: [[OR17:%[0-9]+]]:_(s32) = G_OR [[OR16]], [[SHL17]] 11437 ; SI: [[INSERT2:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[DEF]], [[BUILD_VECTOR1]](<2 x s32>), 0 11438 ; SI: [[INSERT3:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT2]], [[OR17]](s32), 64 11439 ; SI: [[BITCAST1:%[0-9]+]]:_(s96) = G_BITCAST [[INSERT3]](<3 x s32>) 11440 ; SI: [[COPY26:%[0-9]+]]:_(s96) = COPY [[BITCAST]](s96) 11441 ; SI: [[COPY27:%[0-9]+]]:_(s96) = COPY [[BITCAST1]](s96) 11442 ; SI: $vgpr0_vgpr1_vgpr2 = COPY [[COPY26]](s96) 11443 ; SI: $vgpr3_vgpr4_vgpr5 = COPY [[COPY27]](s96) 11444 ; CI-LABEL: name: test_extload_local_v2s96_from_24_align1 11445 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 11446 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 11447 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 11448 ; CI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 11449 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 11450 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 11451 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 11452 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 11453 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 11454 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 11455 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 11456 ; CI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 11457 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 11458 ; CI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 11459 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 11460 ; CI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 11461 ; CI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 11462 ; CI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 11463 ; CI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 11464 ; CI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 11465 ; CI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 11466 ; CI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 11467 ; CI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 11468 ; CI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 11469 ; CI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 11470 ; CI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 11471 ; CI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 11472 ; CI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 11473 ; CI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 11474 ; CI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 11475 ; CI: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C7]](s32) 11476 ; CI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 11477 ; CI: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 11478 ; CI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 11479 ; CI: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 11480 ; CI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 11481 ; CI: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 11482 ; CI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 11483 ; CI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 11484 ; CI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 11485 ; CI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 11486 ; CI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 11487 ; CI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 11488 ; CI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 11489 ; CI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 11490 ; CI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 11491 ; CI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 11492 ; CI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 11493 ; CI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 11494 ; CI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 11495 ; CI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 11496 ; CI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 11497 ; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32) 11498 ; CI: [[PTR_ADD7:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 11499 ; CI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p3) :: (load 1 + 8, addrspace 3) 11500 ; CI: [[PTR_ADD8:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 11501 ; CI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p3) :: (load 1 + 9, addrspace 3) 11502 ; CI: [[PTR_ADD9:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 11503 ; CI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p3) :: (load 1 + 10, addrspace 3) 11504 ; CI: [[PTR_ADD10:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 11505 ; CI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p3) :: (load 1 + 11, addrspace 3) 11506 ; CI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 11507 ; CI: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 11508 ; CI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 11509 ; CI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 11510 ; CI: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 11511 ; CI: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 11512 ; CI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 11513 ; CI: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 11514 ; CI: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 11515 ; CI: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 11516 ; CI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 11517 ; CI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 11518 ; CI: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 11519 ; CI: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 11520 ; CI: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF 11521 ; CI: [[COPY13:%[0-9]+]]:_(<3 x s32>) = COPY [[DEF]](<3 x s32>) 11522 ; CI: [[INSERT:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[COPY13]], [[BUILD_VECTOR]](<2 x s32>), 0 11523 ; CI: [[INSERT1:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT]], [[OR8]](s32), 64 11524 ; CI: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[INSERT1]](<3 x s32>) 11525 ; CI: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 11526 ; CI: [[PTR_ADD11:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C8]](s32) 11527 ; CI: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p3) :: (load 1 + 12, addrspace 3) 11528 ; CI: [[PTR_ADD12:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C]](s32) 11529 ; CI: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p3) :: (load 1 + 13, addrspace 3) 11530 ; CI: [[PTR_ADD13:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C1]](s32) 11531 ; CI: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p3) :: (load 1 + 14, addrspace 3) 11532 ; CI: [[PTR_ADD14:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C2]](s32) 11533 ; CI: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p3) :: (load 1 + 15, addrspace 3) 11534 ; CI: [[COPY14:%[0-9]+]]:_(s32) = COPY [[LOAD12]](s32) 11535 ; CI: [[AND12:%[0-9]+]]:_(s32) = G_AND [[COPY14]], [[C3]] 11536 ; CI: [[COPY15:%[0-9]+]]:_(s32) = COPY [[LOAD13]](s32) 11537 ; CI: [[AND13:%[0-9]+]]:_(s32) = G_AND [[COPY15]], [[C3]] 11538 ; CI: [[SHL9:%[0-9]+]]:_(s32) = G_SHL [[AND13]], [[C4]](s32) 11539 ; CI: [[OR9:%[0-9]+]]:_(s32) = G_OR [[AND12]], [[SHL9]] 11540 ; CI: [[COPY16:%[0-9]+]]:_(s32) = COPY [[LOAD14]](s32) 11541 ; CI: [[AND14:%[0-9]+]]:_(s32) = G_AND [[COPY16]], [[C3]] 11542 ; CI: [[SHL10:%[0-9]+]]:_(s32) = G_SHL [[AND14]], [[C5]](s32) 11543 ; CI: [[OR10:%[0-9]+]]:_(s32) = G_OR [[OR9]], [[SHL10]] 11544 ; CI: [[COPY17:%[0-9]+]]:_(s32) = COPY [[LOAD15]](s32) 11545 ; CI: [[AND15:%[0-9]+]]:_(s32) = G_AND [[COPY17]], [[C3]] 11546 ; CI: [[SHL11:%[0-9]+]]:_(s32) = G_SHL [[AND15]], [[C6]](s32) 11547 ; CI: [[OR11:%[0-9]+]]:_(s32) = G_OR [[OR10]], [[SHL11]] 11548 ; CI: [[PTR_ADD15:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C7]](s32) 11549 ; CI: [[LOAD16:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD15]](p3) :: (load 1 + 16, addrspace 3) 11550 ; CI: [[PTR_ADD16:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD15]], [[C]](s32) 11551 ; CI: [[LOAD17:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD16]](p3) :: (load 1 + 17, addrspace 3) 11552 ; CI: [[PTR_ADD17:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD15]], [[C1]](s32) 11553 ; CI: [[LOAD18:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD17]](p3) :: (load 1 + 18, addrspace 3) 11554 ; CI: [[PTR_ADD18:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD15]], [[C2]](s32) 11555 ; CI: [[LOAD19:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD18]](p3) :: (load 1 + 19, addrspace 3) 11556 ; CI: [[COPY18:%[0-9]+]]:_(s32) = COPY [[LOAD16]](s32) 11557 ; CI: [[AND16:%[0-9]+]]:_(s32) = G_AND [[COPY18]], [[C3]] 11558 ; CI: [[COPY19:%[0-9]+]]:_(s32) = COPY [[LOAD17]](s32) 11559 ; CI: [[AND17:%[0-9]+]]:_(s32) = G_AND [[COPY19]], [[C3]] 11560 ; CI: [[SHL12:%[0-9]+]]:_(s32) = G_SHL [[AND17]], [[C4]](s32) 11561 ; CI: [[OR12:%[0-9]+]]:_(s32) = G_OR [[AND16]], [[SHL12]] 11562 ; CI: [[COPY20:%[0-9]+]]:_(s32) = COPY [[LOAD18]](s32) 11563 ; CI: [[AND18:%[0-9]+]]:_(s32) = G_AND [[COPY20]], [[C3]] 11564 ; CI: [[SHL13:%[0-9]+]]:_(s32) = G_SHL [[AND18]], [[C5]](s32) 11565 ; CI: [[OR13:%[0-9]+]]:_(s32) = G_OR [[OR12]], [[SHL13]] 11566 ; CI: [[COPY21:%[0-9]+]]:_(s32) = COPY [[LOAD19]](s32) 11567 ; CI: [[AND19:%[0-9]+]]:_(s32) = G_AND [[COPY21]], [[C3]] 11568 ; CI: [[SHL14:%[0-9]+]]:_(s32) = G_SHL [[AND19]], [[C6]](s32) 11569 ; CI: [[OR14:%[0-9]+]]:_(s32) = G_OR [[OR13]], [[SHL14]] 11570 ; CI: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR11]](s32), [[OR14]](s32) 11571 ; CI: [[PTR_ADD19:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C4]](s32) 11572 ; CI: [[LOAD20:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD19]](p3) :: (load 1 + 20, addrspace 3) 11573 ; CI: [[PTR_ADD20:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD19]], [[C]](s32) 11574 ; CI: [[LOAD21:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD20]](p3) :: (load 1 + 21, addrspace 3) 11575 ; CI: [[PTR_ADD21:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD19]], [[C1]](s32) 11576 ; CI: [[LOAD22:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD21]](p3) :: (load 1 + 22, addrspace 3) 11577 ; CI: [[PTR_ADD22:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD19]], [[C2]](s32) 11578 ; CI: [[LOAD23:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD22]](p3) :: (load 1 + 23, addrspace 3) 11579 ; CI: [[COPY22:%[0-9]+]]:_(s32) = COPY [[LOAD20]](s32) 11580 ; CI: [[AND20:%[0-9]+]]:_(s32) = G_AND [[COPY22]], [[C3]] 11581 ; CI: [[COPY23:%[0-9]+]]:_(s32) = COPY [[LOAD21]](s32) 11582 ; CI: [[AND21:%[0-9]+]]:_(s32) = G_AND [[COPY23]], [[C3]] 11583 ; CI: [[SHL15:%[0-9]+]]:_(s32) = G_SHL [[AND21]], [[C4]](s32) 11584 ; CI: [[OR15:%[0-9]+]]:_(s32) = G_OR [[AND20]], [[SHL15]] 11585 ; CI: [[COPY24:%[0-9]+]]:_(s32) = COPY [[LOAD22]](s32) 11586 ; CI: [[AND22:%[0-9]+]]:_(s32) = G_AND [[COPY24]], [[C3]] 11587 ; CI: [[SHL16:%[0-9]+]]:_(s32) = G_SHL [[AND22]], [[C5]](s32) 11588 ; CI: [[OR16:%[0-9]+]]:_(s32) = G_OR [[OR15]], [[SHL16]] 11589 ; CI: [[COPY25:%[0-9]+]]:_(s32) = COPY [[LOAD23]](s32) 11590 ; CI: [[AND23:%[0-9]+]]:_(s32) = G_AND [[COPY25]], [[C3]] 11591 ; CI: [[SHL17:%[0-9]+]]:_(s32) = G_SHL [[AND23]], [[C6]](s32) 11592 ; CI: [[OR17:%[0-9]+]]:_(s32) = G_OR [[OR16]], [[SHL17]] 11593 ; CI: [[INSERT2:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[DEF]], [[BUILD_VECTOR1]](<2 x s32>), 0 11594 ; CI: [[INSERT3:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT2]], [[OR17]](s32), 64 11595 ; CI: [[BITCAST1:%[0-9]+]]:_(s96) = G_BITCAST [[INSERT3]](<3 x s32>) 11596 ; CI: [[COPY26:%[0-9]+]]:_(s96) = COPY [[BITCAST]](s96) 11597 ; CI: [[COPY27:%[0-9]+]]:_(s96) = COPY [[BITCAST1]](s96) 11598 ; CI: $vgpr0_vgpr1_vgpr2 = COPY [[COPY26]](s96) 11599 ; CI: $vgpr3_vgpr4_vgpr5 = COPY [[COPY27]](s96) 11600 ; CI-DS128-LABEL: name: test_extload_local_v2s96_from_24_align1 11601 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 11602 ; CI-DS128: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 11603 ; CI-DS128: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 11604 ; CI-DS128: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 11605 ; CI-DS128: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 11606 ; CI-DS128: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 11607 ; CI-DS128: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 11608 ; CI-DS128: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 11609 ; CI-DS128: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 11610 ; CI-DS128: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 11611 ; CI-DS128: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 11612 ; CI-DS128: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 11613 ; CI-DS128: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 11614 ; CI-DS128: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 11615 ; CI-DS128: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 11616 ; CI-DS128: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 11617 ; CI-DS128: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 11618 ; CI-DS128: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 11619 ; CI-DS128: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 11620 ; CI-DS128: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 11621 ; CI-DS128: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 11622 ; CI-DS128: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 11623 ; CI-DS128: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 11624 ; CI-DS128: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 11625 ; CI-DS128: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 11626 ; CI-DS128: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 11627 ; CI-DS128: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 11628 ; CI-DS128: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 11629 ; CI-DS128: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 11630 ; CI-DS128: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 11631 ; CI-DS128: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C7]](s32) 11632 ; CI-DS128: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 11633 ; CI-DS128: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 11634 ; CI-DS128: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 11635 ; CI-DS128: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 11636 ; CI-DS128: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 11637 ; CI-DS128: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 11638 ; CI-DS128: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 11639 ; CI-DS128: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 11640 ; CI-DS128: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 11641 ; CI-DS128: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 11642 ; CI-DS128: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 11643 ; CI-DS128: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 11644 ; CI-DS128: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 11645 ; CI-DS128: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 11646 ; CI-DS128: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 11647 ; CI-DS128: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 11648 ; CI-DS128: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 11649 ; CI-DS128: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 11650 ; CI-DS128: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 11651 ; CI-DS128: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 11652 ; CI-DS128: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 11653 ; CI-DS128: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32) 11654 ; CI-DS128: [[PTR_ADD7:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 11655 ; CI-DS128: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p3) :: (load 1 + 8, addrspace 3) 11656 ; CI-DS128: [[PTR_ADD8:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 11657 ; CI-DS128: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p3) :: (load 1 + 9, addrspace 3) 11658 ; CI-DS128: [[PTR_ADD9:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 11659 ; CI-DS128: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p3) :: (load 1 + 10, addrspace 3) 11660 ; CI-DS128: [[PTR_ADD10:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 11661 ; CI-DS128: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p3) :: (load 1 + 11, addrspace 3) 11662 ; CI-DS128: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 11663 ; CI-DS128: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 11664 ; CI-DS128: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 11665 ; CI-DS128: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 11666 ; CI-DS128: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 11667 ; CI-DS128: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 11668 ; CI-DS128: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 11669 ; CI-DS128: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 11670 ; CI-DS128: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 11671 ; CI-DS128: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 11672 ; CI-DS128: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 11673 ; CI-DS128: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 11674 ; CI-DS128: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 11675 ; CI-DS128: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 11676 ; CI-DS128: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF 11677 ; CI-DS128: [[COPY13:%[0-9]+]]:_(<3 x s32>) = COPY [[DEF]](<3 x s32>) 11678 ; CI-DS128: [[INSERT:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[COPY13]], [[BUILD_VECTOR]](<2 x s32>), 0 11679 ; CI-DS128: [[INSERT1:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT]], [[OR8]](s32), 64 11680 ; CI-DS128: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[INSERT1]](<3 x s32>) 11681 ; CI-DS128: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 11682 ; CI-DS128: [[PTR_ADD11:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C8]](s32) 11683 ; CI-DS128: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p3) :: (load 1 + 12, addrspace 3) 11684 ; CI-DS128: [[PTR_ADD12:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C]](s32) 11685 ; CI-DS128: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p3) :: (load 1 + 13, addrspace 3) 11686 ; CI-DS128: [[PTR_ADD13:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C1]](s32) 11687 ; CI-DS128: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p3) :: (load 1 + 14, addrspace 3) 11688 ; CI-DS128: [[PTR_ADD14:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C2]](s32) 11689 ; CI-DS128: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p3) :: (load 1 + 15, addrspace 3) 11690 ; CI-DS128: [[COPY14:%[0-9]+]]:_(s32) = COPY [[LOAD12]](s32) 11691 ; CI-DS128: [[AND12:%[0-9]+]]:_(s32) = G_AND [[COPY14]], [[C3]] 11692 ; CI-DS128: [[COPY15:%[0-9]+]]:_(s32) = COPY [[LOAD13]](s32) 11693 ; CI-DS128: [[AND13:%[0-9]+]]:_(s32) = G_AND [[COPY15]], [[C3]] 11694 ; CI-DS128: [[SHL9:%[0-9]+]]:_(s32) = G_SHL [[AND13]], [[C4]](s32) 11695 ; CI-DS128: [[OR9:%[0-9]+]]:_(s32) = G_OR [[AND12]], [[SHL9]] 11696 ; CI-DS128: [[COPY16:%[0-9]+]]:_(s32) = COPY [[LOAD14]](s32) 11697 ; CI-DS128: [[AND14:%[0-9]+]]:_(s32) = G_AND [[COPY16]], [[C3]] 11698 ; CI-DS128: [[SHL10:%[0-9]+]]:_(s32) = G_SHL [[AND14]], [[C5]](s32) 11699 ; CI-DS128: [[OR10:%[0-9]+]]:_(s32) = G_OR [[OR9]], [[SHL10]] 11700 ; CI-DS128: [[COPY17:%[0-9]+]]:_(s32) = COPY [[LOAD15]](s32) 11701 ; CI-DS128: [[AND15:%[0-9]+]]:_(s32) = G_AND [[COPY17]], [[C3]] 11702 ; CI-DS128: [[SHL11:%[0-9]+]]:_(s32) = G_SHL [[AND15]], [[C6]](s32) 11703 ; CI-DS128: [[OR11:%[0-9]+]]:_(s32) = G_OR [[OR10]], [[SHL11]] 11704 ; CI-DS128: [[PTR_ADD15:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C7]](s32) 11705 ; CI-DS128: [[LOAD16:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD15]](p3) :: (load 1 + 16, addrspace 3) 11706 ; CI-DS128: [[PTR_ADD16:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD15]], [[C]](s32) 11707 ; CI-DS128: [[LOAD17:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD16]](p3) :: (load 1 + 17, addrspace 3) 11708 ; CI-DS128: [[PTR_ADD17:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD15]], [[C1]](s32) 11709 ; CI-DS128: [[LOAD18:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD17]](p3) :: (load 1 + 18, addrspace 3) 11710 ; CI-DS128: [[PTR_ADD18:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD15]], [[C2]](s32) 11711 ; CI-DS128: [[LOAD19:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD18]](p3) :: (load 1 + 19, addrspace 3) 11712 ; CI-DS128: [[COPY18:%[0-9]+]]:_(s32) = COPY [[LOAD16]](s32) 11713 ; CI-DS128: [[AND16:%[0-9]+]]:_(s32) = G_AND [[COPY18]], [[C3]] 11714 ; CI-DS128: [[COPY19:%[0-9]+]]:_(s32) = COPY [[LOAD17]](s32) 11715 ; CI-DS128: [[AND17:%[0-9]+]]:_(s32) = G_AND [[COPY19]], [[C3]] 11716 ; CI-DS128: [[SHL12:%[0-9]+]]:_(s32) = G_SHL [[AND17]], [[C4]](s32) 11717 ; CI-DS128: [[OR12:%[0-9]+]]:_(s32) = G_OR [[AND16]], [[SHL12]] 11718 ; CI-DS128: [[COPY20:%[0-9]+]]:_(s32) = COPY [[LOAD18]](s32) 11719 ; CI-DS128: [[AND18:%[0-9]+]]:_(s32) = G_AND [[COPY20]], [[C3]] 11720 ; CI-DS128: [[SHL13:%[0-9]+]]:_(s32) = G_SHL [[AND18]], [[C5]](s32) 11721 ; CI-DS128: [[OR13:%[0-9]+]]:_(s32) = G_OR [[OR12]], [[SHL13]] 11722 ; CI-DS128: [[COPY21:%[0-9]+]]:_(s32) = COPY [[LOAD19]](s32) 11723 ; CI-DS128: [[AND19:%[0-9]+]]:_(s32) = G_AND [[COPY21]], [[C3]] 11724 ; CI-DS128: [[SHL14:%[0-9]+]]:_(s32) = G_SHL [[AND19]], [[C6]](s32) 11725 ; CI-DS128: [[OR14:%[0-9]+]]:_(s32) = G_OR [[OR13]], [[SHL14]] 11726 ; CI-DS128: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR11]](s32), [[OR14]](s32) 11727 ; CI-DS128: [[PTR_ADD19:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C4]](s32) 11728 ; CI-DS128: [[LOAD20:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD19]](p3) :: (load 1 + 20, addrspace 3) 11729 ; CI-DS128: [[PTR_ADD20:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD19]], [[C]](s32) 11730 ; CI-DS128: [[LOAD21:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD20]](p3) :: (load 1 + 21, addrspace 3) 11731 ; CI-DS128: [[PTR_ADD21:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD19]], [[C1]](s32) 11732 ; CI-DS128: [[LOAD22:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD21]](p3) :: (load 1 + 22, addrspace 3) 11733 ; CI-DS128: [[PTR_ADD22:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD19]], [[C2]](s32) 11734 ; CI-DS128: [[LOAD23:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD22]](p3) :: (load 1 + 23, addrspace 3) 11735 ; CI-DS128: [[COPY22:%[0-9]+]]:_(s32) = COPY [[LOAD20]](s32) 11736 ; CI-DS128: [[AND20:%[0-9]+]]:_(s32) = G_AND [[COPY22]], [[C3]] 11737 ; CI-DS128: [[COPY23:%[0-9]+]]:_(s32) = COPY [[LOAD21]](s32) 11738 ; CI-DS128: [[AND21:%[0-9]+]]:_(s32) = G_AND [[COPY23]], [[C3]] 11739 ; CI-DS128: [[SHL15:%[0-9]+]]:_(s32) = G_SHL [[AND21]], [[C4]](s32) 11740 ; CI-DS128: [[OR15:%[0-9]+]]:_(s32) = G_OR [[AND20]], [[SHL15]] 11741 ; CI-DS128: [[COPY24:%[0-9]+]]:_(s32) = COPY [[LOAD22]](s32) 11742 ; CI-DS128: [[AND22:%[0-9]+]]:_(s32) = G_AND [[COPY24]], [[C3]] 11743 ; CI-DS128: [[SHL16:%[0-9]+]]:_(s32) = G_SHL [[AND22]], [[C5]](s32) 11744 ; CI-DS128: [[OR16:%[0-9]+]]:_(s32) = G_OR [[OR15]], [[SHL16]] 11745 ; CI-DS128: [[COPY25:%[0-9]+]]:_(s32) = COPY [[LOAD23]](s32) 11746 ; CI-DS128: [[AND23:%[0-9]+]]:_(s32) = G_AND [[COPY25]], [[C3]] 11747 ; CI-DS128: [[SHL17:%[0-9]+]]:_(s32) = G_SHL [[AND23]], [[C6]](s32) 11748 ; CI-DS128: [[OR17:%[0-9]+]]:_(s32) = G_OR [[OR16]], [[SHL17]] 11749 ; CI-DS128: [[INSERT2:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[DEF]], [[BUILD_VECTOR1]](<2 x s32>), 0 11750 ; CI-DS128: [[INSERT3:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT2]], [[OR17]](s32), 64 11751 ; CI-DS128: [[BITCAST1:%[0-9]+]]:_(s96) = G_BITCAST [[INSERT3]](<3 x s32>) 11752 ; CI-DS128: [[COPY26:%[0-9]+]]:_(s96) = COPY [[BITCAST]](s96) 11753 ; CI-DS128: [[COPY27:%[0-9]+]]:_(s96) = COPY [[BITCAST1]](s96) 11754 ; CI-DS128: $vgpr0_vgpr1_vgpr2 = COPY [[COPY26]](s96) 11755 ; CI-DS128: $vgpr3_vgpr4_vgpr5 = COPY [[COPY27]](s96) 11756 ; VI-LABEL: name: test_extload_local_v2s96_from_24_align1 11757 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 11758 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 11759 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 11760 ; VI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 11761 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 11762 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 11763 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 11764 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 11765 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 11766 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 11767 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 11768 ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 11769 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 11770 ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 11771 ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 11772 ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 11773 ; VI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 11774 ; VI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 11775 ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 11776 ; VI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 11777 ; VI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 11778 ; VI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 11779 ; VI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 11780 ; VI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 11781 ; VI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 11782 ; VI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 11783 ; VI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 11784 ; VI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 11785 ; VI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 11786 ; VI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 11787 ; VI: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C7]](s32) 11788 ; VI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 11789 ; VI: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 11790 ; VI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 11791 ; VI: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 11792 ; VI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 11793 ; VI: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 11794 ; VI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 11795 ; VI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 11796 ; VI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 11797 ; VI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 11798 ; VI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 11799 ; VI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 11800 ; VI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 11801 ; VI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 11802 ; VI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 11803 ; VI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 11804 ; VI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 11805 ; VI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 11806 ; VI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 11807 ; VI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 11808 ; VI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 11809 ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32) 11810 ; VI: [[PTR_ADD7:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 11811 ; VI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p3) :: (load 1 + 8, addrspace 3) 11812 ; VI: [[PTR_ADD8:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 11813 ; VI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p3) :: (load 1 + 9, addrspace 3) 11814 ; VI: [[PTR_ADD9:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 11815 ; VI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p3) :: (load 1 + 10, addrspace 3) 11816 ; VI: [[PTR_ADD10:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 11817 ; VI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p3) :: (load 1 + 11, addrspace 3) 11818 ; VI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 11819 ; VI: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 11820 ; VI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 11821 ; VI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 11822 ; VI: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 11823 ; VI: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 11824 ; VI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 11825 ; VI: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 11826 ; VI: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 11827 ; VI: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 11828 ; VI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 11829 ; VI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 11830 ; VI: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 11831 ; VI: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 11832 ; VI: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF 11833 ; VI: [[COPY13:%[0-9]+]]:_(<3 x s32>) = COPY [[DEF]](<3 x s32>) 11834 ; VI: [[INSERT:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[COPY13]], [[BUILD_VECTOR]](<2 x s32>), 0 11835 ; VI: [[INSERT1:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT]], [[OR8]](s32), 64 11836 ; VI: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[INSERT1]](<3 x s32>) 11837 ; VI: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 11838 ; VI: [[PTR_ADD11:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C8]](s32) 11839 ; VI: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p3) :: (load 1 + 12, addrspace 3) 11840 ; VI: [[PTR_ADD12:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C]](s32) 11841 ; VI: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p3) :: (load 1 + 13, addrspace 3) 11842 ; VI: [[PTR_ADD13:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C1]](s32) 11843 ; VI: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p3) :: (load 1 + 14, addrspace 3) 11844 ; VI: [[PTR_ADD14:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C2]](s32) 11845 ; VI: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p3) :: (load 1 + 15, addrspace 3) 11846 ; VI: [[COPY14:%[0-9]+]]:_(s32) = COPY [[LOAD12]](s32) 11847 ; VI: [[AND12:%[0-9]+]]:_(s32) = G_AND [[COPY14]], [[C3]] 11848 ; VI: [[COPY15:%[0-9]+]]:_(s32) = COPY [[LOAD13]](s32) 11849 ; VI: [[AND13:%[0-9]+]]:_(s32) = G_AND [[COPY15]], [[C3]] 11850 ; VI: [[SHL9:%[0-9]+]]:_(s32) = G_SHL [[AND13]], [[C4]](s32) 11851 ; VI: [[OR9:%[0-9]+]]:_(s32) = G_OR [[AND12]], [[SHL9]] 11852 ; VI: [[COPY16:%[0-9]+]]:_(s32) = COPY [[LOAD14]](s32) 11853 ; VI: [[AND14:%[0-9]+]]:_(s32) = G_AND [[COPY16]], [[C3]] 11854 ; VI: [[SHL10:%[0-9]+]]:_(s32) = G_SHL [[AND14]], [[C5]](s32) 11855 ; VI: [[OR10:%[0-9]+]]:_(s32) = G_OR [[OR9]], [[SHL10]] 11856 ; VI: [[COPY17:%[0-9]+]]:_(s32) = COPY [[LOAD15]](s32) 11857 ; VI: [[AND15:%[0-9]+]]:_(s32) = G_AND [[COPY17]], [[C3]] 11858 ; VI: [[SHL11:%[0-9]+]]:_(s32) = G_SHL [[AND15]], [[C6]](s32) 11859 ; VI: [[OR11:%[0-9]+]]:_(s32) = G_OR [[OR10]], [[SHL11]] 11860 ; VI: [[PTR_ADD15:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C7]](s32) 11861 ; VI: [[LOAD16:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD15]](p3) :: (load 1 + 16, addrspace 3) 11862 ; VI: [[PTR_ADD16:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD15]], [[C]](s32) 11863 ; VI: [[LOAD17:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD16]](p3) :: (load 1 + 17, addrspace 3) 11864 ; VI: [[PTR_ADD17:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD15]], [[C1]](s32) 11865 ; VI: [[LOAD18:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD17]](p3) :: (load 1 + 18, addrspace 3) 11866 ; VI: [[PTR_ADD18:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD15]], [[C2]](s32) 11867 ; VI: [[LOAD19:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD18]](p3) :: (load 1 + 19, addrspace 3) 11868 ; VI: [[COPY18:%[0-9]+]]:_(s32) = COPY [[LOAD16]](s32) 11869 ; VI: [[AND16:%[0-9]+]]:_(s32) = G_AND [[COPY18]], [[C3]] 11870 ; VI: [[COPY19:%[0-9]+]]:_(s32) = COPY [[LOAD17]](s32) 11871 ; VI: [[AND17:%[0-9]+]]:_(s32) = G_AND [[COPY19]], [[C3]] 11872 ; VI: [[SHL12:%[0-9]+]]:_(s32) = G_SHL [[AND17]], [[C4]](s32) 11873 ; VI: [[OR12:%[0-9]+]]:_(s32) = G_OR [[AND16]], [[SHL12]] 11874 ; VI: [[COPY20:%[0-9]+]]:_(s32) = COPY [[LOAD18]](s32) 11875 ; VI: [[AND18:%[0-9]+]]:_(s32) = G_AND [[COPY20]], [[C3]] 11876 ; VI: [[SHL13:%[0-9]+]]:_(s32) = G_SHL [[AND18]], [[C5]](s32) 11877 ; VI: [[OR13:%[0-9]+]]:_(s32) = G_OR [[OR12]], [[SHL13]] 11878 ; VI: [[COPY21:%[0-9]+]]:_(s32) = COPY [[LOAD19]](s32) 11879 ; VI: [[AND19:%[0-9]+]]:_(s32) = G_AND [[COPY21]], [[C3]] 11880 ; VI: [[SHL14:%[0-9]+]]:_(s32) = G_SHL [[AND19]], [[C6]](s32) 11881 ; VI: [[OR14:%[0-9]+]]:_(s32) = G_OR [[OR13]], [[SHL14]] 11882 ; VI: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR11]](s32), [[OR14]](s32) 11883 ; VI: [[PTR_ADD19:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C4]](s32) 11884 ; VI: [[LOAD20:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD19]](p3) :: (load 1 + 20, addrspace 3) 11885 ; VI: [[PTR_ADD20:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD19]], [[C]](s32) 11886 ; VI: [[LOAD21:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD20]](p3) :: (load 1 + 21, addrspace 3) 11887 ; VI: [[PTR_ADD21:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD19]], [[C1]](s32) 11888 ; VI: [[LOAD22:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD21]](p3) :: (load 1 + 22, addrspace 3) 11889 ; VI: [[PTR_ADD22:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD19]], [[C2]](s32) 11890 ; VI: [[LOAD23:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD22]](p3) :: (load 1 + 23, addrspace 3) 11891 ; VI: [[COPY22:%[0-9]+]]:_(s32) = COPY [[LOAD20]](s32) 11892 ; VI: [[AND20:%[0-9]+]]:_(s32) = G_AND [[COPY22]], [[C3]] 11893 ; VI: [[COPY23:%[0-9]+]]:_(s32) = COPY [[LOAD21]](s32) 11894 ; VI: [[AND21:%[0-9]+]]:_(s32) = G_AND [[COPY23]], [[C3]] 11895 ; VI: [[SHL15:%[0-9]+]]:_(s32) = G_SHL [[AND21]], [[C4]](s32) 11896 ; VI: [[OR15:%[0-9]+]]:_(s32) = G_OR [[AND20]], [[SHL15]] 11897 ; VI: [[COPY24:%[0-9]+]]:_(s32) = COPY [[LOAD22]](s32) 11898 ; VI: [[AND22:%[0-9]+]]:_(s32) = G_AND [[COPY24]], [[C3]] 11899 ; VI: [[SHL16:%[0-9]+]]:_(s32) = G_SHL [[AND22]], [[C5]](s32) 11900 ; VI: [[OR16:%[0-9]+]]:_(s32) = G_OR [[OR15]], [[SHL16]] 11901 ; VI: [[COPY25:%[0-9]+]]:_(s32) = COPY [[LOAD23]](s32) 11902 ; VI: [[AND23:%[0-9]+]]:_(s32) = G_AND [[COPY25]], [[C3]] 11903 ; VI: [[SHL17:%[0-9]+]]:_(s32) = G_SHL [[AND23]], [[C6]](s32) 11904 ; VI: [[OR17:%[0-9]+]]:_(s32) = G_OR [[OR16]], [[SHL17]] 11905 ; VI: [[INSERT2:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[DEF]], [[BUILD_VECTOR1]](<2 x s32>), 0 11906 ; VI: [[INSERT3:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT2]], [[OR17]](s32), 64 11907 ; VI: [[BITCAST1:%[0-9]+]]:_(s96) = G_BITCAST [[INSERT3]](<3 x s32>) 11908 ; VI: [[COPY26:%[0-9]+]]:_(s96) = COPY [[BITCAST]](s96) 11909 ; VI: [[COPY27:%[0-9]+]]:_(s96) = COPY [[BITCAST1]](s96) 11910 ; VI: $vgpr0_vgpr1_vgpr2 = COPY [[COPY26]](s96) 11911 ; VI: $vgpr3_vgpr4_vgpr5 = COPY [[COPY27]](s96) 11912 ; GFX9-LABEL: name: test_extload_local_v2s96_from_24_align1 11913 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 11914 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 1, addrspace 3) 11915 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 11916 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 11917 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 1 + 1, addrspace 3) 11918 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 11919 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 11920 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 1 + 2, addrspace 3) 11921 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 11922 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C2]](s32) 11923 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 1 + 3, addrspace 3) 11924 ; GFX9: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 11925 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 11926 ; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 11927 ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 11928 ; GFX9: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 11929 ; GFX9: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 11930 ; GFX9: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 11931 ; GFX9: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 11932 ; GFX9: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 11933 ; GFX9: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 11934 ; GFX9: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 11935 ; GFX9: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 11936 ; GFX9: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 11937 ; GFX9: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 11938 ; GFX9: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 11939 ; GFX9: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 11940 ; GFX9: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 11941 ; GFX9: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 11942 ; GFX9: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 11943 ; GFX9: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C7]](s32) 11944 ; GFX9: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 1 + 4, addrspace 3) 11945 ; GFX9: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 11946 ; GFX9: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 1 + 5, addrspace 3) 11947 ; GFX9: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 11948 ; GFX9: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 1 + 6, addrspace 3) 11949 ; GFX9: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 11950 ; GFX9: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 1 + 7, addrspace 3) 11951 ; GFX9: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 11952 ; GFX9: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 11953 ; GFX9: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 11954 ; GFX9: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 11955 ; GFX9: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 11956 ; GFX9: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 11957 ; GFX9: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 11958 ; GFX9: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 11959 ; GFX9: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 11960 ; GFX9: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 11961 ; GFX9: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 11962 ; GFX9: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 11963 ; GFX9: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 11964 ; GFX9: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 11965 ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32) 11966 ; GFX9: [[PTR_ADD7:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 11967 ; GFX9: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p3) :: (load 1 + 8, addrspace 3) 11968 ; GFX9: [[PTR_ADD8:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 11969 ; GFX9: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p3) :: (load 1 + 9, addrspace 3) 11970 ; GFX9: [[PTR_ADD9:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 11971 ; GFX9: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p3) :: (load 1 + 10, addrspace 3) 11972 ; GFX9: [[PTR_ADD10:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 11973 ; GFX9: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p3) :: (load 1 + 11, addrspace 3) 11974 ; GFX9: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 11975 ; GFX9: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 11976 ; GFX9: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 11977 ; GFX9: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 11978 ; GFX9: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 11979 ; GFX9: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 11980 ; GFX9: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 11981 ; GFX9: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 11982 ; GFX9: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 11983 ; GFX9: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 11984 ; GFX9: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 11985 ; GFX9: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 11986 ; GFX9: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 11987 ; GFX9: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 11988 ; GFX9: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF 11989 ; GFX9: [[COPY13:%[0-9]+]]:_(<3 x s32>) = COPY [[DEF]](<3 x s32>) 11990 ; GFX9: [[INSERT:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[COPY13]], [[BUILD_VECTOR]](<2 x s32>), 0 11991 ; GFX9: [[INSERT1:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT]], [[OR8]](s32), 64 11992 ; GFX9: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[INSERT1]](<3 x s32>) 11993 ; GFX9: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 11994 ; GFX9: [[PTR_ADD11:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C8]](s32) 11995 ; GFX9: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p3) :: (load 1 + 12, addrspace 3) 11996 ; GFX9: [[PTR_ADD12:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C]](s32) 11997 ; GFX9: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p3) :: (load 1 + 13, addrspace 3) 11998 ; GFX9: [[PTR_ADD13:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C1]](s32) 11999 ; GFX9: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p3) :: (load 1 + 14, addrspace 3) 12000 ; GFX9: [[PTR_ADD14:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C2]](s32) 12001 ; GFX9: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p3) :: (load 1 + 15, addrspace 3) 12002 ; GFX9: [[COPY14:%[0-9]+]]:_(s32) = COPY [[LOAD12]](s32) 12003 ; GFX9: [[AND12:%[0-9]+]]:_(s32) = G_AND [[COPY14]], [[C3]] 12004 ; GFX9: [[COPY15:%[0-9]+]]:_(s32) = COPY [[LOAD13]](s32) 12005 ; GFX9: [[AND13:%[0-9]+]]:_(s32) = G_AND [[COPY15]], [[C3]] 12006 ; GFX9: [[SHL9:%[0-9]+]]:_(s32) = G_SHL [[AND13]], [[C4]](s32) 12007 ; GFX9: [[OR9:%[0-9]+]]:_(s32) = G_OR [[AND12]], [[SHL9]] 12008 ; GFX9: [[COPY16:%[0-9]+]]:_(s32) = COPY [[LOAD14]](s32) 12009 ; GFX9: [[AND14:%[0-9]+]]:_(s32) = G_AND [[COPY16]], [[C3]] 12010 ; GFX9: [[SHL10:%[0-9]+]]:_(s32) = G_SHL [[AND14]], [[C5]](s32) 12011 ; GFX9: [[OR10:%[0-9]+]]:_(s32) = G_OR [[OR9]], [[SHL10]] 12012 ; GFX9: [[COPY17:%[0-9]+]]:_(s32) = COPY [[LOAD15]](s32) 12013 ; GFX9: [[AND15:%[0-9]+]]:_(s32) = G_AND [[COPY17]], [[C3]] 12014 ; GFX9: [[SHL11:%[0-9]+]]:_(s32) = G_SHL [[AND15]], [[C6]](s32) 12015 ; GFX9: [[OR11:%[0-9]+]]:_(s32) = G_OR [[OR10]], [[SHL11]] 12016 ; GFX9: [[PTR_ADD15:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C7]](s32) 12017 ; GFX9: [[LOAD16:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD15]](p3) :: (load 1 + 16, addrspace 3) 12018 ; GFX9: [[PTR_ADD16:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD15]], [[C]](s32) 12019 ; GFX9: [[LOAD17:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD16]](p3) :: (load 1 + 17, addrspace 3) 12020 ; GFX9: [[PTR_ADD17:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD15]], [[C1]](s32) 12021 ; GFX9: [[LOAD18:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD17]](p3) :: (load 1 + 18, addrspace 3) 12022 ; GFX9: [[PTR_ADD18:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD15]], [[C2]](s32) 12023 ; GFX9: [[LOAD19:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD18]](p3) :: (load 1 + 19, addrspace 3) 12024 ; GFX9: [[COPY18:%[0-9]+]]:_(s32) = COPY [[LOAD16]](s32) 12025 ; GFX9: [[AND16:%[0-9]+]]:_(s32) = G_AND [[COPY18]], [[C3]] 12026 ; GFX9: [[COPY19:%[0-9]+]]:_(s32) = COPY [[LOAD17]](s32) 12027 ; GFX9: [[AND17:%[0-9]+]]:_(s32) = G_AND [[COPY19]], [[C3]] 12028 ; GFX9: [[SHL12:%[0-9]+]]:_(s32) = G_SHL [[AND17]], [[C4]](s32) 12029 ; GFX9: [[OR12:%[0-9]+]]:_(s32) = G_OR [[AND16]], [[SHL12]] 12030 ; GFX9: [[COPY20:%[0-9]+]]:_(s32) = COPY [[LOAD18]](s32) 12031 ; GFX9: [[AND18:%[0-9]+]]:_(s32) = G_AND [[COPY20]], [[C3]] 12032 ; GFX9: [[SHL13:%[0-9]+]]:_(s32) = G_SHL [[AND18]], [[C5]](s32) 12033 ; GFX9: [[OR13:%[0-9]+]]:_(s32) = G_OR [[OR12]], [[SHL13]] 12034 ; GFX9: [[COPY21:%[0-9]+]]:_(s32) = COPY [[LOAD19]](s32) 12035 ; GFX9: [[AND19:%[0-9]+]]:_(s32) = G_AND [[COPY21]], [[C3]] 12036 ; GFX9: [[SHL14:%[0-9]+]]:_(s32) = G_SHL [[AND19]], [[C6]](s32) 12037 ; GFX9: [[OR14:%[0-9]+]]:_(s32) = G_OR [[OR13]], [[SHL14]] 12038 ; GFX9: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR11]](s32), [[OR14]](s32) 12039 ; GFX9: [[PTR_ADD19:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD11]], [[C4]](s32) 12040 ; GFX9: [[LOAD20:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD19]](p3) :: (load 1 + 20, addrspace 3) 12041 ; GFX9: [[PTR_ADD20:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD19]], [[C]](s32) 12042 ; GFX9: [[LOAD21:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD20]](p3) :: (load 1 + 21, addrspace 3) 12043 ; GFX9: [[PTR_ADD21:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD19]], [[C1]](s32) 12044 ; GFX9: [[LOAD22:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD21]](p3) :: (load 1 + 22, addrspace 3) 12045 ; GFX9: [[PTR_ADD22:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD19]], [[C2]](s32) 12046 ; GFX9: [[LOAD23:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD22]](p3) :: (load 1 + 23, addrspace 3) 12047 ; GFX9: [[COPY22:%[0-9]+]]:_(s32) = COPY [[LOAD20]](s32) 12048 ; GFX9: [[AND20:%[0-9]+]]:_(s32) = G_AND [[COPY22]], [[C3]] 12049 ; GFX9: [[COPY23:%[0-9]+]]:_(s32) = COPY [[LOAD21]](s32) 12050 ; GFX9: [[AND21:%[0-9]+]]:_(s32) = G_AND [[COPY23]], [[C3]] 12051 ; GFX9: [[SHL15:%[0-9]+]]:_(s32) = G_SHL [[AND21]], [[C4]](s32) 12052 ; GFX9: [[OR15:%[0-9]+]]:_(s32) = G_OR [[AND20]], [[SHL15]] 12053 ; GFX9: [[COPY24:%[0-9]+]]:_(s32) = COPY [[LOAD22]](s32) 12054 ; GFX9: [[AND22:%[0-9]+]]:_(s32) = G_AND [[COPY24]], [[C3]] 12055 ; GFX9: [[SHL16:%[0-9]+]]:_(s32) = G_SHL [[AND22]], [[C5]](s32) 12056 ; GFX9: [[OR16:%[0-9]+]]:_(s32) = G_OR [[OR15]], [[SHL16]] 12057 ; GFX9: [[COPY25:%[0-9]+]]:_(s32) = COPY [[LOAD23]](s32) 12058 ; GFX9: [[AND23:%[0-9]+]]:_(s32) = G_AND [[COPY25]], [[C3]] 12059 ; GFX9: [[SHL17:%[0-9]+]]:_(s32) = G_SHL [[AND23]], [[C6]](s32) 12060 ; GFX9: [[OR17:%[0-9]+]]:_(s32) = G_OR [[OR16]], [[SHL17]] 12061 ; GFX9: [[INSERT2:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[DEF]], [[BUILD_VECTOR1]](<2 x s32>), 0 12062 ; GFX9: [[INSERT3:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT2]], [[OR17]](s32), 64 12063 ; GFX9: [[BITCAST1:%[0-9]+]]:_(s96) = G_BITCAST [[INSERT3]](<3 x s32>) 12064 ; GFX9: [[COPY26:%[0-9]+]]:_(s96) = COPY [[BITCAST]](s96) 12065 ; GFX9: [[COPY27:%[0-9]+]]:_(s96) = COPY [[BITCAST1]](s96) 12066 ; GFX9: $vgpr0_vgpr1_vgpr2 = COPY [[COPY26]](s96) 12067 ; GFX9: $vgpr3_vgpr4_vgpr5 = COPY [[COPY27]](s96) 12068 ; GFX9-UNALIGNED-LABEL: name: test_extload_local_v2s96_from_24_align1 12069 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 12070 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(<3 x s32>) = G_LOAD [[COPY]](p3) :: (load 12, align 1, addrspace 3) 12071 ; GFX9-UNALIGNED: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[LOAD]](<3 x s32>) 12072 ; GFX9-UNALIGNED: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 12073 ; GFX9-UNALIGNED: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 12074 ; GFX9-UNALIGNED: [[LOAD1:%[0-9]+]]:_(<3 x s32>) = G_LOAD [[PTR_ADD]](p3) :: (load 12 + 12, align 1, addrspace 3) 12075 ; GFX9-UNALIGNED: [[BITCAST1:%[0-9]+]]:_(s96) = G_BITCAST [[LOAD1]](<3 x s32>) 12076 ; GFX9-UNALIGNED: [[COPY1:%[0-9]+]]:_(s96) = COPY [[BITCAST]](s96) 12077 ; GFX9-UNALIGNED: [[COPY2:%[0-9]+]]:_(s96) = COPY [[BITCAST1]](s96) 12078 ; GFX9-UNALIGNED: $vgpr0_vgpr1_vgpr2 = COPY [[COPY1]](s96) 12079 ; GFX9-UNALIGNED: $vgpr3_vgpr4_vgpr5 = COPY [[COPY2]](s96) 12080 %0:_(p3) = COPY $vgpr0 12081 %1:_(<2 x s96>) = G_LOAD %0 :: (load 24, align 1, addrspace 3) 12082 %2:_(s96) = G_EXTRACT %1, 0 12083 %3:_(s96) = G_EXTRACT %1, 96 12084 $vgpr0_vgpr1_vgpr2 = COPY %2 12085 $vgpr3_vgpr4_vgpr5 = COPY %3 12086... 12087 12088--- 12089name: test_extload_local_v2s96_from_24_align2 12090body: | 12091 bb.0: 12092 liveins: $vgpr0 12093 12094 ; SI-LABEL: name: test_extload_local_v2s96_from_24_align2 12095 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 12096 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 12097 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 12098 ; SI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 12099 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 12100 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 12101 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 12102 ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 12103 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 12104 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 12105 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 12106 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 12107 ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 12108 ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 12109 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C3]](s32) 12110 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 2 + 4, addrspace 3) 12111 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 12112 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 2 + 6, addrspace 3) 12113 ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 12114 ; SI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C1]] 12115 ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 12116 ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C1]] 12117 ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C2]](s32) 12118 ; SI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 12119 ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR]](s32), [[OR1]](s32) 12120 ; SI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 12121 ; SI: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 12122 ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 2 + 8, addrspace 3) 12123 ; SI: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 12124 ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 2 + 10, addrspace 3) 12125 ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 12126 ; SI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C1]] 12127 ; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 12128 ; SI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C1]] 12129 ; SI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C2]](s32) 12130 ; SI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL2]] 12131 ; SI: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF 12132 ; SI: [[COPY7:%[0-9]+]]:_(<3 x s32>) = COPY [[DEF]](<3 x s32>) 12133 ; SI: [[INSERT:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[COPY7]], [[BUILD_VECTOR]](<2 x s32>), 0 12134 ; SI: [[INSERT1:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT]], [[OR2]](s32), 64 12135 ; SI: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[INSERT1]](<3 x s32>) 12136 ; SI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 12137 ; SI: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C5]](s32) 12138 ; SI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 2 + 12, addrspace 3) 12139 ; SI: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD5]], [[C]](s32) 12140 ; SI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 2 + 14, addrspace 3) 12141 ; SI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 12142 ; SI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C1]] 12143 ; SI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 12144 ; SI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C1]] 12145 ; SI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C2]](s32) 12146 ; SI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND6]], [[SHL3]] 12147 ; SI: [[PTR_ADD7:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD5]], [[C3]](s32) 12148 ; SI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p3) :: (load 2 + 16, addrspace 3) 12149 ; SI: [[PTR_ADD8:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 12150 ; SI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p3) :: (load 2 + 18, addrspace 3) 12151 ; SI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 12152 ; SI: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C1]] 12153 ; SI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 12154 ; SI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C1]] 12155 ; SI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C2]](s32) 12156 ; SI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL4]] 12157 ; SI: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR3]](s32), [[OR4]](s32) 12158 ; SI: [[PTR_ADD9:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD5]], [[C4]](s32) 12159 ; SI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p3) :: (load 2 + 20, addrspace 3) 12160 ; SI: [[PTR_ADD10:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD9]], [[C]](s32) 12161 ; SI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p3) :: (load 2 + 22, addrspace 3) 12162 ; SI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 12163 ; SI: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C1]] 12164 ; SI: [[COPY13:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 12165 ; SI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY13]], [[C1]] 12166 ; SI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C2]](s32) 12167 ; SI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[AND10]], [[SHL5]] 12168 ; SI: [[INSERT2:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[DEF]], [[BUILD_VECTOR1]](<2 x s32>), 0 12169 ; SI: [[INSERT3:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT2]], [[OR5]](s32), 64 12170 ; SI: [[BITCAST1:%[0-9]+]]:_(s96) = G_BITCAST [[INSERT3]](<3 x s32>) 12171 ; SI: [[COPY14:%[0-9]+]]:_(s96) = COPY [[BITCAST]](s96) 12172 ; SI: [[COPY15:%[0-9]+]]:_(s96) = COPY [[BITCAST1]](s96) 12173 ; SI: $vgpr0_vgpr1_vgpr2 = COPY [[COPY14]](s96) 12174 ; SI: $vgpr3_vgpr4_vgpr5 = COPY [[COPY15]](s96) 12175 ; CI-LABEL: name: test_extload_local_v2s96_from_24_align2 12176 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 12177 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 12178 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 12179 ; CI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 12180 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 12181 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 12182 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 12183 ; CI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 12184 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 12185 ; CI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 12186 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 12187 ; CI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 12188 ; CI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 12189 ; CI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 12190 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C3]](s32) 12191 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 2 + 4, addrspace 3) 12192 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 12193 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 2 + 6, addrspace 3) 12194 ; CI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 12195 ; CI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C1]] 12196 ; CI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 12197 ; CI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C1]] 12198 ; CI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C2]](s32) 12199 ; CI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 12200 ; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR]](s32), [[OR1]](s32) 12201 ; CI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 12202 ; CI: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 12203 ; CI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 2 + 8, addrspace 3) 12204 ; CI: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 12205 ; CI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 2 + 10, addrspace 3) 12206 ; CI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 12207 ; CI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C1]] 12208 ; CI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 12209 ; CI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C1]] 12210 ; CI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C2]](s32) 12211 ; CI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL2]] 12212 ; CI: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF 12213 ; CI: [[COPY7:%[0-9]+]]:_(<3 x s32>) = COPY [[DEF]](<3 x s32>) 12214 ; CI: [[INSERT:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[COPY7]], [[BUILD_VECTOR]](<2 x s32>), 0 12215 ; CI: [[INSERT1:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT]], [[OR2]](s32), 64 12216 ; CI: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[INSERT1]](<3 x s32>) 12217 ; CI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 12218 ; CI: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C5]](s32) 12219 ; CI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 2 + 12, addrspace 3) 12220 ; CI: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD5]], [[C]](s32) 12221 ; CI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 2 + 14, addrspace 3) 12222 ; CI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 12223 ; CI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C1]] 12224 ; CI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 12225 ; CI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C1]] 12226 ; CI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C2]](s32) 12227 ; CI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND6]], [[SHL3]] 12228 ; CI: [[PTR_ADD7:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD5]], [[C3]](s32) 12229 ; CI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p3) :: (load 2 + 16, addrspace 3) 12230 ; CI: [[PTR_ADD8:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 12231 ; CI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p3) :: (load 2 + 18, addrspace 3) 12232 ; CI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 12233 ; CI: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C1]] 12234 ; CI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 12235 ; CI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C1]] 12236 ; CI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C2]](s32) 12237 ; CI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL4]] 12238 ; CI: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR3]](s32), [[OR4]](s32) 12239 ; CI: [[PTR_ADD9:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD5]], [[C4]](s32) 12240 ; CI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p3) :: (load 2 + 20, addrspace 3) 12241 ; CI: [[PTR_ADD10:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD9]], [[C]](s32) 12242 ; CI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p3) :: (load 2 + 22, addrspace 3) 12243 ; CI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 12244 ; CI: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C1]] 12245 ; CI: [[COPY13:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 12246 ; CI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY13]], [[C1]] 12247 ; CI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C2]](s32) 12248 ; CI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[AND10]], [[SHL5]] 12249 ; CI: [[INSERT2:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[DEF]], [[BUILD_VECTOR1]](<2 x s32>), 0 12250 ; CI: [[INSERT3:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT2]], [[OR5]](s32), 64 12251 ; CI: [[BITCAST1:%[0-9]+]]:_(s96) = G_BITCAST [[INSERT3]](<3 x s32>) 12252 ; CI: [[COPY14:%[0-9]+]]:_(s96) = COPY [[BITCAST]](s96) 12253 ; CI: [[COPY15:%[0-9]+]]:_(s96) = COPY [[BITCAST1]](s96) 12254 ; CI: $vgpr0_vgpr1_vgpr2 = COPY [[COPY14]](s96) 12255 ; CI: $vgpr3_vgpr4_vgpr5 = COPY [[COPY15]](s96) 12256 ; CI-DS128-LABEL: name: test_extload_local_v2s96_from_24_align2 12257 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 12258 ; CI-DS128: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 12259 ; CI-DS128: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 12260 ; CI-DS128: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 12261 ; CI-DS128: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 12262 ; CI-DS128: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 12263 ; CI-DS128: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 12264 ; CI-DS128: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 12265 ; CI-DS128: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 12266 ; CI-DS128: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 12267 ; CI-DS128: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 12268 ; CI-DS128: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 12269 ; CI-DS128: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 12270 ; CI-DS128: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 12271 ; CI-DS128: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C3]](s32) 12272 ; CI-DS128: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 2 + 4, addrspace 3) 12273 ; CI-DS128: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 12274 ; CI-DS128: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 2 + 6, addrspace 3) 12275 ; CI-DS128: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 12276 ; CI-DS128: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C1]] 12277 ; CI-DS128: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 12278 ; CI-DS128: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C1]] 12279 ; CI-DS128: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C2]](s32) 12280 ; CI-DS128: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 12281 ; CI-DS128: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR]](s32), [[OR1]](s32) 12282 ; CI-DS128: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 12283 ; CI-DS128: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 12284 ; CI-DS128: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 2 + 8, addrspace 3) 12285 ; CI-DS128: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 12286 ; CI-DS128: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 2 + 10, addrspace 3) 12287 ; CI-DS128: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 12288 ; CI-DS128: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C1]] 12289 ; CI-DS128: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 12290 ; CI-DS128: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C1]] 12291 ; CI-DS128: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C2]](s32) 12292 ; CI-DS128: [[OR2:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL2]] 12293 ; CI-DS128: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF 12294 ; CI-DS128: [[COPY7:%[0-9]+]]:_(<3 x s32>) = COPY [[DEF]](<3 x s32>) 12295 ; CI-DS128: [[INSERT:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[COPY7]], [[BUILD_VECTOR]](<2 x s32>), 0 12296 ; CI-DS128: [[INSERT1:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT]], [[OR2]](s32), 64 12297 ; CI-DS128: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[INSERT1]](<3 x s32>) 12298 ; CI-DS128: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 12299 ; CI-DS128: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C5]](s32) 12300 ; CI-DS128: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 2 + 12, addrspace 3) 12301 ; CI-DS128: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD5]], [[C]](s32) 12302 ; CI-DS128: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 2 + 14, addrspace 3) 12303 ; CI-DS128: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 12304 ; CI-DS128: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C1]] 12305 ; CI-DS128: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 12306 ; CI-DS128: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C1]] 12307 ; CI-DS128: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C2]](s32) 12308 ; CI-DS128: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND6]], [[SHL3]] 12309 ; CI-DS128: [[PTR_ADD7:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD5]], [[C3]](s32) 12310 ; CI-DS128: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p3) :: (load 2 + 16, addrspace 3) 12311 ; CI-DS128: [[PTR_ADD8:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 12312 ; CI-DS128: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p3) :: (load 2 + 18, addrspace 3) 12313 ; CI-DS128: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 12314 ; CI-DS128: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C1]] 12315 ; CI-DS128: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 12316 ; CI-DS128: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C1]] 12317 ; CI-DS128: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C2]](s32) 12318 ; CI-DS128: [[OR4:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL4]] 12319 ; CI-DS128: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR3]](s32), [[OR4]](s32) 12320 ; CI-DS128: [[PTR_ADD9:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD5]], [[C4]](s32) 12321 ; CI-DS128: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p3) :: (load 2 + 20, addrspace 3) 12322 ; CI-DS128: [[PTR_ADD10:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD9]], [[C]](s32) 12323 ; CI-DS128: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p3) :: (load 2 + 22, addrspace 3) 12324 ; CI-DS128: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 12325 ; CI-DS128: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C1]] 12326 ; CI-DS128: [[COPY13:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 12327 ; CI-DS128: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY13]], [[C1]] 12328 ; CI-DS128: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C2]](s32) 12329 ; CI-DS128: [[OR5:%[0-9]+]]:_(s32) = G_OR [[AND10]], [[SHL5]] 12330 ; CI-DS128: [[INSERT2:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[DEF]], [[BUILD_VECTOR1]](<2 x s32>), 0 12331 ; CI-DS128: [[INSERT3:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT2]], [[OR5]](s32), 64 12332 ; CI-DS128: [[BITCAST1:%[0-9]+]]:_(s96) = G_BITCAST [[INSERT3]](<3 x s32>) 12333 ; CI-DS128: [[COPY14:%[0-9]+]]:_(s96) = COPY [[BITCAST]](s96) 12334 ; CI-DS128: [[COPY15:%[0-9]+]]:_(s96) = COPY [[BITCAST1]](s96) 12335 ; CI-DS128: $vgpr0_vgpr1_vgpr2 = COPY [[COPY14]](s96) 12336 ; CI-DS128: $vgpr3_vgpr4_vgpr5 = COPY [[COPY15]](s96) 12337 ; VI-LABEL: name: test_extload_local_v2s96_from_24_align2 12338 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 12339 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 12340 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 12341 ; VI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 12342 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 12343 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 12344 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 12345 ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 12346 ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 12347 ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 12348 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 12349 ; VI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 12350 ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 12351 ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 12352 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C3]](s32) 12353 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 2 + 4, addrspace 3) 12354 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 12355 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 2 + 6, addrspace 3) 12356 ; VI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 12357 ; VI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C1]] 12358 ; VI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 12359 ; VI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C1]] 12360 ; VI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C2]](s32) 12361 ; VI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 12362 ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR]](s32), [[OR1]](s32) 12363 ; VI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 12364 ; VI: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 12365 ; VI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 2 + 8, addrspace 3) 12366 ; VI: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 12367 ; VI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 2 + 10, addrspace 3) 12368 ; VI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 12369 ; VI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C1]] 12370 ; VI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 12371 ; VI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C1]] 12372 ; VI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C2]](s32) 12373 ; VI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL2]] 12374 ; VI: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF 12375 ; VI: [[COPY7:%[0-9]+]]:_(<3 x s32>) = COPY [[DEF]](<3 x s32>) 12376 ; VI: [[INSERT:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[COPY7]], [[BUILD_VECTOR]](<2 x s32>), 0 12377 ; VI: [[INSERT1:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT]], [[OR2]](s32), 64 12378 ; VI: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[INSERT1]](<3 x s32>) 12379 ; VI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 12380 ; VI: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C5]](s32) 12381 ; VI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 2 + 12, addrspace 3) 12382 ; VI: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD5]], [[C]](s32) 12383 ; VI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 2 + 14, addrspace 3) 12384 ; VI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 12385 ; VI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C1]] 12386 ; VI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 12387 ; VI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C1]] 12388 ; VI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C2]](s32) 12389 ; VI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND6]], [[SHL3]] 12390 ; VI: [[PTR_ADD7:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD5]], [[C3]](s32) 12391 ; VI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p3) :: (load 2 + 16, addrspace 3) 12392 ; VI: [[PTR_ADD8:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 12393 ; VI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p3) :: (load 2 + 18, addrspace 3) 12394 ; VI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 12395 ; VI: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C1]] 12396 ; VI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 12397 ; VI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C1]] 12398 ; VI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C2]](s32) 12399 ; VI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL4]] 12400 ; VI: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR3]](s32), [[OR4]](s32) 12401 ; VI: [[PTR_ADD9:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD5]], [[C4]](s32) 12402 ; VI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p3) :: (load 2 + 20, addrspace 3) 12403 ; VI: [[PTR_ADD10:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD9]], [[C]](s32) 12404 ; VI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p3) :: (load 2 + 22, addrspace 3) 12405 ; VI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 12406 ; VI: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C1]] 12407 ; VI: [[COPY13:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 12408 ; VI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY13]], [[C1]] 12409 ; VI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C2]](s32) 12410 ; VI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[AND10]], [[SHL5]] 12411 ; VI: [[INSERT2:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[DEF]], [[BUILD_VECTOR1]](<2 x s32>), 0 12412 ; VI: [[INSERT3:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT2]], [[OR5]](s32), 64 12413 ; VI: [[BITCAST1:%[0-9]+]]:_(s96) = G_BITCAST [[INSERT3]](<3 x s32>) 12414 ; VI: [[COPY14:%[0-9]+]]:_(s96) = COPY [[BITCAST]](s96) 12415 ; VI: [[COPY15:%[0-9]+]]:_(s96) = COPY [[BITCAST1]](s96) 12416 ; VI: $vgpr0_vgpr1_vgpr2 = COPY [[COPY14]](s96) 12417 ; VI: $vgpr3_vgpr4_vgpr5 = COPY [[COPY15]](s96) 12418 ; GFX9-LABEL: name: test_extload_local_v2s96_from_24_align2 12419 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 12420 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p3) :: (load 2, addrspace 3) 12421 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 12422 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 12423 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 2 + 2, addrspace 3) 12424 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 12425 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 12426 ; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 12427 ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 12428 ; GFX9: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 12429 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 12430 ; GFX9: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 12431 ; GFX9: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 12432 ; GFX9: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 12433 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C3]](s32) 12434 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 2 + 4, addrspace 3) 12435 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 12436 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 2 + 6, addrspace 3) 12437 ; GFX9: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 12438 ; GFX9: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C1]] 12439 ; GFX9: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 12440 ; GFX9: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C1]] 12441 ; GFX9: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C2]](s32) 12442 ; GFX9: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 12443 ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR]](s32), [[OR1]](s32) 12444 ; GFX9: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 12445 ; GFX9: [[PTR_ADD3:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C4]](s32) 12446 ; GFX9: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p3) :: (load 2 + 8, addrspace 3) 12447 ; GFX9: [[PTR_ADD4:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 12448 ; GFX9: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p3) :: (load 2 + 10, addrspace 3) 12449 ; GFX9: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 12450 ; GFX9: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C1]] 12451 ; GFX9: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 12452 ; GFX9: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C1]] 12453 ; GFX9: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C2]](s32) 12454 ; GFX9: [[OR2:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL2]] 12455 ; GFX9: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF 12456 ; GFX9: [[COPY7:%[0-9]+]]:_(<3 x s32>) = COPY [[DEF]](<3 x s32>) 12457 ; GFX9: [[INSERT:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[COPY7]], [[BUILD_VECTOR]](<2 x s32>), 0 12458 ; GFX9: [[INSERT1:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT]], [[OR2]](s32), 64 12459 ; GFX9: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[INSERT1]](<3 x s32>) 12460 ; GFX9: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 12461 ; GFX9: [[PTR_ADD5:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C5]](s32) 12462 ; GFX9: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p3) :: (load 2 + 12, addrspace 3) 12463 ; GFX9: [[PTR_ADD6:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD5]], [[C]](s32) 12464 ; GFX9: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p3) :: (load 2 + 14, addrspace 3) 12465 ; GFX9: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 12466 ; GFX9: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C1]] 12467 ; GFX9: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 12468 ; GFX9: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C1]] 12469 ; GFX9: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C2]](s32) 12470 ; GFX9: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND6]], [[SHL3]] 12471 ; GFX9: [[PTR_ADD7:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD5]], [[C3]](s32) 12472 ; GFX9: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p3) :: (load 2 + 16, addrspace 3) 12473 ; GFX9: [[PTR_ADD8:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 12474 ; GFX9: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p3) :: (load 2 + 18, addrspace 3) 12475 ; GFX9: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 12476 ; GFX9: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C1]] 12477 ; GFX9: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 12478 ; GFX9: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C1]] 12479 ; GFX9: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C2]](s32) 12480 ; GFX9: [[OR4:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL4]] 12481 ; GFX9: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR3]](s32), [[OR4]](s32) 12482 ; GFX9: [[PTR_ADD9:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD5]], [[C4]](s32) 12483 ; GFX9: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p3) :: (load 2 + 20, addrspace 3) 12484 ; GFX9: [[PTR_ADD10:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD9]], [[C]](s32) 12485 ; GFX9: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p3) :: (load 2 + 22, addrspace 3) 12486 ; GFX9: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 12487 ; GFX9: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C1]] 12488 ; GFX9: [[COPY13:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 12489 ; GFX9: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY13]], [[C1]] 12490 ; GFX9: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C2]](s32) 12491 ; GFX9: [[OR5:%[0-9]+]]:_(s32) = G_OR [[AND10]], [[SHL5]] 12492 ; GFX9: [[INSERT2:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[DEF]], [[BUILD_VECTOR1]](<2 x s32>), 0 12493 ; GFX9: [[INSERT3:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT2]], [[OR5]](s32), 64 12494 ; GFX9: [[BITCAST1:%[0-9]+]]:_(s96) = G_BITCAST [[INSERT3]](<3 x s32>) 12495 ; GFX9: [[COPY14:%[0-9]+]]:_(s96) = COPY [[BITCAST]](s96) 12496 ; GFX9: [[COPY15:%[0-9]+]]:_(s96) = COPY [[BITCAST1]](s96) 12497 ; GFX9: $vgpr0_vgpr1_vgpr2 = COPY [[COPY14]](s96) 12498 ; GFX9: $vgpr3_vgpr4_vgpr5 = COPY [[COPY15]](s96) 12499 ; GFX9-UNALIGNED-LABEL: name: test_extload_local_v2s96_from_24_align2 12500 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 12501 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(<3 x s32>) = G_LOAD [[COPY]](p3) :: (load 12, align 2, addrspace 3) 12502 ; GFX9-UNALIGNED: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[LOAD]](<3 x s32>) 12503 ; GFX9-UNALIGNED: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 12504 ; GFX9-UNALIGNED: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 12505 ; GFX9-UNALIGNED: [[LOAD1:%[0-9]+]]:_(<3 x s32>) = G_LOAD [[PTR_ADD]](p3) :: (load 12 + 12, align 2, addrspace 3) 12506 ; GFX9-UNALIGNED: [[BITCAST1:%[0-9]+]]:_(s96) = G_BITCAST [[LOAD1]](<3 x s32>) 12507 ; GFX9-UNALIGNED: [[COPY1:%[0-9]+]]:_(s96) = COPY [[BITCAST]](s96) 12508 ; GFX9-UNALIGNED: [[COPY2:%[0-9]+]]:_(s96) = COPY [[BITCAST1]](s96) 12509 ; GFX9-UNALIGNED: $vgpr0_vgpr1_vgpr2 = COPY [[COPY1]](s96) 12510 ; GFX9-UNALIGNED: $vgpr3_vgpr4_vgpr5 = COPY [[COPY2]](s96) 12511 %0:_(p3) = COPY $vgpr0 12512 %1:_(<2 x s96>) = G_LOAD %0 :: (load 24, align 2, addrspace 3) 12513 %2:_(s96) = G_EXTRACT %1, 0 12514 %3:_(s96) = G_EXTRACT %1, 96 12515 $vgpr0_vgpr1_vgpr2 = COPY %2 12516 $vgpr3_vgpr4_vgpr5 = COPY %3 12517... 12518 12519--- 12520name: test_extload_local_v2s96_from_24_align4 12521body: | 12522 bb.0: 12523 liveins: $vgpr0 12524 12525 ; SI-LABEL: name: test_extload_local_v2s96_from_24_align4 12526 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 12527 ; SI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 8, align 4, addrspace 3) 12528 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 12529 ; SI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 12530 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 4 + 8, addrspace 3) 12531 ; SI: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF 12532 ; SI: [[COPY1:%[0-9]+]]:_(<3 x s32>) = COPY [[DEF]](<3 x s32>) 12533 ; SI: [[INSERT:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[COPY1]], [[LOAD]](<2 x s32>), 0 12534 ; SI: [[INSERT1:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT]], [[LOAD1]](s32), 64 12535 ; SI: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[INSERT1]](<3 x s32>) 12536 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 12537 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 12538 ; SI: [[LOAD2:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[PTR_ADD1]](p3) :: (load 8 + 12, align 4, addrspace 3) 12539 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 12540 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 4 + 20, addrspace 3) 12541 ; SI: [[INSERT2:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[DEF]], [[LOAD2]](<2 x s32>), 0 12542 ; SI: [[INSERT3:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT2]], [[LOAD3]](s32), 64 12543 ; SI: [[BITCAST1:%[0-9]+]]:_(s96) = G_BITCAST [[INSERT3]](<3 x s32>) 12544 ; SI: [[COPY2:%[0-9]+]]:_(s96) = COPY [[BITCAST]](s96) 12545 ; SI: [[COPY3:%[0-9]+]]:_(s96) = COPY [[BITCAST1]](s96) 12546 ; SI: $vgpr0_vgpr1_vgpr2 = COPY [[COPY2]](s96) 12547 ; SI: $vgpr3_vgpr4_vgpr5 = COPY [[COPY3]](s96) 12548 ; CI-LABEL: name: test_extload_local_v2s96_from_24_align4 12549 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 12550 ; CI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 8, align 4, addrspace 3) 12551 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 12552 ; CI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 12553 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 4 + 8, addrspace 3) 12554 ; CI: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF 12555 ; CI: [[COPY1:%[0-9]+]]:_(<3 x s32>) = COPY [[DEF]](<3 x s32>) 12556 ; CI: [[INSERT:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[COPY1]], [[LOAD]](<2 x s32>), 0 12557 ; CI: [[INSERT1:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT]], [[LOAD1]](s32), 64 12558 ; CI: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[INSERT1]](<3 x s32>) 12559 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 12560 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 12561 ; CI: [[LOAD2:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[PTR_ADD1]](p3) :: (load 8 + 12, align 4, addrspace 3) 12562 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 12563 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 4 + 20, addrspace 3) 12564 ; CI: [[INSERT2:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[DEF]], [[LOAD2]](<2 x s32>), 0 12565 ; CI: [[INSERT3:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT2]], [[LOAD3]](s32), 64 12566 ; CI: [[BITCAST1:%[0-9]+]]:_(s96) = G_BITCAST [[INSERT3]](<3 x s32>) 12567 ; CI: [[COPY2:%[0-9]+]]:_(s96) = COPY [[BITCAST]](s96) 12568 ; CI: [[COPY3:%[0-9]+]]:_(s96) = COPY [[BITCAST1]](s96) 12569 ; CI: $vgpr0_vgpr1_vgpr2 = COPY [[COPY2]](s96) 12570 ; CI: $vgpr3_vgpr4_vgpr5 = COPY [[COPY3]](s96) 12571 ; CI-DS128-LABEL: name: test_extload_local_v2s96_from_24_align4 12572 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 12573 ; CI-DS128: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 8, align 4, addrspace 3) 12574 ; CI-DS128: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 12575 ; CI-DS128: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 12576 ; CI-DS128: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 4 + 8, addrspace 3) 12577 ; CI-DS128: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF 12578 ; CI-DS128: [[COPY1:%[0-9]+]]:_(<3 x s32>) = COPY [[DEF]](<3 x s32>) 12579 ; CI-DS128: [[INSERT:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[COPY1]], [[LOAD]](<2 x s32>), 0 12580 ; CI-DS128: [[INSERT1:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT]], [[LOAD1]](s32), 64 12581 ; CI-DS128: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[INSERT1]](<3 x s32>) 12582 ; CI-DS128: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 12583 ; CI-DS128: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 12584 ; CI-DS128: [[LOAD2:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[PTR_ADD1]](p3) :: (load 8 + 12, align 4, addrspace 3) 12585 ; CI-DS128: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 12586 ; CI-DS128: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 4 + 20, addrspace 3) 12587 ; CI-DS128: [[INSERT2:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[DEF]], [[LOAD2]](<2 x s32>), 0 12588 ; CI-DS128: [[INSERT3:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT2]], [[LOAD3]](s32), 64 12589 ; CI-DS128: [[BITCAST1:%[0-9]+]]:_(s96) = G_BITCAST [[INSERT3]](<3 x s32>) 12590 ; CI-DS128: [[COPY2:%[0-9]+]]:_(s96) = COPY [[BITCAST]](s96) 12591 ; CI-DS128: [[COPY3:%[0-9]+]]:_(s96) = COPY [[BITCAST1]](s96) 12592 ; CI-DS128: $vgpr0_vgpr1_vgpr2 = COPY [[COPY2]](s96) 12593 ; CI-DS128: $vgpr3_vgpr4_vgpr5 = COPY [[COPY3]](s96) 12594 ; VI-LABEL: name: test_extload_local_v2s96_from_24_align4 12595 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 12596 ; VI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 8, align 4, addrspace 3) 12597 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 12598 ; VI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 12599 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 4 + 8, addrspace 3) 12600 ; VI: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF 12601 ; VI: [[COPY1:%[0-9]+]]:_(<3 x s32>) = COPY [[DEF]](<3 x s32>) 12602 ; VI: [[INSERT:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[COPY1]], [[LOAD]](<2 x s32>), 0 12603 ; VI: [[INSERT1:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT]], [[LOAD1]](s32), 64 12604 ; VI: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[INSERT1]](<3 x s32>) 12605 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 12606 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 12607 ; VI: [[LOAD2:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[PTR_ADD1]](p3) :: (load 8 + 12, align 4, addrspace 3) 12608 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 12609 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 4 + 20, addrspace 3) 12610 ; VI: [[INSERT2:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[DEF]], [[LOAD2]](<2 x s32>), 0 12611 ; VI: [[INSERT3:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT2]], [[LOAD3]](s32), 64 12612 ; VI: [[BITCAST1:%[0-9]+]]:_(s96) = G_BITCAST [[INSERT3]](<3 x s32>) 12613 ; VI: [[COPY2:%[0-9]+]]:_(s96) = COPY [[BITCAST]](s96) 12614 ; VI: [[COPY3:%[0-9]+]]:_(s96) = COPY [[BITCAST1]](s96) 12615 ; VI: $vgpr0_vgpr1_vgpr2 = COPY [[COPY2]](s96) 12616 ; VI: $vgpr3_vgpr4_vgpr5 = COPY [[COPY3]](s96) 12617 ; GFX9-LABEL: name: test_extload_local_v2s96_from_24_align4 12618 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 12619 ; GFX9: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 8, align 4, addrspace 3) 12620 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 12621 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 12622 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 4 + 8, addrspace 3) 12623 ; GFX9: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF 12624 ; GFX9: [[COPY1:%[0-9]+]]:_(<3 x s32>) = COPY [[DEF]](<3 x s32>) 12625 ; GFX9: [[INSERT:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[COPY1]], [[LOAD]](<2 x s32>), 0 12626 ; GFX9: [[INSERT1:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT]], [[LOAD1]](s32), 64 12627 ; GFX9: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[INSERT1]](<3 x s32>) 12628 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 12629 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 12630 ; GFX9: [[LOAD2:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[PTR_ADD1]](p3) :: (load 8 + 12, align 4, addrspace 3) 12631 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 12632 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 4 + 20, addrspace 3) 12633 ; GFX9: [[INSERT2:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[DEF]], [[LOAD2]](<2 x s32>), 0 12634 ; GFX9: [[INSERT3:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT2]], [[LOAD3]](s32), 64 12635 ; GFX9: [[BITCAST1:%[0-9]+]]:_(s96) = G_BITCAST [[INSERT3]](<3 x s32>) 12636 ; GFX9: [[COPY2:%[0-9]+]]:_(s96) = COPY [[BITCAST]](s96) 12637 ; GFX9: [[COPY3:%[0-9]+]]:_(s96) = COPY [[BITCAST1]](s96) 12638 ; GFX9: $vgpr0_vgpr1_vgpr2 = COPY [[COPY2]](s96) 12639 ; GFX9: $vgpr3_vgpr4_vgpr5 = COPY [[COPY3]](s96) 12640 ; GFX9-UNALIGNED-LABEL: name: test_extload_local_v2s96_from_24_align4 12641 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 12642 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(<3 x s32>) = G_LOAD [[COPY]](p3) :: (load 12, align 4, addrspace 3) 12643 ; GFX9-UNALIGNED: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[LOAD]](<3 x s32>) 12644 ; GFX9-UNALIGNED: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 12645 ; GFX9-UNALIGNED: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 12646 ; GFX9-UNALIGNED: [[LOAD1:%[0-9]+]]:_(<3 x s32>) = G_LOAD [[PTR_ADD]](p3) :: (load 12 + 12, align 4, addrspace 3) 12647 ; GFX9-UNALIGNED: [[BITCAST1:%[0-9]+]]:_(s96) = G_BITCAST [[LOAD1]](<3 x s32>) 12648 ; GFX9-UNALIGNED: [[COPY1:%[0-9]+]]:_(s96) = COPY [[BITCAST]](s96) 12649 ; GFX9-UNALIGNED: [[COPY2:%[0-9]+]]:_(s96) = COPY [[BITCAST1]](s96) 12650 ; GFX9-UNALIGNED: $vgpr0_vgpr1_vgpr2 = COPY [[COPY1]](s96) 12651 ; GFX9-UNALIGNED: $vgpr3_vgpr4_vgpr5 = COPY [[COPY2]](s96) 12652 %0:_(p3) = COPY $vgpr0 12653 %1:_(<2 x s96>) = G_LOAD %0 :: (load 24, align 4, addrspace 3) 12654 %2:_(s96) = G_EXTRACT %1, 0 12655 %3:_(s96) = G_EXTRACT %1, 96 12656 $vgpr0_vgpr1_vgpr2 = COPY %2 12657 $vgpr3_vgpr4_vgpr5 = COPY %3 12658... 12659 12660--- 12661name: test_extload_local_v2s96_from_24_align16 12662body: | 12663 bb.0: 12664 liveins: $vgpr0 12665 12666 ; SI-LABEL: name: test_extload_local_v2s96_from_24_align16 12667 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 12668 ; SI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 8, align 16, addrspace 3) 12669 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 12670 ; SI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 12671 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 4 + 8, align 8, addrspace 3) 12672 ; SI: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF 12673 ; SI: [[COPY1:%[0-9]+]]:_(<3 x s32>) = COPY [[DEF]](<3 x s32>) 12674 ; SI: [[INSERT:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[COPY1]], [[LOAD]](<2 x s32>), 0 12675 ; SI: [[INSERT1:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT]], [[LOAD1]](s32), 64 12676 ; SI: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[INSERT1]](<3 x s32>) 12677 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 12678 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 12679 ; SI: [[LOAD2:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[PTR_ADD1]](p3) :: (load 8 + 12, align 4, addrspace 3) 12680 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 12681 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 4 + 20, addrspace 3) 12682 ; SI: [[INSERT2:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[DEF]], [[LOAD2]](<2 x s32>), 0 12683 ; SI: [[INSERT3:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT2]], [[LOAD3]](s32), 64 12684 ; SI: [[BITCAST1:%[0-9]+]]:_(s96) = G_BITCAST [[INSERT3]](<3 x s32>) 12685 ; SI: [[COPY2:%[0-9]+]]:_(s96) = COPY [[BITCAST]](s96) 12686 ; SI: [[COPY3:%[0-9]+]]:_(s96) = COPY [[BITCAST1]](s96) 12687 ; SI: $vgpr0_vgpr1_vgpr2 = COPY [[COPY2]](s96) 12688 ; SI: $vgpr3_vgpr4_vgpr5 = COPY [[COPY3]](s96) 12689 ; CI-LABEL: name: test_extload_local_v2s96_from_24_align16 12690 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 12691 ; CI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p3) :: (load 8, align 16, addrspace 3) 12692 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 12693 ; CI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 12694 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p3) :: (load 4 + 8, align 8, addrspace 3) 12695 ; CI: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF 12696 ; CI: [[COPY1:%[0-9]+]]:_(<3 x s32>) = COPY [[DEF]](<3 x s32>) 12697 ; CI: [[INSERT:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[COPY1]], [[LOAD]](<2 x s32>), 0 12698 ; CI: [[INSERT1:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT]], [[LOAD1]](s32), 64 12699 ; CI: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[INSERT1]](<3 x s32>) 12700 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 12701 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32) 12702 ; CI: [[LOAD2:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[PTR_ADD1]](p3) :: (load 8 + 12, align 4, addrspace 3) 12703 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 12704 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p3) :: (load 4 + 20, addrspace 3) 12705 ; CI: [[INSERT2:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[DEF]], [[LOAD2]](<2 x s32>), 0 12706 ; CI: [[INSERT3:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT2]], [[LOAD3]](s32), 64 12707 ; CI: [[BITCAST1:%[0-9]+]]:_(s96) = G_BITCAST [[INSERT3]](<3 x s32>) 12708 ; CI: [[COPY2:%[0-9]+]]:_(s96) = COPY [[BITCAST]](s96) 12709 ; CI: [[COPY3:%[0-9]+]]:_(s96) = COPY [[BITCAST1]](s96) 12710 ; CI: $vgpr0_vgpr1_vgpr2 = COPY [[COPY2]](s96) 12711 ; CI: $vgpr3_vgpr4_vgpr5 = COPY [[COPY3]](s96) 12712 ; CI-DS128-LABEL: name: test_extload_local_v2s96_from_24_align16 12713 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 12714 ; CI-DS128: [[LOAD:%[0-9]+]]:_(<3 x s32>) = G_LOAD [[COPY]](p3) :: (load 12, align 16, addrspace 3) 12715 ; CI-DS128: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[LOAD]](<3 x s32>) 12716 ; CI-DS128: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 12717 ; CI-DS128: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 12718 ; CI-DS128: [[LOAD1:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[PTR_ADD]](p3) :: (load 8 + 12, align 4, addrspace 3) 12719 ; CI-DS128: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 12720 ; CI-DS128: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD]], [[C1]](s32) 12721 ; CI-DS128: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 4 + 20, addrspace 3) 12722 ; CI-DS128: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF 12723 ; CI-DS128: [[INSERT:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[DEF]], [[LOAD1]](<2 x s32>), 0 12724 ; CI-DS128: [[INSERT1:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT]], [[LOAD2]](s32), 64 12725 ; CI-DS128: [[BITCAST1:%[0-9]+]]:_(s96) = G_BITCAST [[INSERT1]](<3 x s32>) 12726 ; CI-DS128: [[COPY1:%[0-9]+]]:_(s96) = COPY [[BITCAST]](s96) 12727 ; CI-DS128: [[COPY2:%[0-9]+]]:_(s96) = COPY [[BITCAST1]](s96) 12728 ; CI-DS128: $vgpr0_vgpr1_vgpr2 = COPY [[COPY1]](s96) 12729 ; CI-DS128: $vgpr3_vgpr4_vgpr5 = COPY [[COPY2]](s96) 12730 ; VI-LABEL: name: test_extload_local_v2s96_from_24_align16 12731 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 12732 ; VI: [[LOAD:%[0-9]+]]:_(<3 x s32>) = G_LOAD [[COPY]](p3) :: (load 12, align 16, addrspace 3) 12733 ; VI: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[LOAD]](<3 x s32>) 12734 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 12735 ; VI: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 12736 ; VI: [[LOAD1:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[PTR_ADD]](p3) :: (load 8 + 12, align 4, addrspace 3) 12737 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 12738 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD]], [[C1]](s32) 12739 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 4 + 20, addrspace 3) 12740 ; VI: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF 12741 ; VI: [[INSERT:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[DEF]], [[LOAD1]](<2 x s32>), 0 12742 ; VI: [[INSERT1:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT]], [[LOAD2]](s32), 64 12743 ; VI: [[BITCAST1:%[0-9]+]]:_(s96) = G_BITCAST [[INSERT1]](<3 x s32>) 12744 ; VI: [[COPY1:%[0-9]+]]:_(s96) = COPY [[BITCAST]](s96) 12745 ; VI: [[COPY2:%[0-9]+]]:_(s96) = COPY [[BITCAST1]](s96) 12746 ; VI: $vgpr0_vgpr1_vgpr2 = COPY [[COPY1]](s96) 12747 ; VI: $vgpr3_vgpr4_vgpr5 = COPY [[COPY2]](s96) 12748 ; GFX9-LABEL: name: test_extload_local_v2s96_from_24_align16 12749 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 12750 ; GFX9: [[LOAD:%[0-9]+]]:_(<3 x s32>) = G_LOAD [[COPY]](p3) :: (load 12, align 16, addrspace 3) 12751 ; GFX9: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[LOAD]](<3 x s32>) 12752 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 12753 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 12754 ; GFX9: [[LOAD1:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[PTR_ADD]](p3) :: (load 8 + 12, align 4, addrspace 3) 12755 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 12756 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p3) = G_PTR_ADD [[PTR_ADD]], [[C1]](s32) 12757 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p3) :: (load 4 + 20, addrspace 3) 12758 ; GFX9: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF 12759 ; GFX9: [[INSERT:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[DEF]], [[LOAD1]](<2 x s32>), 0 12760 ; GFX9: [[INSERT1:%[0-9]+]]:_(<3 x s32>) = G_INSERT [[INSERT]], [[LOAD2]](s32), 64 12761 ; GFX9: [[BITCAST1:%[0-9]+]]:_(s96) = G_BITCAST [[INSERT1]](<3 x s32>) 12762 ; GFX9: [[COPY1:%[0-9]+]]:_(s96) = COPY [[BITCAST]](s96) 12763 ; GFX9: [[COPY2:%[0-9]+]]:_(s96) = COPY [[BITCAST1]](s96) 12764 ; GFX9: $vgpr0_vgpr1_vgpr2 = COPY [[COPY1]](s96) 12765 ; GFX9: $vgpr3_vgpr4_vgpr5 = COPY [[COPY2]](s96) 12766 ; GFX9-UNALIGNED-LABEL: name: test_extload_local_v2s96_from_24_align16 12767 ; GFX9-UNALIGNED: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 12768 ; GFX9-UNALIGNED: [[LOAD:%[0-9]+]]:_(<3 x s32>) = G_LOAD [[COPY]](p3) :: (load 12, align 16, addrspace 3) 12769 ; GFX9-UNALIGNED: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[LOAD]](<3 x s32>) 12770 ; GFX9-UNALIGNED: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 12771 ; GFX9-UNALIGNED: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C]](s32) 12772 ; GFX9-UNALIGNED: [[LOAD1:%[0-9]+]]:_(<3 x s32>) = G_LOAD [[PTR_ADD]](p3) :: (load 12 + 12, align 4, addrspace 3) 12773 ; GFX9-UNALIGNED: [[BITCAST1:%[0-9]+]]:_(s96) = G_BITCAST [[LOAD1]](<3 x s32>) 12774 ; GFX9-UNALIGNED: [[COPY1:%[0-9]+]]:_(s96) = COPY [[BITCAST]](s96) 12775 ; GFX9-UNALIGNED: [[COPY2:%[0-9]+]]:_(s96) = COPY [[BITCAST1]](s96) 12776 ; GFX9-UNALIGNED: $vgpr0_vgpr1_vgpr2 = COPY [[COPY1]](s96) 12777 ; GFX9-UNALIGNED: $vgpr3_vgpr4_vgpr5 = COPY [[COPY2]](s96) 12778 %0:_(p3) = COPY $vgpr0 12779 %1:_(<2 x s96>) = G_LOAD %0 :: (load 24, align 16, addrspace 3) 12780 %2:_(s96) = G_EXTRACT %1, 0 12781 %3:_(s96) = G_EXTRACT %1, 96 12782 $vgpr0_vgpr1_vgpr2 = COPY %2 12783 $vgpr3_vgpr4_vgpr5 = COPY %3 12784... 12785