1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -run-pass=legalizer -o - %s | FileCheck %s -check-prefix=SI
3# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -run-pass=legalizer -o - %s | FileCheck %s -check-prefix=VI
4---
5name: test_sextload_flat_i32_i8
6body: |
7  bb.0:
8    liveins: $vgpr0_vgpr1
9
10    ; SI-LABEL: name: test_sextload_flat_i32_i8
11    ; SI: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
12    ; SI: [[SEXTLOAD:%[0-9]+]]:_(s32) = G_SEXTLOAD [[COPY]](p0) :: (load 1)
13    ; SI: $vgpr0 = COPY [[SEXTLOAD]](s32)
14    ; VI-LABEL: name: test_sextload_flat_i32_i8
15    ; VI: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
16    ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p0) :: (load 1)
17    ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32)
18    ; VI: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY1]], 8
19    ; VI: $vgpr0 = COPY [[SEXT_INREG]](s32)
20    %0:_(p0) = COPY $vgpr0_vgpr1
21    %1:_(s32) = G_SEXTLOAD %0 :: (load 1, addrspace 0)
22    $vgpr0 = COPY %1
23...
24---
25name: test_sextload_flat_i32_i16
26body: |
27  bb.0:
28    liveins: $vgpr0_vgpr1
29
30    ; SI-LABEL: name: test_sextload_flat_i32_i16
31    ; SI: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
32    ; SI: [[SEXTLOAD:%[0-9]+]]:_(s32) = G_SEXTLOAD [[COPY]](p0) :: (load 2)
33    ; SI: $vgpr0 = COPY [[SEXTLOAD]](s32)
34    ; VI-LABEL: name: test_sextload_flat_i32_i16
35    ; VI: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
36    ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p0) :: (load 2)
37    ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32)
38    ; VI: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY1]], 16
39    ; VI: $vgpr0 = COPY [[SEXT_INREG]](s32)
40     %0:_(p0) = COPY $vgpr0_vgpr1
41    %1:_(s32) = G_SEXTLOAD %0 :: (load 2, addrspace 0)
42    $vgpr0 = COPY %1
43...
44---
45name: test_sextload_flat_i31_i8
46body: |
47  bb.0:
48    liveins: $vgpr0_vgpr1
49
50    ; SI-LABEL: name: test_sextload_flat_i31_i8
51    ; SI: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
52    ; SI: [[SEXTLOAD:%[0-9]+]]:_(s32) = G_SEXTLOAD [[COPY]](p0) :: (load 1)
53    ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[SEXTLOAD]](s32)
54    ; SI: $vgpr0 = COPY [[COPY1]](s32)
55    ; VI-LABEL: name: test_sextload_flat_i31_i8
56    ; VI: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
57    ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p0) :: (load 1)
58    ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32)
59    ; VI: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY1]], 8
60    ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[SEXT_INREG]](s32)
61    ; VI: $vgpr0 = COPY [[COPY2]](s32)
62    %0:_(p0) = COPY $vgpr0_vgpr1
63    %1:_(s31) = G_SEXTLOAD %0 :: (load 1, addrspace 0)
64    %2:_(s32) = G_ANYEXT %1
65    $vgpr0 = COPY %2
66...
67---
68name: test_sextload_flat_i64_i8
69body: |
70  bb.0:
71    liveins: $vgpr0_vgpr1
72
73    ; SI-LABEL: name: test_sextload_flat_i64_i8
74    ; SI: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
75    ; SI: [[SEXTLOAD:%[0-9]+]]:_(s32) = G_SEXTLOAD [[COPY]](p0) :: (load 1)
76    ; SI: [[SEXT:%[0-9]+]]:_(s64) = G_SEXT [[SEXTLOAD]](s32)
77    ; SI: $vgpr0_vgpr1 = COPY [[SEXT]](s64)
78    ; VI-LABEL: name: test_sextload_flat_i64_i8
79    ; VI: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
80    ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p0) :: (load 1)
81    ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32)
82    ; VI: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY1]], 8
83    ; VI: [[SEXT:%[0-9]+]]:_(s64) = G_SEXT [[SEXT_INREG]](s32)
84    ; VI: $vgpr0_vgpr1 = COPY [[SEXT]](s64)
85    %0:_(p0) = COPY $vgpr0_vgpr1
86    %1:_(s64) = G_SEXTLOAD %0 :: (load 1, addrspace 0)
87    $vgpr0_vgpr1 = COPY %1
88...
89---
90name: test_sextload_flat_i64_i16
91body: |
92  bb.0:
93    liveins: $vgpr0_vgpr1
94
95    ; SI-LABEL: name: test_sextload_flat_i64_i16
96    ; SI: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
97    ; SI: [[SEXTLOAD:%[0-9]+]]:_(s32) = G_SEXTLOAD [[COPY]](p0) :: (load 2)
98    ; SI: [[SEXT:%[0-9]+]]:_(s64) = G_SEXT [[SEXTLOAD]](s32)
99    ; SI: $vgpr0_vgpr1 = COPY [[SEXT]](s64)
100    ; VI-LABEL: name: test_sextload_flat_i64_i16
101    ; VI: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
102    ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p0) :: (load 2)
103    ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32)
104    ; VI: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY1]], 16
105    ; VI: [[SEXT:%[0-9]+]]:_(s64) = G_SEXT [[SEXT_INREG]](s32)
106    ; VI: $vgpr0_vgpr1 = COPY [[SEXT]](s64)
107    %0:_(p0) = COPY $vgpr0_vgpr1
108    %1:_(s64) = G_SEXTLOAD %0 :: (load 2, addrspace 0)
109    $vgpr0_vgpr1 = COPY %1
110...
111---
112name: test_sextload_flat_i64_i32
113body: |
114  bb.0:
115    liveins: $vgpr0_vgpr1
116
117    ; SI-LABEL: name: test_sextload_flat_i64_i32
118    ; SI: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
119    ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p0) :: (load 4)
120    ; SI: [[SEXT:%[0-9]+]]:_(s64) = G_SEXT [[LOAD]](s32)
121    ; SI: $vgpr0_vgpr1 = COPY [[SEXT]](s64)
122    ; VI-LABEL: name: test_sextload_flat_i64_i32
123    ; VI: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
124    ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p0) :: (load 4)
125    ; VI: [[SEXT:%[0-9]+]]:_(s64) = G_SEXT [[LOAD]](s32)
126    ; VI: $vgpr0_vgpr1 = COPY [[SEXT]](s64)
127    %0:_(p0) = COPY $vgpr0_vgpr1
128    %1:_(s64) = G_SEXTLOAD %0 :: (load 4, addrspace 0)
129    $vgpr0_vgpr1 = COPY %1
130...
131