1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -O0 -run-pass=legalizer %s -o - | FileCheck %s 3 4--- 5name: shufflevector_scalar_src 6tracksRegLiveness: true 7 8body: | 9 bb.0: 10 liveins: $vgpr0, $vgpr1 11 12 ; CHECK-LABEL: name: shufflevector_scalar_src 13 ; CHECK: liveins: $vgpr0, $vgpr1 14 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 15 ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 16 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32) 17 ; CHECK: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) 18 %0:_(s32) = COPY $vgpr0 19 %1:_(s32) = COPY $vgpr1 20 %2:_(<2 x s32>) = G_SHUFFLE_VECTOR %0, %1, shufflemask(0, 1) 21 $vgpr0_vgpr1 = COPY %2 22 23... 24--- 25name: shufflevector_v2s32_0_1 26tracksRegLiveness: true 27 28body: | 29 bb.0: 30 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 31 32 ; CHECK-LABEL: name: shufflevector_v2s32_0_1 33 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 34 ; CHECK: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1 35 ; CHECK: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr2_vgpr3 36 ; CHECK: [[EXTRACT:%[0-9]+]]:_(s32) = G_EXTRACT [[COPY]](<2 x s32>), 0 37 ; CHECK: [[EXTRACT1:%[0-9]+]]:_(s32) = G_EXTRACT [[COPY]](<2 x s32>), 32 38 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[EXTRACT]](s32), [[EXTRACT1]](s32) 39 ; CHECK: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) 40 %0:_(<2 x s32>) = COPY $vgpr0_vgpr1 41 %1:_(<2 x s32>) = COPY $vgpr2_vgpr3 42 %2:_(<2 x s32>) = G_SHUFFLE_VECTOR %0, %1, shufflemask(0, 1) 43 $vgpr0_vgpr1 = COPY %2 44 45... 46 47--- 48name: shufflevector_v2s32_1_0 49tracksRegLiveness: true 50 51body: | 52 bb.0: 53 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 54 55 ; CHECK-LABEL: name: shufflevector_v2s32_1_0 56 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 57 ; CHECK: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1 58 ; CHECK: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr2_vgpr3 59 ; CHECK: [[EXTRACT:%[0-9]+]]:_(s32) = G_EXTRACT [[COPY]](<2 x s32>), 32 60 ; CHECK: [[EXTRACT1:%[0-9]+]]:_(s32) = G_EXTRACT [[COPY]](<2 x s32>), 0 61 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[EXTRACT]](s32), [[EXTRACT1]](s32) 62 ; CHECK: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) 63 %0:_(<2 x s32>) = COPY $vgpr0_vgpr1 64 %1:_(<2 x s32>) = COPY $vgpr2_vgpr3 65 %2:_(<2 x s32>) = G_SHUFFLE_VECTOR %0, %1, shufflemask(1, 0) 66 $vgpr0_vgpr1 = COPY %2 67 68... 69 70--- 71name: shufflevector_v2s32_0_0 72tracksRegLiveness: true 73 74body: | 75 bb.0: 76 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 77 78 ; CHECK-LABEL: name: shufflevector_v2s32_0_0 79 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 80 ; CHECK: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1 81 ; CHECK: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr2_vgpr3 82 ; CHECK: [[EXTRACT:%[0-9]+]]:_(s32) = G_EXTRACT [[COPY]](<2 x s32>), 0 83 ; CHECK: [[EXTRACT1:%[0-9]+]]:_(s32) = G_EXTRACT [[COPY]](<2 x s32>), 0 84 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[EXTRACT]](s32), [[EXTRACT1]](s32) 85 ; CHECK: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) 86 %0:_(<2 x s32>) = COPY $vgpr0_vgpr1 87 %1:_(<2 x s32>) = COPY $vgpr2_vgpr3 88 %2:_(<2 x s32>) = G_SHUFFLE_VECTOR %0, %1, shufflemask(0, 0) 89 $vgpr0_vgpr1 = COPY %2 90 91... 92 93--- 94name: shufflevector_v2s32_undef_undef 95tracksRegLiveness: true 96 97body: | 98 bb.0: 99 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 100 101 ; CHECK-LABEL: name: shufflevector_v2s32_undef_undef 102 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 103 ; CHECK: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1 104 ; CHECK: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr2_vgpr3 105 ; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF 106 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[DEF]](s32), [[DEF]](s32) 107 ; CHECK: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) 108 %0:_(<2 x s32>) = COPY $vgpr0_vgpr1 109 %1:_(<2 x s32>) = COPY $vgpr2_vgpr3 110 %2:_(<2 x s32>) = G_SHUFFLE_VECTOR %0, %1, shufflemask(undef, undef) 111 $vgpr0_vgpr1 = COPY %2 112 113... 114 115--- 116name: shufflevector_v2s32_undef_0 117tracksRegLiveness: true 118 119body: | 120 bb.0: 121 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 122 123 ; CHECK-LABEL: name: shufflevector_v2s32_undef_0 124 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 125 ; CHECK: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1 126 ; CHECK: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr2_vgpr3 127 ; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF 128 ; CHECK: [[EXTRACT:%[0-9]+]]:_(s32) = G_EXTRACT [[COPY]](<2 x s32>), 0 129 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[DEF]](s32), [[EXTRACT]](s32) 130 ; CHECK: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) 131 %0:_(<2 x s32>) = COPY $vgpr0_vgpr1 132 %1:_(<2 x s32>) = COPY $vgpr2_vgpr3 133 %2:_(<2 x s32>) = G_SHUFFLE_VECTOR %0, %1, shufflemask(undef, 0) 134 $vgpr0_vgpr1 = COPY %2 135 136... 137 138--- 139name: shufflevector_v2s32_0_undef 140tracksRegLiveness: true 141 142body: | 143 bb.0: 144 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 145 146 ; CHECK-LABEL: name: shufflevector_v2s32_0_undef 147 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 148 ; CHECK: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1 149 ; CHECK: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr2_vgpr3 150 ; CHECK: [[EXTRACT:%[0-9]+]]:_(s32) = G_EXTRACT [[COPY]](<2 x s32>), 0 151 ; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF 152 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[EXTRACT]](s32), [[DEF]](s32) 153 ; CHECK: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) 154 %0:_(<2 x s32>) = COPY $vgpr0_vgpr1 155 %1:_(<2 x s32>) = COPY $vgpr2_vgpr3 156 %2:_(<2 x s32>) = G_SHUFFLE_VECTOR %0, %1, shufflemask(0, undef) 157 $vgpr0_vgpr1 = COPY %2 158 159... 160 161--- 162name: shufflevector_v3s32_3_2_1 163tracksRegLiveness: true 164 165body: | 166 bb.0: 167 liveins: $vgpr0_vgpr1_vgpr2, $vgpr3_vgpr4_vgpr5 168 169 ; CHECK-LABEL: name: shufflevector_v3s32_3_2_1 170 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2, $vgpr3_vgpr4_vgpr5 171 ; CHECK: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2 172 ; CHECK: [[COPY1:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr3_vgpr4_vgpr5 173 ; CHECK: [[EXTRACT:%[0-9]+]]:_(s32) = G_EXTRACT [[COPY1]](<3 x s32>), 0 174 ; CHECK: [[EXTRACT1:%[0-9]+]]:_(s32) = G_EXTRACT [[COPY]](<3 x s32>), 64 175 ; CHECK: [[EXTRACT2:%[0-9]+]]:_(s32) = G_EXTRACT [[COPY]](<3 x s32>), 32 176 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[EXTRACT]](s32), [[EXTRACT1]](s32), [[EXTRACT2]](s32) 177 ; CHECK: $vgpr0_vgpr1_vgpr2 = COPY [[BUILD_VECTOR]](<3 x s32>) 178 %0:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2 179 %1:_(<3 x s32>) = COPY $vgpr3_vgpr4_vgpr5 180 %2:_(<3 x s32>) = G_SHUFFLE_VECTOR %0, %1, shufflemask(3, 2, 1) 181 $vgpr0_vgpr1_vgpr2 = COPY %2 182 183... 184 185--- 186name: shufflevector_v3s32_3_2_1_smaller 187tracksRegLiveness: true 188 189body: | 190 bb.0: 191 liveins: $vgpr0_vgpr1_vgpr2, $vgpr3_vgpr4_vgpr5 192 193 ; CHECK-LABEL: name: shufflevector_v3s32_3_2_1_smaller 194 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2, $vgpr3_vgpr4_vgpr5 195 ; CHECK: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2 196 ; CHECK: [[COPY1:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr3_vgpr4_vgpr5 197 ; CHECK: [[EXTRACT:%[0-9]+]]:_(s32) = G_EXTRACT [[COPY]](<3 x s32>), 64 198 ; CHECK: [[EXTRACT1:%[0-9]+]]:_(s32) = G_EXTRACT [[COPY]](<3 x s32>), 32 199 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[EXTRACT]](s32), [[EXTRACT1]](s32) 200 ; CHECK: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) 201 %0:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2 202 %1:_(<3 x s32>) = COPY $vgpr3_vgpr4_vgpr5 203 %2:_(<2 x s32>) = G_SHUFFLE_VECTOR %0, %1, shufflemask(2, 1) 204 $vgpr0_vgpr1 = COPY %2 205 206... 207 208--- 209name: shufflevector_v2s16_0_1 210tracksRegLiveness: true 211 212body: | 213 bb.0: 214 liveins: $vgpr0, $vgpr1 215 216 ; CHECK-LABEL: name: shufflevector_v2s16_0_1 217 ; CHECK: liveins: $vgpr0, $vgpr1 218 ; CHECK: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0 219 ; CHECK: [[COPY1:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr1 220 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 221 ; CHECK: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>) 222 ; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32) 223 ; CHECK: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>) 224 ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 225 ; CHECK: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST1]], [[C1]](s32) 226 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 227 ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32) 228 ; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C2]] 229 ; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LSHR1]](s32) 230 ; CHECK: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C2]] 231 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C1]](s32) 232 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 233 ; CHECK: [[BITCAST2:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32) 234 ; CHECK: $vgpr0 = COPY [[BITCAST2]](<2 x s16>) 235 %0:_(<2 x s16>) = COPY $vgpr0 236 %1:_(<2 x s16>) = COPY $vgpr1 237 %2:_(<2 x s16>) = G_SHUFFLE_VECTOR %0, %1, shufflemask(0, 1) 238 $vgpr0 = COPY %2 239 240... 241 242--- 243name: shufflevector_v2s16_1_0 244tracksRegLiveness: true 245 246body: | 247 bb.0: 248 liveins: $vgpr0, $vgpr1 249 250 ; CHECK-LABEL: name: shufflevector_v2s16_1_0 251 ; CHECK: liveins: $vgpr0, $vgpr1 252 ; CHECK: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0 253 ; CHECK: [[COPY1:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr1 254 ; CHECK: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>) 255 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 256 ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 257 ; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C1]](s32) 258 ; CHECK: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>) 259 ; CHECK: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST1]], [[C]](s32) 260 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 261 ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32) 262 ; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C2]] 263 ; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LSHR1]](s32) 264 ; CHECK: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C2]] 265 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C1]](s32) 266 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 267 ; CHECK: [[BITCAST2:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32) 268 ; CHECK: $vgpr0 = COPY [[BITCAST2]](<2 x s16>) 269 %0:_(<2 x s16>) = COPY $vgpr0 270 %1:_(<2 x s16>) = COPY $vgpr1 271 %2:_(<2 x s16>) = G_SHUFFLE_VECTOR %0, %1, shufflemask(1, 0) 272 $vgpr0 = COPY %2 273 274... 275 276--- 277name: shufflevector_v3s16_2_0 278tracksRegLiveness: true 279 280body: | 281 bb.0: 282 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 283 284 ; CHECK-LABEL: name: shufflevector_v3s16_2_0 285 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 286 ; CHECK: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1 287 ; CHECK: [[COPY1:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr2_vgpr3 288 ; CHECK: [[EXTRACT:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[COPY]](<4 x s16>), 0 289 ; CHECK: [[EXTRACT1:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[COPY1]](<4 x s16>), 0 290 ; CHECK: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 291 ; CHECK: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[EXTRACT1]](<3 x s16>), 0 292 ; CHECK: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[INSERT]](<4 x s16>) 293 ; CHECK: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[UV]](<2 x s16>) 294 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 295 ; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32) 296 ; CHECK: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[UV1]](<2 x s16>) 297 ; CHECK: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST1]], [[C]](s32) 298 ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[BITCAST]](s32) 299 ; CHECK: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY2]], 16 300 ; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32) 301 ; CHECK: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY3]], 16 302 ; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY [[BITCAST1]](s32) 303 ; CHECK: [[SEXT_INREG2:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY4]], 16 304 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[SEXT_INREG]](s32), [[SEXT_INREG1]](s32), [[SEXT_INREG2]](s32) 305 ; CHECK: [[EXTRACT2:%[0-9]+]]:_(s32) = G_EXTRACT [[BUILD_VECTOR]](<3 x s32>), 64 306 ; CHECK: [[INSERT1:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[EXTRACT]](<3 x s16>), 0 307 ; CHECK: [[UV2:%[0-9]+]]:_(<2 x s16>), [[UV3:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[INSERT1]](<4 x s16>) 308 ; CHECK: [[BITCAST2:%[0-9]+]]:_(s32) = G_BITCAST [[UV2]](<2 x s16>) 309 ; CHECK: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST2]], [[C]](s32) 310 ; CHECK: [[BITCAST3:%[0-9]+]]:_(s32) = G_BITCAST [[UV3]](<2 x s16>) 311 ; CHECK: [[LSHR3:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST3]], [[C]](s32) 312 ; CHECK: [[COPY5:%[0-9]+]]:_(s32) = COPY [[BITCAST2]](s32) 313 ; CHECK: [[SEXT_INREG3:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY5]], 16 314 ; CHECK: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LSHR2]](s32) 315 ; CHECK: [[SEXT_INREG4:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY6]], 16 316 ; CHECK: [[COPY7:%[0-9]+]]:_(s32) = COPY [[BITCAST3]](s32) 317 ; CHECK: [[SEXT_INREG5:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY7]], 16 318 ; CHECK: [[BUILD_VECTOR1:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[SEXT_INREG3]](s32), [[SEXT_INREG4]](s32), [[SEXT_INREG5]](s32) 319 ; CHECK: [[EXTRACT3:%[0-9]+]]:_(s32) = G_EXTRACT [[BUILD_VECTOR1]](<3 x s32>), 32 320 ; CHECK: [[INSERT2:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[EXTRACT1]](<3 x s16>), 0 321 ; CHECK: [[UV4:%[0-9]+]]:_(<2 x s16>), [[UV5:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[INSERT2]](<4 x s16>) 322 ; CHECK: [[BITCAST4:%[0-9]+]]:_(s32) = G_BITCAST [[UV4]](<2 x s16>) 323 ; CHECK: [[LSHR4:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST4]], [[C]](s32) 324 ; CHECK: [[BITCAST5:%[0-9]+]]:_(s32) = G_BITCAST [[UV5]](<2 x s16>) 325 ; CHECK: [[LSHR5:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST5]], [[C]](s32) 326 ; CHECK: [[COPY8:%[0-9]+]]:_(s32) = COPY [[BITCAST4]](s32) 327 ; CHECK: [[SEXT_INREG6:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY8]], 16 328 ; CHECK: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LSHR4]](s32) 329 ; CHECK: [[SEXT_INREG7:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY9]], 16 330 ; CHECK: [[COPY10:%[0-9]+]]:_(s32) = COPY [[BITCAST5]](s32) 331 ; CHECK: [[SEXT_INREG8:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY10]], 16 332 ; CHECK: [[BUILD_VECTOR2:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[SEXT_INREG6]](s32), [[SEXT_INREG7]](s32), [[SEXT_INREG8]](s32) 333 ; CHECK: [[EXTRACT4:%[0-9]+]]:_(s32) = G_EXTRACT [[BUILD_VECTOR2]](<3 x s32>), 0 334 ; CHECK: [[INSERT3:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[EXTRACT]](<3 x s16>), 0 335 ; CHECK: [[UV6:%[0-9]+]]:_(<2 x s16>), [[UV7:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[INSERT3]](<4 x s16>) 336 ; CHECK: [[BITCAST6:%[0-9]+]]:_(s32) = G_BITCAST [[UV6]](<2 x s16>) 337 ; CHECK: [[LSHR6:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST6]], [[C]](s32) 338 ; CHECK: [[BITCAST7:%[0-9]+]]:_(s32) = G_BITCAST [[UV7]](<2 x s16>) 339 ; CHECK: [[LSHR7:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST7]], [[C]](s32) 340 ; CHECK: [[COPY11:%[0-9]+]]:_(s32) = COPY [[BITCAST6]](s32) 341 ; CHECK: [[SEXT_INREG9:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY11]], 16 342 ; CHECK: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LSHR6]](s32) 343 ; CHECK: [[SEXT_INREG10:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY12]], 16 344 ; CHECK: [[COPY13:%[0-9]+]]:_(s32) = COPY [[BITCAST7]](s32) 345 ; CHECK: [[SEXT_INREG11:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY13]], 16 346 ; CHECK: [[BUILD_VECTOR3:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[SEXT_INREG9]](s32), [[SEXT_INREG10]](s32), [[SEXT_INREG11]](s32) 347 ; CHECK: [[EXTRACT5:%[0-9]+]]:_(s32) = G_EXTRACT [[BUILD_VECTOR3]](<3 x s32>), 0 348 ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 349 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[EXTRACT2]](s32) 350 ; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY14]], [[C1]] 351 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[EXTRACT3]](s32) 352 ; CHECK: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY15]], [[C1]] 353 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C]](s32) 354 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 355 ; CHECK: [[BITCAST8:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32) 356 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[EXTRACT4]](s32) 357 ; CHECK: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY16]], [[C1]] 358 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[EXTRACT5]](s32) 359 ; CHECK: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY17]], [[C1]] 360 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C]](s32) 361 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 362 ; CHECK: [[BITCAST9:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR1]](s32) 363 ; CHECK: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST8]](<2 x s16>), [[BITCAST9]](<2 x s16>) 364 ; CHECK: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>) 365 %0:_(<4 x s16>) = COPY $vgpr0_vgpr1 366 %1:_(<4 x s16>) = COPY $vgpr2_vgpr3 367 %2:_(<3 x s16>) = G_EXTRACT %0, 0 368 %3:_(<3 x s16>) = G_EXTRACT %1, 0 369 %4:_(<4 x s16>) = G_SHUFFLE_VECTOR %2, %3, shufflemask(5, 1, 3, 0) 370 $vgpr0_vgpr1 = COPY %4 371 372... 373