1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=tonga -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GFX8 %s
3; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GFX9 %s
4
5define amdgpu_ps float @ds_fmin_f32_ss(float addrspace(3)* inreg %ptr, float inreg %val) {
6; GFX8-LABEL: ds_fmin_f32_ss:
7; GFX8:       ; %bb.0:
8; GFX8-NEXT:    v_mov_b32_e32 v0, s2
9; GFX8-NEXT:    v_mov_b32_e32 v1, s3
10; GFX8-NEXT:    s_mov_b32 m0, -1
11; GFX8-NEXT:    ds_min_rtn_f32 v0, v0, v1
12; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
13; GFX8-NEXT:    ; return to shader part epilog
14;
15; GFX9-LABEL: ds_fmin_f32_ss:
16; GFX9:       ; %bb.0:
17; GFX9-NEXT:    v_mov_b32_e32 v0, s2
18; GFX9-NEXT:    v_mov_b32_e32 v1, s3
19; GFX9-NEXT:    ds_min_rtn_f32 v0, v0, v1
20; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
21; GFX9-NEXT:    ; return to shader part epilog
22  %ret = call float @llvm.amdgcn.ds.fmin(float addrspace(3)* %ptr, float %val, i32 0, i32 0, i1 false)
23  ret float %ret
24}
25
26define amdgpu_ps float @ds_fmin_f32_ss_offset(float addrspace(3)* inreg %ptr, float inreg %val) {
27; GFX8-LABEL: ds_fmin_f32_ss_offset:
28; GFX8:       ; %bb.0:
29; GFX8-NEXT:    v_mov_b32_e32 v0, s3
30; GFX8-NEXT:    v_mov_b32_e32 v1, s2
31; GFX8-NEXT:    s_mov_b32 m0, -1
32; GFX8-NEXT:    ds_min_rtn_f32 v0, v1, v0 offset:512
33; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
34; GFX8-NEXT:    ; return to shader part epilog
35;
36; GFX9-LABEL: ds_fmin_f32_ss_offset:
37; GFX9:       ; %bb.0:
38; GFX9-NEXT:    v_mov_b32_e32 v0, s3
39; GFX9-NEXT:    v_mov_b32_e32 v1, s2
40; GFX9-NEXT:    ds_min_rtn_f32 v0, v1, v0 offset:512
41; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
42; GFX9-NEXT:    ; return to shader part epilog
43  %gep = getelementptr float, float addrspace(3)* %ptr, i32 128
44  %ret = call float @llvm.amdgcn.ds.fmin(float addrspace(3)* %gep, float %val, i32 0, i32 0, i1 false)
45  ret float %ret
46}
47
48define amdgpu_ps void @ds_fmin_f32_ss_nortn(float addrspace(3)* inreg %ptr, float inreg %val) {
49; GFX8-LABEL: ds_fmin_f32_ss_nortn:
50; GFX8:       ; %bb.0:
51; GFX8-NEXT:    v_mov_b32_e32 v0, s2
52; GFX8-NEXT:    v_mov_b32_e32 v1, s3
53; GFX8-NEXT:    s_mov_b32 m0, -1
54; GFX8-NEXT:    ds_min_rtn_f32 v0, v0, v1
55; GFX8-NEXT:    s_endpgm
56;
57; GFX9-LABEL: ds_fmin_f32_ss_nortn:
58; GFX9:       ; %bb.0:
59; GFX9-NEXT:    v_mov_b32_e32 v0, s2
60; GFX9-NEXT:    v_mov_b32_e32 v1, s3
61; GFX9-NEXT:    ds_min_rtn_f32 v0, v0, v1
62; GFX9-NEXT:    s_endpgm
63  %unused = call float @llvm.amdgcn.ds.fmin(float addrspace(3)* %ptr, float %val, i32 0, i32 0, i1 false)
64  ret void
65}
66
67define amdgpu_ps void @ds_fmin_f32_ss_offset_nortn(float addrspace(3)* inreg %ptr, float inreg %val) {
68; GFX8-LABEL: ds_fmin_f32_ss_offset_nortn:
69; GFX8:       ; %bb.0:
70; GFX8-NEXT:    v_mov_b32_e32 v0, s3
71; GFX8-NEXT:    v_mov_b32_e32 v1, s2
72; GFX8-NEXT:    s_mov_b32 m0, -1
73; GFX8-NEXT:    ds_min_rtn_f32 v0, v1, v0 offset:512
74; GFX8-NEXT:    s_endpgm
75;
76; GFX9-LABEL: ds_fmin_f32_ss_offset_nortn:
77; GFX9:       ; %bb.0:
78; GFX9-NEXT:    v_mov_b32_e32 v0, s3
79; GFX9-NEXT:    v_mov_b32_e32 v1, s2
80; GFX9-NEXT:    ds_min_rtn_f32 v0, v1, v0 offset:512
81; GFX9-NEXT:    s_endpgm
82  %gep = getelementptr float, float addrspace(3)* %ptr, i32 128
83  %unused = call float @llvm.amdgcn.ds.fmin(float addrspace(3)* %gep, float %val, i32 0, i32 0, i1 false)
84  ret void
85}
86
87define float @ds_fmin_f32_vv(float addrspace(3)* %ptr, float %val) {
88; GFX8-LABEL: ds_fmin_f32_vv:
89; GFX8:       ; %bb.0:
90; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
91; GFX8-NEXT:    s_mov_b32 m0, -1
92; GFX8-NEXT:    ds_min_rtn_f32 v0, v0, v1
93; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
94; GFX8-NEXT:    s_setpc_b64 s[30:31]
95;
96; GFX9-LABEL: ds_fmin_f32_vv:
97; GFX9:       ; %bb.0:
98; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
99; GFX9-NEXT:    ds_min_rtn_f32 v0, v0, v1
100; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
101; GFX9-NEXT:    s_setpc_b64 s[30:31]
102  %ret = call float @llvm.amdgcn.ds.fmin(float addrspace(3)* %ptr, float %val, i32 0, i32 0, i1 false)
103  ret float %ret
104}
105
106define float @ds_fmin_f32_vv_offset(float addrspace(3)* %ptr, float %val) {
107; GFX8-LABEL: ds_fmin_f32_vv_offset:
108; GFX8:       ; %bb.0:
109; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
110; GFX8-NEXT:    s_mov_b32 m0, -1
111; GFX8-NEXT:    ds_min_rtn_f32 v0, v0, v1 offset:512
112; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
113; GFX8-NEXT:    s_setpc_b64 s[30:31]
114;
115; GFX9-LABEL: ds_fmin_f32_vv_offset:
116; GFX9:       ; %bb.0:
117; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
118; GFX9-NEXT:    ds_min_rtn_f32 v0, v0, v1 offset:512
119; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
120; GFX9-NEXT:    s_setpc_b64 s[30:31]
121  %gep = getelementptr float, float addrspace(3)* %ptr, i32 128
122  %ret = call float @llvm.amdgcn.ds.fmin(float addrspace(3)* %gep, float %val, i32 0, i32 0, i1 false)
123  ret float %ret
124}
125
126define void @ds_fmin_f32_vv_nortn(float addrspace(3)* %ptr, float %val) {
127; GFX8-LABEL: ds_fmin_f32_vv_nortn:
128; GFX8:       ; %bb.0:
129; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
130; GFX8-NEXT:    s_mov_b32 m0, -1
131; GFX8-NEXT:    ds_min_rtn_f32 v0, v0, v1
132; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
133; GFX8-NEXT:    s_setpc_b64 s[30:31]
134;
135; GFX9-LABEL: ds_fmin_f32_vv_nortn:
136; GFX9:       ; %bb.0:
137; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
138; GFX9-NEXT:    ds_min_rtn_f32 v0, v0, v1
139; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
140; GFX9-NEXT:    s_setpc_b64 s[30:31]
141  %ret = call float @llvm.amdgcn.ds.fmin(float addrspace(3)* %ptr, float %val, i32 0, i32 0, i1 false)
142  ret void
143}
144
145define void @ds_fmin_f32_vv_offset_nortn(float addrspace(3)* %ptr, float %val) {
146; GFX8-LABEL: ds_fmin_f32_vv_offset_nortn:
147; GFX8:       ; %bb.0:
148; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
149; GFX8-NEXT:    s_mov_b32 m0, -1
150; GFX8-NEXT:    ds_min_rtn_f32 v0, v0, v1 offset:512
151; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
152; GFX8-NEXT:    s_setpc_b64 s[30:31]
153;
154; GFX9-LABEL: ds_fmin_f32_vv_offset_nortn:
155; GFX9:       ; %bb.0:
156; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
157; GFX9-NEXT:    ds_min_rtn_f32 v0, v0, v1 offset:512
158; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
159; GFX9-NEXT:    s_setpc_b64 s[30:31]
160  %gep = getelementptr float, float addrspace(3)* %ptr, i32 128
161  %ret = call float @llvm.amdgcn.ds.fmin(float addrspace(3)* %gep, float %val, i32 0, i32 0, i1 false)
162  ret void
163}
164
165define float @ds_fmin_f32_vv_volatile(float addrspace(3)* %ptr, float %val) {
166; GFX8-LABEL: ds_fmin_f32_vv_volatile:
167; GFX8:       ; %bb.0:
168; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
169; GFX8-NEXT:    s_mov_b32 m0, -1
170; GFX8-NEXT:    ds_min_rtn_f32 v0, v0, v1
171; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
172; GFX8-NEXT:    s_setpc_b64 s[30:31]
173;
174; GFX9-LABEL: ds_fmin_f32_vv_volatile:
175; GFX9:       ; %bb.0:
176; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
177; GFX9-NEXT:    ds_min_rtn_f32 v0, v0, v1
178; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
179; GFX9-NEXT:    s_setpc_b64 s[30:31]
180  %ret = call float @llvm.amdgcn.ds.fmin(float addrspace(3)* %ptr, float %val, i32 0, i32 0, i1 true)
181  ret float %ret
182}
183
184declare float @llvm.amdgcn.ds.fmin(float addrspace(3)* nocapture, float, i32 immarg, i32 immarg, i1 immarg) #0
185
186attributes #0 = { argmemonly nounwind willreturn }
187