1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -global-isel -global-isel-abort=1 -march=amdgcn -mcpu=gfx1010 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
3
4define amdgpu_ps void @test_intr_icmp_eq_i64(i64 addrspace(1)* %out, i32 %src) #0 {
5; GCN-LABEL: test_intr_icmp_eq_i64:
6; GCN:       ; %bb.0:
7; GCN-NEXT:    v_cmp_eq_u32_e64 s[0:1], 0x64, v2
8; GCN-NEXT:    v_mov_b32_e32 v3, s1
9; GCN-NEXT:    v_mov_b32_e32 v2, s0
10; GCN-NEXT:    global_store_dwordx2 v[0:1], v[2:3], off
11; GCN-NEXT:    s_endpgm
12  %result = call i64 @llvm.amdgcn.icmp.i64.i32(i32 %src, i32 100, i32 32)
13  store i64 %result, i64 addrspace(1)* %out
14  ret void
15}
16
17define amdgpu_ps void @test_intr_icmp_ne_i32(i32 addrspace(1)* %out, i32 %src) #1 {
18; GCN-LABEL: test_intr_icmp_ne_i32:
19; GCN:       ; %bb.0:
20; GCN-NEXT:    v_cmp_ne_u32_e64 s0, 0x64, v2
21; GCN-NEXT:    v_mov_b32_e32 v2, s0
22; GCN-NEXT:    global_store_dword v[0:1], v2, off
23; GCN-NEXT:    s_endpgm
24  %result = call i32 @llvm.amdgcn.icmp.i32.i32(i32 %src, i32 100, i32 33)
25  store i32 %result, i32 addrspace(1)* %out
26  ret void
27}
28declare i64 @llvm.amdgcn.icmp.i64.i32(i32, i32, i32)
29declare i32 @llvm.amdgcn.icmp.i32.i32(i32, i32, i32)
30attributes #0 = { "target-features"="+wavefrontsize64" }
31attributes #1 = { "target-features"="+wavefrontsize32" }
32