1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect %s -verify-machineinstrs -o - -regbankselect-fast | FileCheck %s 3# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect %s -verify-machineinstrs -o - -regbankselect-greedy | FileCheck %s 4 5--- 6name: class_ss 7legalized: true 8 9body: | 10 bb.0: 11 liveins: $sgpr0_sgpr1, $sgpr2 12 ; CHECK-LABEL: name: class_ss 13 ; CHECK: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1 14 ; CHECK: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr2 15 ; CHECK: [[COPY2:%[0-9]+]]:vgpr(s64) = COPY [[COPY]](s64) 16 ; CHECK: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32) 17 ; CHECK: [[INT:%[0-9]+]]:vcc(s1) = G_INTRINSIC intrinsic(@llvm.amdgcn.class), [[COPY2]](s64), [[COPY3]](s32) 18 %0:_(s64) = COPY $sgpr0_sgpr1 19 %1:_(s32) = COPY $sgpr2 20 %2:_(s1) = G_INTRINSIC intrinsic(@llvm.amdgcn.class), %0, %1 21... 22 23--- 24name: class_sv 25legalized: true 26 27body: | 28 bb.0: 29 liveins: $sgpr0_sgpr1, $vgpr0 30 31 ; CHECK-LABEL: name: class_sv 32 ; CHECK: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1 33 ; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0 34 ; CHECK: [[COPY2:%[0-9]+]]:vgpr(s64) = COPY [[COPY]](s64) 35 ; CHECK: [[INT:%[0-9]+]]:vcc(s1) = G_INTRINSIC intrinsic(@llvm.amdgcn.class), [[COPY2]](s64), [[COPY1]](s32) 36 %0:_(s64) = COPY $sgpr0_sgpr1 37 %1:_(s32) = COPY $vgpr0 38 %2:_(s1) = G_INTRINSIC intrinsic(@llvm.amdgcn.class), %0, %1 39... 40 41--- 42name: class_vs 43legalized: true 44 45body: | 46 bb.0: 47 liveins: $vgpr0_vgpr1, $sgpr0 48 ; CHECK-LABEL: name: class_vs 49 ; CHECK: [[COPY:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1 50 ; CHECK: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr0 51 ; CHECK: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32) 52 ; CHECK: [[INT:%[0-9]+]]:vcc(s1) = G_INTRINSIC intrinsic(@llvm.amdgcn.class), [[COPY]](s64), [[COPY2]](s32) 53 %0:_(s64) = COPY $vgpr0_vgpr1 54 %1:_(s32) = COPY $sgpr0 55 %2:_(s1) = G_INTRINSIC intrinsic(@llvm.amdgcn.class), %0, %1 56... 57 58--- 59name: class_vv 60legalized: true 61 62body: | 63 bb.0: 64 liveins: $vgpr0, $vgpr1 65 ; CHECK-LABEL: name: class_vv 66 ; CHECK: [[COPY:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1 67 ; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr2 68 ; CHECK: [[INT:%[0-9]+]]:vcc(s1) = G_INTRINSIC intrinsic(@llvm.amdgcn.class), [[COPY]](s64), [[COPY1]](s32) 69 %0:_(s64) = COPY $vgpr0_vgpr1 70 %1:_(s32) = COPY $vgpr2 71 %2:_(s1) = G_INTRINSIC intrinsic(@llvm.amdgcn.class), %0, %1 72... 73