1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect -regbankselect-fast  -verify-machineinstrs %s -o - | FileCheck %s
3# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect -regbankselect-greedy  -verify-machineinstrs %s -o - | FileCheck %s
4
5---
6name: ds_consume_s
7legalized: true
8tracksRegLiveness: true
9body: |
10  bb.0:
11    liveins: $sgpr0
12    ; CHECK-LABEL: name: ds_consume_s
13    ; CHECK: liveins: $sgpr0
14    ; CHECK: [[COPY:%[0-9]+]]:sgpr(p3) = COPY $sgpr0
15    ; CHECK: [[INT:%[0-9]+]]:vgpr(s32) = G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.amdgcn.ds.consume), [[COPY]](p3), 0
16    %0:_(p3) = COPY $sgpr0
17    %1:_(s32) = G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.amdgcn.ds.consume), %0, 0
18
19...
20
21---
22name: ds_consume_v
23legalized: true
24tracksRegLiveness: true
25body: |
26  bb.0:
27    liveins: $vgpr0
28    ; CHECK-LABEL: name: ds_consume_v
29    ; CHECK: liveins: $vgpr0
30    ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(p3) = COPY $vgpr0
31    ; CHECK: [[V_READFIRSTLANE_B32_:%[0-9]+]]:sreg_32(p3) = V_READFIRSTLANE_B32 [[COPY]](p3), implicit $exec
32    ; CHECK: [[INT:%[0-9]+]]:vgpr(s32) = G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.amdgcn.ds.consume), [[V_READFIRSTLANE_B32_]](p3), 0
33    %0:_(p3) = COPY $vgpr0
34    %1:_(s32) = G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.amdgcn.ds.consume), %0, 0
35
36...
37