1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect %s -verify-machineinstrs -o - -regbankselect-fast | FileCheck %s
3
4---
5name: mul_s32_ss
6legalized: true
7
8body: |
9  bb.0:
10    liveins: $sgpr0, $sgpr1
11    ; CHECK-LABEL: name: mul_s32_ss
12    ; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
13    ; CHECK: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
14    ; CHECK: [[MUL:%[0-9]+]]:sgpr(s32) = G_MUL [[COPY]], [[COPY1]]
15    %0:_(s32) = COPY $sgpr0
16    %1:_(s32) = COPY $sgpr1
17    %2:_(s32) = G_MUL %0, %1
18...
19
20---
21name: mul_s32_sv
22legalized: true
23
24body: |
25  bb.0:
26    liveins: $sgpr0, $vgpr0
27    ; CHECK-LABEL: name: mul_s32_sv
28    ; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
29    ; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
30    ; CHECK: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[COPY]](s32)
31    ; CHECK: [[MUL:%[0-9]+]]:vgpr(s32) = G_MUL [[COPY2]], [[COPY1]]
32    %0:_(s32) = COPY $sgpr0
33    %1:_(s32) = COPY $vgpr0
34    %2:_(s32) = G_MUL %0, %1
35...
36
37---
38name: mul_s32_vs
39legalized: true
40
41body: |
42  bb.0:
43    liveins: $sgpr0, $vgpr0
44    ; CHECK-LABEL: name: mul_s32_vs
45    ; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
46    ; CHECK: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
47    ; CHECK: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)
48    ; CHECK: [[MUL:%[0-9]+]]:vgpr(s32) = G_MUL [[COPY]], [[COPY2]]
49    %0:_(s32) = COPY $vgpr0
50    %1:_(s32) = COPY $sgpr0
51    %2:_(s32) = G_MUL %0, %1
52...
53
54---
55name: mul_s32_vv
56legalized: true
57
58body: |
59  bb.0:
60    liveins: $vgpr0, $vgpr1
61    ; CHECK-LABEL: name: mul_s32_vv
62    ; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
63    ; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
64    ; CHECK: [[MUL:%[0-9]+]]:vgpr(s32) = G_MUL [[COPY]], [[COPY1]]
65    %0:_(s32) = COPY $vgpr0
66    %1:_(s32) = COPY $vgpr1
67    %2:_(s32) = G_MUL %0, %1
68...
69