1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -march=amdgcn -mcpu=tahiti -run-pass=regbankselect -regbankselect-fast -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX6 %s
3# RUN: llc -march=amdgcn -mcpu=tahiti -run-pass=regbankselect -regbankselect-greedy -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX6 %s
4
5# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=regbankselect -regbankselect-fast -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX9 %s
6# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=regbankselect -regbankselect-greedy -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX9 %s
7
8---
9name: smulh_s32_ss
10legalized: true
11
12body: |
13  bb.0:
14    liveins: $sgpr0, $sgpr1
15
16    ; GFX6-LABEL: name: smulh_s32_ss
17    ; GFX6: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
18    ; GFX6: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
19    ; GFX6: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[COPY]](s32)
20    ; GFX6: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)
21    ; GFX6: [[SMULH:%[0-9]+]]:vgpr(s32) = G_SMULH [[COPY2]], [[COPY3]]
22    ; GFX9-LABEL: name: smulh_s32_ss
23    ; GFX9: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
24    ; GFX9: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
25    ; GFX9: [[SMULH:%[0-9]+]]:sgpr(s32) = G_SMULH [[COPY]], [[COPY1]]
26    %0:_(s32) = COPY $sgpr0
27    %1:_(s32) = COPY $sgpr1
28    %2:_(s32) = G_SMULH %0, %1
29...
30
31---
32name: smulh_s32_sv
33legalized: true
34
35body: |
36  bb.0:
37    liveins: $sgpr0, $vgpr0
38
39    ; GFX6-LABEL: name: smulh_s32_sv
40    ; GFX6: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
41    ; GFX6: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
42    ; GFX6: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[COPY]](s32)
43    ; GFX6: [[SMULH:%[0-9]+]]:vgpr(s32) = G_SMULH [[COPY2]], [[COPY1]]
44    ; GFX9-LABEL: name: smulh_s32_sv
45    ; GFX9: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
46    ; GFX9: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
47    ; GFX9: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[COPY]](s32)
48    ; GFX9: [[SMULH:%[0-9]+]]:vgpr(s32) = G_SMULH [[COPY2]], [[COPY1]]
49    %0:_(s32) = COPY $sgpr0
50    %1:_(s32) = COPY $vgpr0
51    %2:_(s32) = G_SMULH %0, %1
52...
53
54---
55name: smulh_s32_vs
56legalized: true
57
58body: |
59  bb.0:
60    liveins: $sgpr0, $vgpr0
61
62    ; GFX6-LABEL: name: smulh_s32_vs
63    ; GFX6: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
64    ; GFX6: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
65    ; GFX6: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)
66    ; GFX6: [[SMULH:%[0-9]+]]:vgpr(s32) = G_SMULH [[COPY]], [[COPY2]]
67    ; GFX9-LABEL: name: smulh_s32_vs
68    ; GFX9: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
69    ; GFX9: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
70    ; GFX9: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)
71    ; GFX9: [[SMULH:%[0-9]+]]:vgpr(s32) = G_SMULH [[COPY]], [[COPY2]]
72    %0:_(s32) = COPY $vgpr0
73    %1:_(s32) = COPY $sgpr0
74    %2:_(s32) = G_SMULH %0, %1
75...
76
77---
78name: smulh_s32_vv
79legalized: true
80
81body: |
82  bb.0:
83    liveins: $vgpr0, $vgpr1
84
85    ; GFX6-LABEL: name: smulh_s32_vv
86    ; GFX6: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
87    ; GFX6: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
88    ; GFX6: [[SMULH:%[0-9]+]]:vgpr(s32) = G_SMULH [[COPY]], [[COPY1]]
89    ; GFX9-LABEL: name: smulh_s32_vv
90    ; GFX9: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
91    ; GFX9: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
92    ; GFX9: [[SMULH:%[0-9]+]]:vgpr(s32) = G_SMULH [[COPY]], [[COPY1]]
93    %0:_(s32) = COPY $vgpr0
94    %1:_(s32) = COPY $vgpr1
95    %2:_(s32) = G_SMULH %0, %1
96...
97