1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck %s
3
4define amdgpu_kernel void @test0() {
5; CHECK-LABEL: test0:
6; CHECK:       ; %bb.0:
7; CHECK-NEXT:    s_endpgm
8  tail call void @llvm.amdgcn.endpgm()
9  unreachable
10}
11
12define void @test1() {
13; CHECK-LABEL: test1:
14; CHECK:       ; %bb.0:
15; CHECK-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
16; CHECK-NEXT:    s_endpgm
17  tail call void @llvm.amdgcn.endpgm()
18  unreachable
19}
20
21define amdgpu_kernel void @test2(i32* %p, i32 %x) {
22; CHECK-LABEL: test2:
23; CHECK:       ; %bb.0:
24; CHECK-NEXT:    s_load_dword s2, s[0:1], 0x2c
25; CHECK-NEXT:    s_waitcnt lgkmcnt(0)
26; CHECK-NEXT:    s_cmp_lt_i32 s2, 1
27; CHECK-NEXT:    s_cbranch_scc0 BB2_2
28; CHECK-NEXT:  ; %bb.1: ; %else
29; CHECK-NEXT:    s_load_dwordx2 s[0:1], s[0:1], 0x24
30; CHECK-NEXT:    v_mov_b32_e32 v2, s2
31; CHECK-NEXT:    s_waitcnt lgkmcnt(0)
32; CHECK-NEXT:    v_mov_b32_e32 v0, s0
33; CHECK-NEXT:    v_mov_b32_e32 v1, s1
34; CHECK-NEXT:    flat_store_dword v[0:1], v2
35; CHECK-NEXT:    s_endpgm
36; CHECK-NEXT:  BB2_2: ; %then
37; CHECK-NEXT:    s_endpgm
38  %cond = icmp sgt i32 %x, 0
39  br i1 %cond, label %then, label %else
40
41then:
42  tail call void @llvm.amdgcn.endpgm()
43  unreachable
44
45else:
46  store i32 %x, i32* %p
47  ret void
48}
49
50declare void @llvm.amdgcn.endpgm()
51