1; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
2; RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx900 -filetype=obj -o %t.o < %s && llvm-readobj -relocations %t.o | FileCheck --check-prefix=ELF %s
3
4; RUN: llc -global-isel -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
5; RUN: llc -global-isel -mtriple=amdgcn--amdpal -mcpu=gfx900 -filetype=obj -o %t.o < %s && llvm-readobj -relocations %t.o | FileCheck --check-prefix=ELF %s
6
7; GCN-LABEL: {{^}}ps_main:
8; GCN: v_mov_b32_{{.*}} v[[relocreg:[0-9]+]], doff_0_0_b@abs32@lo
9; GCN-NEXT: exp {{.*}} v[[relocreg]], {{.*}}
10; GCN-NEXT: s_endpgm
11; GCN-NEXT: .Lfunc_end
12
13; ELF: Relocations [
14; ELF-NEXT: Section (3) .rel.text {
15; ELF-NEXT: 0x{{[0-9]+}} R_AMDGPU_ABS32 doff_0_0_b {{.*}}
16
17define amdgpu_ps void @ps_main(i32 %arg, i32 inreg %arg1, i32 inreg %arg2) local_unnamed_addr #0 {
18  %rc = call i32 @llvm.amdgcn.reloc.constant(metadata !1)
19  %rcf = bitcast i32 %rc to float
20  call void @llvm.amdgcn.exp.f32(i32 immarg 40, i32 immarg 15, float %rcf, float undef, float undef, float undef, i1 immarg false, i1 immarg false) #0
21  ret void
22}
23
24; Function Attrs: inaccessiblememonly nounwind
25declare void @llvm.amdgcn.exp.f32(i32 immarg, i32 immarg, float, float, float, float, i1 immarg, i1 immarg) #1
26
27; Function Attrs: nounwind readnone speculatable
28declare i32 @llvm.amdgcn.reloc.constant(metadata) #2
29
30attributes #0 = { nounwind }
31attributes #1 = { inaccessiblememonly nounwind }
32attributes #2 = { nounwind readnone speculatable }
33
34!1 = !{!"doff_0_0_b"}
35