1; RUN: llc -march=amdgcn -mcpu=tahiti -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
2
3; SI-LABEL: {{^}}s_or_to_orn2:
4; SI: s_orn2_b32 s{{[0-9]+}}, s{{[0-9]+}}, 50
5define amdgpu_kernel void @s_or_to_orn2(i32 addrspace(1)* %out, i32 %in) {
6  %x = or i32 %in, -51
7  store i32 %x, i32 addrspace(1)* %out
8  ret void
9}
10
11; SI-LABEL: {{^}}s_or_to_orn2_imm0:
12; SI: s_orn2_b32 s{{[0-9]+}}, s{{[0-9]+}}, 50
13define amdgpu_kernel void @s_or_to_orn2_imm0(i32 addrspace(1)* %out, i32 %in) {
14  %x = or i32 -51, %in
15  store i32 %x, i32 addrspace(1)* %out
16  ret void
17}
18
19; SI-LABEL: {{^}}s_and_to_andn2:
20; SI: s_andn2_b32 s{{[0-9]+}}, s{{[0-9]+}}, 50
21define amdgpu_kernel void @s_and_to_andn2(i32 addrspace(1)* %out, i32 %in) {
22  %x = and i32 %in, -51
23  store i32 %x, i32 addrspace(1)* %out
24  ret void
25}
26
27; SI-LABEL: {{^}}s_and_to_andn2_imm0:
28; SI: s_andn2_b32 s{{[0-9]+}}, s{{[0-9]+}}, 50
29define amdgpu_kernel void @s_and_to_andn2_imm0(i32 addrspace(1)* %out, i32 %in) {
30  %x = and i32 -51, %in
31  store i32 %x, i32 addrspace(1)* %out
32  ret void
33}
34
35; SI-LABEL: {{^}}s_xor_to_xnor:
36; SI: s_xnor_b32 s{{[0-9]+}}, s{{[0-9]+}}, 50
37define amdgpu_kernel void @s_xor_to_xnor(i32 addrspace(1)* %out, i32 %in) {
38  %x = xor i32 %in, -51
39  store i32 %x, i32 addrspace(1)* %out
40  ret void
41}
42
43; SI-LABEL: {{^}}s_xor_to_xnor_imm0:
44; SI: s_xnor_b32 s{{[0-9]+}}, s{{[0-9]+}}, 50
45define amdgpu_kernel void @s_xor_to_xnor_imm0(i32 addrspace(1)* %out, i32 %in) {
46  %x = xor i32 -51, %in
47  store i32 %x, i32 addrspace(1)* %out
48  ret void
49}
50