1; RUN: llc -O0 -march=amdgcn -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCNNOOPT -check-prefix=GCN %s 2; RUN: llc -O0 -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCNNOOPT -check-prefix=GCN %s 3; RUN: llc -O0 -march=amdgcn -mcpu=gfx1010 -mattr=-flat-for-global,-wavefrontsize32,+wavefrontsize64 -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCNNOOPT -check-prefix=GCN %s 4; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCNOPT -check-prefix=GCN %s 5; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCNOPT -check-prefix=GCN %s 6 7; GCN-LABEL: {{^}}test_branch: 8; GCNNOOPT: v_writelane_b32 9; GCNNOOPT: v_writelane_b32 10; GCN: s_cbranch_scc1 [[END:BB[0-9]+_[0-9]+]] 11 12; GCNNOOPT: v_readlane_b32 13; GCNNOOPT: v_readlane_b32 14; GCN: buffer_store_dword 15; GCNNOOPT: s_endpgm 16 17; GCN: {{^}}[[END]]: 18; GCN: s_endpgm 19define amdgpu_kernel void @test_branch(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %in, i32 %val) #0 { 20 %cmp = icmp ne i32 %val, 0 21 br i1 %cmp, label %store, label %end 22 23store: 24 store i32 222, i32 addrspace(1)* %out 25 ret void 26 27end: 28 ret void 29} 30 31; GCN-LABEL: {{^}}test_brcc_i1: 32; GCN: s_load_dword [[VAL:s[0-9]+]] 33; GCNNOOPT: s_mov_b32 [[ONE:s[0-9]+]], 1{{$}} 34; GCNNOOPT: s_and_b32 s{{[0-9]+}}, [[VAL]], [[ONE]] 35; GCNOPT: s_and_b32 s{{[0-9]+}}, [[VAL]], 1 36; GCN: s_cmp_eq_u32 37; GCN: s_cbranch_scc1 [[END:BB[0-9]+_[0-9]+]] 38 39; GCN: buffer_store_dword 40 41; GCN: {{^}}[[END]]: 42; GCN: s_endpgm 43define amdgpu_kernel void @test_brcc_i1(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %in, i1 %val) #0 { 44 %cmp0 = icmp ne i1 %val, 0 45 br i1 %cmp0, label %store, label %end 46 47store: 48 store i32 222, i32 addrspace(1)* %out 49 ret void 50 51end: 52 ret void 53} 54 55attributes #0 = { nounwind } 56