1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass simple-register-coalescing -verify-machineinstrs -o - %s | FileCheck %s 3# 4# The failure occurs when the coalescer tries to removePartialRedundency() on the 5# "%2:vreg_64 = COPY %3" in bb.1. The coalescer tries to prune and extend each 6# subrange of %2, the subrange for %2.sub1 has a def location (in bb.2) in the 7# predecessor path 2->3->1. But for another predecessor path 0->4->1, 8# the subrange has only one undef location in bb.0. If we don't compute Undef set, 9# it will fail to find the reaching def for %2.sub1 in predecessor bb.4 and bb.0 10# and crash with error message: 11# "Use of $noreg does not have a corresponding definition on every path 12# LLVM ERROR: Use not jointly dominated by defs" 13 14--- 15name: _amdgpu_ps_main 16alignment: 1 17tracksRegLiveness: true 18body: | 19 ; CHECK-LABEL: name: _amdgpu_ps_main 20 ; CHECK: bb.0: 21 ; CHECK: successors: %bb.2(0x40000000), %bb.4(0x40000000) 22 ; CHECK: liveins: $sgpr2, $sgpr3, $vgpr3 23 ; CHECK: [[COPY:%[0-9]+]]:sgpr_32 = COPY $sgpr2 24 ; CHECK: undef %1.sub0:vreg_64 = COPY [[COPY]] 25 ; CHECK: undef %2.sub0:vreg_64 = COPY [[COPY]] 26 ; CHECK: S_CBRANCH_VCCNZ %bb.2, implicit undef $vcc 27 ; CHECK: S_BRANCH %bb.4 28 ; CHECK: bb.1: 29 ; CHECK: successors: %bb.2(0x80000000) 30 ; CHECK: S_NOP 0, implicit %2.sub0 31 ; CHECK: bb.2: 32 ; CHECK: successors: %bb.3(0x04000000), %bb.2(0x7c000000) 33 ; CHECK: [[COPY1:%[0-9]+]]:vreg_64 = COPY %2 34 ; CHECK: %1.sub0:vreg_64 = COPY [[COPY1]].sub0 35 ; CHECK: %2:vreg_64 = COPY %1 36 ; CHECK: S_CBRANCH_EXECNZ %bb.2, implicit undef $exec 37 ; CHECK: S_BRANCH %bb.3 38 ; CHECK: bb.3: 39 ; CHECK: successors: %bb.1(0x80000000) 40 ; CHECK: %2:vreg_64 = COPY [[COPY1]] 41 ; CHECK: S_BRANCH %bb.1 42 ; CHECK: bb.4: 43 ; CHECK: successors: %bb.1(0x80000000) 44 ; CHECK: S_BRANCH %bb.1 45 bb.0: 46 liveins: $sgpr2, $sgpr3, $vgpr3 47 48 %0:sgpr_32 = COPY $sgpr2 49 undef %1.sub0:vreg_64 = COPY %0 50 undef %2.sub0:vreg_64 = COPY %0 51 S_CBRANCH_VCCNZ %bb.2, implicit undef $vcc 52 S_BRANCH %bb.4 53 54 bb.1: 55 %2:vreg_64 = COPY %3 56 S_NOP 0, implicit %2.sub0 57 58 bb.2: 59 successors: %bb.3(0x04000000), %bb.2(0x7c000000) 60 61 %3:vreg_64 = COPY %2 62 %1.sub0:vreg_64 = COPY %3.sub0 63 %2:vreg_64 = COPY %1 64 S_CBRANCH_EXECNZ %bb.2, implicit undef $exec 65 S_BRANCH %bb.3 66 67 bb.3: 68 S_BRANCH %bb.1 69 70 bb.4: 71 %3:vreg_64 = COPY %2 72 S_BRANCH %bb.1 73 74... 75