1; RUN: llc -march=amdgcn -mcpu=gfx902 -verify-machineinstrs -stop-after=si-form-memory-clauses < %s | FileCheck -check-prefix=GCN %s
2
3; GCN-LABEL: {{^}}name:{{[ 	]*}}vector_clause
4; GCN:      BUNDLE
5; GCN-NEXT: LOAD_DWORDX2
6; GCN-NEXT: LOAD_DWORDX2
7; GCN-NEXT: {{^ *[}]}}
8define amdgpu_kernel void @vector_clause(<4 x i32> addrspace(1)* noalias nocapture readonly %arg, <4 x i32> addrspace(1)* noalias nocapture %arg1) {
9bb:
10  %tmp = tail call i32 @llvm.amdgcn.workitem.id.x()
11  %tmp2 = zext i32 %tmp to i64
12  %tmp3 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg, i64 %tmp2
13  %tmp4 = load <4 x i32>, <4 x i32> addrspace(1)* %tmp3, align 16
14  %tmp5 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg1, i64 %tmp2
15  %tmp6 = add nuw nsw i64 %tmp2, 1
16  %tmp7 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg, i64 %tmp6
17  %tmp8 = load <4 x i32>, <4 x i32> addrspace(1)* %tmp7, align 16
18  %tmp9 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg1, i64 %tmp6
19  %tmp10 = add nuw nsw i64 %tmp2, 2
20  %tmp11 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg, i64 %tmp10
21  %tmp12 = load <4 x i32>, <4 x i32> addrspace(1)* %tmp11, align 16
22  %tmp13 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg1, i64 %tmp10
23  %tmp14 = add nuw nsw i64 %tmp2, 3
24  %tmp15 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg, i64 %tmp14
25  %tmp16 = load <4 x i32>, <4 x i32> addrspace(1)* %tmp15, align 16
26  %tmp17 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg1, i64 %tmp14
27  store <4 x i32> %tmp4, <4 x i32> addrspace(1)* %tmp5, align 16
28  store <4 x i32> %tmp8, <4 x i32> addrspace(1)* %tmp9, align 16
29  store <4 x i32> %tmp12, <4 x i32> addrspace(1)* %tmp13, align 16
30  store <4 x i32> %tmp16, <4 x i32> addrspace(1)* %tmp17, align 16
31  ret void
32}
33
34; GCN-LABEL: {{^}}name:{{[ 	]*}}no_vector_clause
35; GCN-NOT:   BUNDLE
36define amdgpu_kernel void @no_vector_clause(<4 x i32> addrspace(1)* noalias nocapture readonly %arg, <4 x i32> addrspace(1)* noalias nocapture %arg1) #0 {
37bb:
38  %tmp = tail call i32 @llvm.amdgcn.workitem.id.x()
39  %tmp2 = zext i32 %tmp to i64
40  %tmp3 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg, i64 %tmp2
41  %tmp4 = load <4 x i32>, <4 x i32> addrspace(1)* %tmp3, align 16
42  %tmp5 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg1, i64 %tmp2
43  %tmp6 = add nuw nsw i64 %tmp2, 1
44  %tmp7 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg, i64 %tmp6
45  %tmp8 = load <4 x i32>, <4 x i32> addrspace(1)* %tmp7, align 16
46  %tmp9 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg1, i64 %tmp6
47  %tmp10 = add nuw nsw i64 %tmp2, 2
48  %tmp11 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg, i64 %tmp10
49  %tmp12 = load <4 x i32>, <4 x i32> addrspace(1)* %tmp11, align 16
50  %tmp13 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg1, i64 %tmp10
51  %tmp14 = add nuw nsw i64 %tmp2, 3
52  %tmp15 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg, i64 %tmp14
53  %tmp16 = load <4 x i32>, <4 x i32> addrspace(1)* %tmp15, align 16
54  %tmp17 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg1, i64 %tmp14
55  store <4 x i32> %tmp4, <4 x i32> addrspace(1)* %tmp5, align 16
56  store <4 x i32> %tmp8, <4 x i32> addrspace(1)* %tmp9, align 16
57  store <4 x i32> %tmp12, <4 x i32> addrspace(1)* %tmp13, align 16
58  store <4 x i32> %tmp16, <4 x i32> addrspace(1)* %tmp17, align 16
59  ret void
60}
61
62declare i32 @llvm.amdgcn.workitem.id.x()
63
64attributes #0 = { "amdgpu-max-memory-clause"="1" }
65
66