1; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck %s
2
3; CHECK: FLOOR * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
4define amdgpu_ps void @test(<4 x float> inreg %reg0) {
5   %r0 = extractelement <4 x float> %reg0, i32 0
6   %r1 = call float @floor(float %r0)
7   %vec = insertelement <4 x float> undef, float %r1, i32 0
8   call void @llvm.r600.store.swizzle(<4 x float> %vec, i32 0, i32 0)
9   ret void
10}
11
12declare float @floor(float) readonly
13declare void @llvm.r600.store.swizzle(<4 x float>, i32, i32)
14
15