1; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
2
3; GCN-LABEL: {{^}}fold_mul_neg:
4; GCN: load_dword [[V:v[0-9]+]]
5; GCN: v_or_b32_e32 [[NEG:v[0-9]]], 0x80000000, [[V]]
6; GCN: store_dword [[NEG]]
7
8define amdgpu_kernel void @fold_mul_neg(float addrspace(1)* %arg) {
9  %tid = tail call i32 @llvm.amdgcn.workitem.id.x()
10  %gep = getelementptr inbounds float, float addrspace(1)* %arg, i32 %tid
11  %v = load float, float addrspace(1)* %gep, align 4
12  %cmp = fcmp fast ogt float %v, 0.000000e+00
13  %sel = select i1 %cmp, float -1.000000e+00, float 1.000000e+00
14  %mul = fmul fast float %v, %sel
15  store float %mul, float addrspace(1)* %gep, align 4
16  ret void
17}
18
19; GCN-LABEL: {{^}}fold_mul_abs:
20; GCN: load_dword [[V:v[0-9]+]]
21; GCN: v_and_b32_e32 [[ABS:v[0-9]]], 0x7fffffff, [[V]]
22; GCN: store_dword [[ABS]]
23
24define amdgpu_kernel void @fold_mul_abs(float addrspace(1)* %arg) {
25  %tid = tail call i32 @llvm.amdgcn.workitem.id.x()
26  %gep = getelementptr inbounds float, float addrspace(1)* %arg, i32 %tid
27  %v = load float, float addrspace(1)* %gep, align 4
28  %cmp = fcmp fast olt float %v, 0.000000e+00
29  %sel = select i1 %cmp, float -1.000000e+00, float 1.000000e+00
30  %mul = fmul fast float %v, %sel
31  store float %mul, float addrspace(1)* %gep, align 4
32  ret void
33}
34
35declare i32 @llvm.amdgcn.workitem.id.x() #0
36
37attributes #0 = { nounwind readnone speculatable }
38