1; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
2; RUN: llc -march=amdgcn -mcpu=bonaire -verify-machineinstrs < %s | FileCheck -check-prefix=CI -check-prefix=FUNC %s
3
4declare i32 @llvm.amdgcn.workitem.id.x() #1
5declare double @llvm.fabs.f64(double) #1
6
7; SI-LABEL: {{^}}fp_to_uint_i32_f64:
8; SI: v_cvt_u32_f64_e32
9define amdgpu_kernel void @fp_to_uint_i32_f64(i32 addrspace(1)* %out, double %in) {
10  %cast = fptoui double %in to i32
11  store i32 %cast, i32 addrspace(1)* %out, align 4
12  ret void
13}
14
15; SI-LABEL: @fp_to_uint_v2i32_v2f64
16; SI: v_cvt_u32_f64_e32
17; SI: v_cvt_u32_f64_e32
18define amdgpu_kernel void @fp_to_uint_v2i32_v2f64(<2 x i32> addrspace(1)* %out, <2 x double> %in) {
19  %cast = fptoui <2 x double> %in to <2 x i32>
20  store <2 x i32> %cast, <2 x i32> addrspace(1)* %out, align 8
21  ret void
22}
23
24; SI-LABEL: @fp_to_uint_v4i32_v4f64
25; SI: v_cvt_u32_f64_e32
26; SI: v_cvt_u32_f64_e32
27; SI: v_cvt_u32_f64_e32
28; SI: v_cvt_u32_f64_e32
29define amdgpu_kernel void @fp_to_uint_v4i32_v4f64(<4 x i32> addrspace(1)* %out, <4 x double> %in) {
30  %cast = fptoui <4 x double> %in to <4 x i32>
31  store <4 x i32> %cast, <4 x i32> addrspace(1)* %out, align 8
32  ret void
33}
34
35; FUNC-LABEL: @fp_to_uint_i64_f64
36; CI-DAG: buffer_load_dwordx2 [[VAL:v\[[0-9]+:[0-9]+\]]]
37; CI-DAG: v_trunc_f64_e32 [[TRUNC:v\[[0-9]+:[0-9]+\]]], [[VAL]]
38; CI-DAG: s_mov_b32 s[[K0_LO:[0-9]+]], 0{{$}}
39; CI-DAG: s_mov_b32 s[[K0_HI:[0-9]+]], 0x3df00000
40
41; CI-DAG: v_mul_f64 [[MUL:v\[[0-9]+:[0-9]+\]]], [[VAL]], s{{\[}}[[K0_LO]]:[[K0_HI]]{{\]}}
42; CI-DAG: v_floor_f64_e32 [[FLOOR:v\[[0-9]+:[0-9]+\]]], [[MUL]]
43
44; CI-DAG: s_mov_b32 s[[K1_HI:[0-9]+]], 0xc1f00000
45
46; CI-DAG: v_fma_f64 [[FMA:v\[[0-9]+:[0-9]+\]]], [[FLOOR]], s{{\[[0-9]+}}:[[K1_HI]]{{\]}}, [[TRUNC]]
47; CI-DAG: v_cvt_u32_f64_e32 v[[LO:[0-9]+]], [[FMA]]
48; CI-DAG: v_cvt_u32_f64_e32 v[[HI:[0-9]+]], [[FLOOR]]
49; CI: buffer_store_dwordx2 v{{\[}}[[LO]]:[[HI]]{{\]}}
50define amdgpu_kernel void @fp_to_uint_i64_f64(i64 addrspace(1)* %out, double addrspace(1)* %in) {
51  %tid = call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone
52  %gep = getelementptr double, double addrspace(1)* %in, i32 %tid
53  %val = load double, double addrspace(1)* %gep, align 8
54  %cast = fptoui double %val to i64
55  store i64 %cast, i64 addrspace(1)* %out, align 4
56  ret void
57}
58
59; SI-LABEL: @fp_to_uint_v2i64_v2f64
60define amdgpu_kernel void @fp_to_uint_v2i64_v2f64(<2 x i64> addrspace(1)* %out, <2 x double> %in) {
61  %cast = fptoui <2 x double> %in to <2 x i64>
62  store <2 x i64> %cast, <2 x i64> addrspace(1)* %out, align 16
63  ret void
64}
65
66; SI-LABEL: @fp_to_uint_v4i64_v4f64
67define amdgpu_kernel void @fp_to_uint_v4i64_v4f64(<4 x i64> addrspace(1)* %out, <4 x double> %in) {
68  %cast = fptoui <4 x double> %in to <4 x i64>
69  store <4 x i64> %cast, <4 x i64> addrspace(1)* %out, align 32
70  ret void
71}
72
73; FUNC-LABEL: {{^}}fp_to_uint_f64_to_i1:
74; SI: v_cmp_eq_f64_e64 s{{\[[0-9]+:[0-9]+\]}}, 1.0, s{{\[[0-9]+:[0-9]+\]}}
75define amdgpu_kernel void @fp_to_uint_f64_to_i1(i1 addrspace(1)* %out, double %in) #0 {
76  %conv = fptoui double %in to i1
77  store i1 %conv, i1 addrspace(1)* %out
78  ret void
79}
80
81; FUNC-LABEL: {{^}}fp_to_uint_fabs_f64_to_i1:
82; SI: v_cmp_eq_f64_e64 s{{\[[0-9]+:[0-9]+\]}}, 1.0, |s{{\[[0-9]+:[0-9]+\]}}|
83define amdgpu_kernel void @fp_to_uint_fabs_f64_to_i1(i1 addrspace(1)* %out, double %in) #0 {
84  %in.fabs = call double @llvm.fabs.f64(double %in)
85  %conv = fptoui double %in.fabs to i1
86  store i1 %conv, i1 addrspace(1)* %out
87  ret void
88}
89
90attributes #0 = { nounwind }
91attributes #1 = { nounwind readnone }
92