1; RUN: not llc < %s -march=amdgcn -mcpu=bonaire -verify-machineinstrs | FileCheck --check-prefix=GCN %s 2; RUN: not llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck --check-prefix=GCN --check-prefix=VI %s 3 4; RUN: not llc < %s -march=amdgcn -mcpu=bonaire -verify-machineinstrs 2>&1 | FileCheck --check-prefix=NOGCN --check-prefix=NOSI %s 5; RUN: not llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs 2>&1 | FileCheck --check-prefix=NOGCN %s 6 7; GCN-LABEL: {{^}}inline_reg_constraints: 8; GCN: flat_load_dword v{{[0-9]+}}, v[{{[0-9]+:[0-9]+}}] 9; GCN: flat_load_dwordx2 v[{{[0-9]+:[0-9]+}}], v[{{[0-9]+:[0-9]+}}] 10; GCN: flat_load_dwordx2 v[{{[0-9]+:[0-9]+}}], v[{{[0-9]+:[0-9]+}}] 11; GCN: flat_load_dwordx4 v[{{[0-9]+:[0-9]+}}], v[{{[0-9]+:[0-9]+}}] 12; GCN: flat_load_dwordx4 v[{{[0-9]+:[0-9]+}}], v[{{[0-9]+:[0-9]+}}] 13; GCN: s_load_dword s{{[0-9]+}}, s[{{[0-9]+:[0-9]+}}] 14; GCN: s_load_dwordx2 s[{{[0-9]+:[0-9]+}}], s[{{[0-9]+:[0-9]+}}] 15; GCN: s_load_dwordx2 s[{{[0-9]+:[0-9]+}}], s[{{[0-9]+:[0-9]+}}] 16; GCN: s_load_dwordx4 s[{{[0-9]+:[0-9]+}}], s[{{[0-9]+:[0-9]+}}] 17; GCN: s_load_dwordx4 s[{{[0-9]+:[0-9]+}}], s[{{[0-9]+:[0-9]+}}] 18; GCN: s_load_dwordx8 s[{{[0-9]+:[0-9]+}}], s[{{[0-9]+:[0-9]+}}] 19 20define amdgpu_kernel void @inline_reg_constraints(i32 addrspace(1)* %ptr) { 21entry: 22 %v32 = tail call i32 asm sideeffect "flat_load_dword $0, $1", "=v,v"(i32 addrspace(1)* %ptr) 23 %v2_32 = tail call <2 x i32> asm sideeffect "flat_load_dwordx2 $0, $1", "=v,v"(i32 addrspace(1)* %ptr) 24 %v64 = tail call i64 asm sideeffect "flat_load_dwordx2 $0, $1", "=v,v"(i32 addrspace(1)* %ptr) 25 %v4_32 = tail call <4 x i32> asm sideeffect "flat_load_dwordx4 $0, $1", "=v,v"(i32 addrspace(1)* %ptr) 26 %v128 = tail call i128 asm sideeffect "flat_load_dwordx4 $0, $1", "=v,v"(i32 addrspace(1)* %ptr) 27 %s32 = tail call i32 asm sideeffect "s_load_dword $0, $1", "=s,s"(i32 addrspace(1)* %ptr) 28 %s32_2 = tail call <2 x i32> asm sideeffect "s_load_dwordx2 $0, $1", "=s,s"(i32 addrspace(1)* %ptr) 29 %s64 = tail call i64 asm sideeffect "s_load_dwordx2 $0, $1", "=s,s"(i32 addrspace(1)* %ptr) 30 %s4_32 = tail call <4 x i32> asm sideeffect "s_load_dwordx4 $0, $1", "=s,s"(i32 addrspace(1)* %ptr) 31 %s128 = tail call i128 asm sideeffect "s_load_dwordx4 $0, $1", "=s,s"(i32 addrspace(1)* %ptr) 32 %s256 = tail call <8 x i32> asm sideeffect "s_load_dwordx8 $0, $1", "=s,s"(i32 addrspace(1)* %ptr) 33 ret void 34} 35 36; GCN-LABEL: {{^}}inline_sreg_constraint_m0: 37; GCN: s_mov_b32 m0, -1 38; GCN-NOT: m0 39; GCN: ; use m0 40define amdgpu_kernel void @inline_sreg_constraint_m0() { 41 %m0 = tail call i32 asm sideeffect "s_mov_b32 m0, -1", "={m0}"() 42 tail call void asm sideeffect "; use $0", "s"(i32 %m0) 43 ret void 44} 45 46; GCN-LABEL: {{^}}inline_sreg_constraint_imm_i32: 47; GCN: s_mov_b32 [[REG:s[0-9]+]], 32 48; GCN: ; use [[REG]] 49define amdgpu_kernel void @inline_sreg_constraint_imm_i32() { 50 tail call void asm sideeffect "; use $0", "s"(i32 32) 51 ret void 52} 53 54; GCN-LABEL: {{^}}inline_sreg_constraint_imm_f32: 55; GCN: s_mov_b32 [[REG:s[0-9]+]], 1.0 56; GCN: ; use [[REG]] 57define amdgpu_kernel void @inline_sreg_constraint_imm_f32() { 58 tail call void asm sideeffect "; use $0", "s"(float 1.0) 59 ret void 60} 61 62; FIXME: Should be able to use s_mov_b64 63; GCN-LABEL: {{^}}inline_sreg_constraint_imm_i64: 64; GCN-DAG: s_mov_b32 s[[REG_LO:[0-9]+]], -4{{$}} 65; GCN-DAG: s_mov_b32 s[[REG_HI:[0-9]+]], -1{{$}} 66; GCN: ; use s{{\[}}[[REG_LO]]:[[REG_HI]]{{\]}} 67define amdgpu_kernel void @inline_sreg_constraint_imm_i64() { 68 tail call void asm sideeffect "; use $0", "s"(i64 -4) 69 ret void 70} 71 72; GCN-LABEL: {{^}}inline_sreg_constraint_imm_f64: 73; GCN-DAG: s_mov_b32 s[[REG_LO:[0-9]+]], 0{{$}} 74; GCN-DAG: s_mov_b32 s[[REG_HI:[0-9]+]], 0x3ff00000{{$}} 75; GCN: ; use s{{\[}}[[REG_LO]]:[[REG_HI]]{{\]}} 76define amdgpu_kernel void @inline_sreg_constraint_imm_f64() { 77 tail call void asm sideeffect "; use $0", "s"(double 1.0) 78 ret void 79} 80 81;============================================================================== 82; 'A' constraint, 16-bit operand 83;============================================================================== 84 85; NOSI: error: invalid operand for inline asm constraint 'A' 86; VI-LABEL: {{^}}inline_A_constraint_H0: 87; VI: v_mov_b32 {{v[0-9]+}}, 64 88define i32 @inline_A_constraint_H0() { 89 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(i16 64) 90 ret i32 %v0 91} 92 93; NOSI: error: invalid operand for inline asm constraint 'A' 94; VI-LABEL: {{^}}inline_A_constraint_H1: 95; VI: v_mov_b32 {{v[0-9]+}}, -16 96define i32 @inline_A_constraint_H1() { 97 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(i16 -16) 98 ret i32 %v0 99} 100 101; NOSI: error: invalid operand for inline asm constraint 'A' 102; VI-LABEL: {{^}}inline_A_constraint_H2: 103; VI: v_mov_b32 {{v[0-9]+}}, 0x3c00 104define i32 @inline_A_constraint_H2() { 105 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(i16 bitcast (half 1.0 to i16)) 106 ret i32 %v0 107} 108 109; NOSI: error: invalid operand for inline asm constraint 'A' 110; VI-LABEL: {{^}}inline_A_constraint_H3: 111; VI: v_mov_b32 {{v[0-9]+}}, 0xbc00 112define i32 @inline_A_constraint_H3() { 113 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(i16 bitcast (half -1.0 to i16)) 114 ret i32 %v0 115} 116 117; NOSI: error: invalid operand for inline asm constraint 'A' 118; VI-LABEL: {{^}}inline_A_constraint_H4: 119; VI: v_mov_b32 {{v[0-9]+}}, 0x3118 120define i32 @inline_A_constraint_H4() { 121 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(half 0xH3118) 122 ret i32 %v0 123} 124 125; NOSI: error: invalid operand for inline asm constraint 'A' 126; VI-LABEL: {{^}}inline_A_constraint_H5: 127; VI: v_mov_b32 {{v[0-9]+}}, 0x3118 128define i32 @inline_A_constraint_H5() { 129 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(i16 bitcast (half 0xH3118 to i16)) 130 ret i32 %v0 131} 132 133; NOSI: error: invalid operand for inline asm constraint 'A' 134; VI-LABEL: {{^}}inline_A_constraint_H6: 135; VI: v_mov_b32 {{v[0-9]+}}, 0xb800 136define i32 @inline_A_constraint_H6() { 137 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(half -0.5) 138 ret i32 %v0 139} 140 141; NOGCN: error: invalid operand for inline asm constraint 'A' 142define i32 @inline_A_constraint_H7() { 143 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(i16 bitcast (half 0xH3119 to i16)) 144 ret i32 %v0 145} 146 147; NOGCN: error: invalid operand for inline asm constraint 'A' 148define i32 @inline_A_constraint_H8() { 149 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(i16 bitcast (half 0xH3117 to i16)) 150 ret i32 %v0 151} 152 153; NOGCN: error: invalid operand for inline asm constraint 'A' 154define i32 @inline_A_constraint_H9() { 155 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(i16 65) 156 ret i32 %v0 157} 158 159;============================================================================== 160; 'A' constraint, 32-bit operand 161;============================================================================== 162 163; GCN-LABEL: {{^}}inline_A_constraint_F0: 164; GCN: v_mov_b32 {{v[0-9]+}}, -16 165define i32 @inline_A_constraint_F0() { 166 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(i32 -16) 167 ret i32 %v0 168} 169 170; GCN-LABEL: {{^}}inline_A_constraint_F1: 171; GCN: v_mov_b32 {{v[0-9]+}}, 1 172define i32 @inline_A_constraint_F1() { 173 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(i32 1) 174 ret i32 %v0 175} 176 177; GCN-LABEL: {{^}}inline_A_constraint_F2: 178; GCN: v_mov_b32 {{v[0-9]+}}, 0xbf000000 179define i32 @inline_A_constraint_F2() { 180 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(i32 bitcast (float -0.5 to i32)) 181 ret i32 %v0 182} 183 184; GCN-LABEL: {{^}}inline_A_constraint_F3: 185; GCN: v_mov_b32 {{v[0-9]+}}, 0x40000000 186define i32 @inline_A_constraint_F3() { 187 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(i32 bitcast (float 2.0 to i32)) 188 ret i32 %v0 189} 190 191; GCN-LABEL: {{^}}inline_A_constraint_F4: 192; GCN: v_mov_b32 {{v[0-9]+}}, 0xc0800000 193define i32 @inline_A_constraint_F4() { 194 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(float -4.0) 195 ret i32 %v0 196} 197 198; NOSI: error: invalid operand for inline asm constraint 'A' 199; VI-LABEL: {{^}}inline_A_constraint_F5: 200; VI: v_mov_b32 {{v[0-9]+}}, 0x3e22f983 201define i32 @inline_A_constraint_F5() { 202 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(i32 1042479491) 203 ret i32 %v0 204} 205 206; GCN-LABEL: {{^}}inline_A_constraint_F6: 207; GCN: v_mov_b32 {{v[0-9]+}}, 0x3f000000 208define i32 @inline_A_constraint_F6() { 209 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(float 0.5) 210 ret i32 %v0 211} 212 213; NOGCN: error: invalid operand for inline asm constraint 'A' 214define i32 @inline_A_constraint_F7() { 215 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(i32 1042479490) 216 ret i32 %v0 217} 218 219; NOGCN: error: invalid operand for inline asm constraint 'A' 220define i32 @inline_A_constraint_F8() { 221 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(i32 -17) 222 ret i32 %v0 223} 224 225;============================================================================== 226; 'A' constraint, 64-bit operand 227;============================================================================== 228 229; GCN-LABEL: {{^}}inline_A_constraint_D0: 230; GCN: v_mov_b32 {{v[0-9]+}}, -16 231define i32 @inline_A_constraint_D0() { 232 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(i64 -16) 233 ret i32 %v0 234} 235 236; GCN-LABEL: {{^}}inline_A_constraint_D1: 237; GCN: v_cvt_f32_f64 {{v[0-9]+}}, 0xc000000000000000 238define i32 @inline_A_constraint_D1() { 239 %v0 = tail call i32 asm "v_cvt_f32_f64 $0, $1", "=v,A"(i64 bitcast (double -2.0 to i64)) 240 ret i32 %v0 241} 242 243; GCN-LABEL: {{^}}inline_A_constraint_D2: 244; GCN: v_cvt_f32_f64 {{v[0-9]+}}, 0x3fe0000000000000 245define i32 @inline_A_constraint_D2() { 246 %v0 = tail call i32 asm "v_cvt_f32_f64 $0, $1", "=v,A"(double 0.5) 247 ret i32 %v0 248} 249 250; NOSI: error: invalid operand for inline asm constraint 'A' 251; VI-LABEL: {{^}}inline_A_constraint_D3: 252; VI: v_cvt_f32_f64 {{v[0-9]+}}, 0x3fc45f306dc9c882 253define i32 @inline_A_constraint_D3() { 254 %v0 = tail call i32 asm "v_cvt_f32_f64 $0, $1", "=v,A"(double 0.15915494309189532) 255 ret i32 %v0 256} 257 258; NOSI: error: invalid operand for inline asm constraint 'A' 259; VI-LABEL: {{^}}inline_A_constraint_D4: 260; VI: v_cvt_f32_f64 {{v[0-9]+}}, 0x3fc45f306dc9c882 261define i32 @inline_A_constraint_D4() { 262 %v0 = tail call i32 asm "v_cvt_f32_f64 $0, $1", "=v,A"(i64 bitcast (double 0.15915494309189532 to i64)) 263 ret i32 %v0 264} 265 266; GCN-LABEL: {{^}}inline_A_constraint_D5: 267; GCN: v_cvt_f32_f64 {{v[0-9]+}}, 0xc000000000000000 268define i32 @inline_A_constraint_D5() { 269 %v0 = tail call i32 asm "v_cvt_f32_f64 $0, $1", "=v,A"(double -2.0) 270 ret i32 %v0 271} 272 273; NOGCN: error: invalid operand for inline asm constraint 'A' 274define i32 @inline_A_constraint_D8() { 275 %v0 = tail call i32 asm "v_cvt_f32_f64 $0, $1", "=v,A"(double 1.1) 276 ret i32 %v0 277} 278 279; NOGCN: error: invalid operand for inline asm constraint 'A' 280define i32 @inline_A_constraint_D9() { 281 %v0 = tail call i32 asm "v_cvt_f32_f64 $0, $1", "=v,A"(i64 bitcast (double 0.1 to i64)) 282 ret i32 %v0 283} 284 285;============================================================================== 286; 'A' constraint, v2x16 operand 287;============================================================================== 288 289; NOSI: error: invalid operand for inline asm constraint 'A' 290; VI-LABEL: {{^}}inline_A_constraint_V0: 291; VI: v_mov_b32 {{v[0-9]+}}, -4 292define i32 @inline_A_constraint_V0() { 293 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(<2 x i16> <i16 -4, i16 -4>) 294 ret i32 %v0 295} 296 297; NOSI: error: invalid operand for inline asm constraint 'A' 298; VI-LABEL: {{^}}inline_A_constraint_V1: 299; VI: v_mov_b32 {{v[0-9]+}}, 0xb800 300define i32 @inline_A_constraint_V1() { 301 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(<2 x half> <half -0.5, half -0.5>) 302 ret i32 %v0 303} 304 305; NOGCN: error: invalid operand for inline asm constraint 'A' 306define i32 @inline_A_constraint_V2() { 307 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(<2 x i16> <i16 -4, i16 undef>) 308 ret i32 %v0 309} 310 311; NOGCN: error: invalid operand for inline asm constraint 'A' 312define i32 @inline_A_constraint_V3() { 313 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(<2 x half> <half undef, half -0.5>) 314 ret i32 %v0 315} 316 317; NOGCN: error: invalid operand for inline asm constraint 'A' 318define i32 @inline_A_constraint_V4() { 319 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(<2 x i16> <i16 1, i16 2>) 320 ret i32 %v0 321} 322 323; NOGCN: error: invalid operand for inline asm constraint 'A' 324define i32 @inline_A_constraint_V5() { 325 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(<4 x i16> <i16 0, i16 0, i16 0, i16 0>) 326 ret i32 %v0 327} 328 329; NOGCN: error: invalid operand for inline asm constraint 'A' 330define i32 @inline_A_constraint_V6() { 331 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(<2 x i32> <i32 0, i32 0>) 332 ret i32 %v0 333} 334 335;============================================================================== 336; 'A' constraint, type errors 337;============================================================================== 338 339; NOGCN: error: invalid operand for inline asm constraint 'A' 340define i32 @inline_A_constraint_E1(i32 %x) { 341 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(i32 %x) 342 ret i32 %v0 343} 344 345; NOGCN: error: invalid operand for inline asm constraint 'A' 346define i32 @inline_A_constraint_E2() { 347 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(i128 100000000000000000000) 348 ret i32 %v0 349} 350 351;============================================================================== 352; 'I' constraint, 16-bit operand 353;============================================================================== 354 355; NOSI: error: invalid operand for inline asm constraint 'I' 356; VI-LABEL: {{^}}inline_I_constraint_H0: 357; VI: v_mov_b32 {{v[0-9]+}}, 64 358define i32 @inline_I_constraint_H0() { 359 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,I"(i16 64) 360 ret i32 %v0 361} 362 363; NOSI: error: invalid operand for inline asm constraint 'I' 364; VI-LABEL: {{^}}inline_I_constraint_H1: 365; VI: v_mov_b32 {{v[0-9]+}}, -16 366define i32 @inline_I_constraint_H1() { 367 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,I"(half bitcast (i16 -16 to half)) 368 ret i32 %v0 369} 370 371; NOGCN: error: invalid operand for inline asm constraint 'I' 372define i32 @inline_I_constraint_H6() { 373 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,I"(half 1.0) 374 ret i32 %v0 375} 376 377; NOGCN: error: invalid operand for inline asm constraint 'I' 378define i32 @inline_I_constraint_H7() { 379 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,I"(i16 bitcast (half -1.0 to i16)) 380 ret i32 %v0 381} 382 383; NOGCN: error: invalid operand for inline asm constraint 'I' 384define i32 @inline_I_constraint_H8() { 385 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,I"(i16 -17) 386 ret i32 %v0 387} 388 389; NOGCN: error: invalid operand for inline asm constraint 'I' 390define i32 @inline_I_constraint_H9() { 391 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,I"(i16 65) 392 ret i32 %v0 393} 394 395;============================================================================== 396; 'I' constraint, 32-bit operand 397;============================================================================== 398 399; GCN-LABEL: {{^}}inline_I_constraint_F0: 400; GCN: v_mov_b32 {{v[0-9]+}}, -16 401define i32 @inline_I_constraint_F0() { 402 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,I"(i32 -16) 403 ret i32 %v0 404} 405 406; GCN-LABEL: {{^}}inline_I_constraint_F1: 407; GCN: v_mov_b32 {{v[0-9]+}}, -1 408define i32 @inline_I_constraint_F1() { 409 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,I"(float bitcast (i32 -1 to float)) 410 ret i32 %v0 411} 412 413; NOGCN: error: invalid operand for inline asm constraint 'I' 414define i32 @inline_I_constraint_F8() { 415 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,I"(float -4.0) 416 ret i32 %v0 417} 418 419; NOGCN: error: invalid operand for inline asm constraint 'I' 420define i32 @inline_I_constraint_F9() { 421 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,I"(i32 -17) 422 ret i32 %v0 423} 424 425;============================================================================== 426; 'I' constraint, 64-bit operand 427;============================================================================== 428 429; GCN-LABEL: {{^}}inline_I_constraint_D0: 430; GCN: v_mov_b32 {{v[0-9]+}}, -16 431define i32 @inline_I_constraint_D0() { 432 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,I"(i64 -16) 433 ret i32 %v0 434} 435 436; NOGCN: error: invalid operand for inline asm constraint 'I' 437define i32 @inline_I_constraint_D8() { 438 %v0 = tail call i32 asm "v_cvt_f32_f64 $0, $1", "=v,I"(double 0.5) 439 ret i32 %v0 440} 441 442; NOGCN: error: invalid operand for inline asm constraint 'I' 443define i32 @inline_I_constraint_D9() { 444 %v0 = tail call i32 asm "v_cvt_f32_f64 $0, $1", "=v,I"(i64 65) 445 ret i32 %v0 446} 447 448;============================================================================== 449; 'I' constraint, v2x16 operand 450;============================================================================== 451 452; NOSI: error: invalid operand for inline asm constraint 'I' 453; VI-LABEL: {{^}}inline_I_constraint_V0: 454; VI: v_mov_b32 {{v[0-9]+}}, -4 455define i32 @inline_I_constraint_V0() { 456 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,I"(<2 x i16> <i16 -4, i16 -4>) 457 ret i32 %v0 458} 459 460; NOGCN: error: invalid operand for inline asm constraint 'I' 461define i32 @inline_I_constraint_V1() { 462 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,I"(<2 x half> <half -0.5, half -0.5>) 463 ret i32 %v0 464} 465 466; NOGCN: error: invalid operand for inline asm constraint 'I' 467define i32 @inline_I_constraint_V2() { 468 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,I"(<2 x i16> <i16 -4, i16 undef>) 469 ret i32 %v0 470} 471 472; NOGCN: error: invalid operand for inline asm constraint 'I' 473define i32 @inline_I_constraint_V3() { 474 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,I"(<2 x i16> <i16 1, i16 2>) 475 ret i32 %v0 476} 477 478; NOGCN: error: invalid operand for inline asm constraint 'I' 479define i32 @inline_I_constraint_V4() { 480 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,I"(<4 x i16> <i16 0, i16 0, i16 0, i16 0>) 481 ret i32 %v0 482} 483 484; NOGCN: error: invalid operand for inline asm constraint 'I' 485define i32 @inline_I_constraint_V5() { 486 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,I"(<2 x i32> <i32 0, i32 0>) 487 ret i32 %v0 488} 489 490;============================================================================== 491; 'I' constraint, type errors 492;============================================================================== 493 494; NOGCN: error: invalid operand for inline asm constraint 'I' 495define i32 @inline_I_constraint_E1(i32 %x) { 496 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,I"(i32 %x) 497 ret i32 %v0 498} 499 500; NOGCN: error: invalid operand for inline asm constraint 'I' 501define i32 @inline_I_constraint_E2() { 502 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,I"(i128 100000000000000000000) 503 ret i32 %v0 504} 505 506;============================================================================== 507; 'J' constraint, 16-bit operand 508;============================================================================== 509 510; NOSI: error: invalid operand for inline asm constraint 'J' 511; VI-LABEL: {{^}}inline_J_constraint_H0: 512; VI: v_mov_b32 {{v[0-9]+}}, -1 513define i32 @inline_J_constraint_H0() { 514 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,J"(i16 65535) 515 ret i32 %v0 516} 517 518; NOSI: error: invalid operand for inline asm constraint 'J' 519; VI-LABEL: {{^}}inline_J_constraint_H1: 520; VI: v_mov_b32 {{v[0-9]+}}, 0x7fff 521define i32 @inline_J_constraint_H1() { 522 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,J"(i16 32767) 523 ret i32 %v0 524} 525 526; NOSI: error: invalid operand for inline asm constraint 'J' 527; VI-LABEL: {{^}}inline_J_constraint_H2: 528; VI: v_mov_b32 {{v[0-9]+}}, 0x8000 529define i32 @inline_J_constraint_H2() { 530 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,J"(i16 -32768) 531 ret i32 %v0 532} 533 534; NOSI: error: invalid operand for inline asm constraint 'J' 535; VI-LABEL: {{^}}inline_J_constraint_H3: 536; VI: v_mov_b32 {{v[0-9]+}}, 0x4800 537define i32 @inline_J_constraint_H3() { 538 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,J"(half 8.0) 539 ret i32 %v0 540} 541 542; NOSI: error: invalid operand for inline asm constraint 'J' 543; VI-LABEL: {{^}}inline_J_constraint_H4: 544; VI: v_mov_b32 {{v[0-9]+}}, -16 545define i32 @inline_J_constraint_H4() { 546 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,J"(half bitcast (i16 -16 to half)) 547 ret i32 %v0 548} 549 550;============================================================================== 551; 'J' constraint, 32-bit operand 552;============================================================================== 553 554; GCN-LABEL: {{^}}inline_J_constraint_F0: 555; GCN: v_mov_b32 {{v[0-9]+}}, -1 556define i32 @inline_J_constraint_F0() { 557 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,J"(i32 -1) 558 ret i32 %v0 559} 560 561; GCN-LABEL: {{^}}inline_J_constraint_F1: 562; GCN: v_mov_b32 {{v[0-9]+}}, 0x7fff 563define i32 @inline_J_constraint_F1() { 564 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,J"(i32 32767) 565 ret i32 %v0 566} 567 568; GCN-LABEL: {{^}}inline_J_constraint_F2: 569; GCN: v_mov_b32 {{v[0-9]+}}, 0xffff8000 570define i32 @inline_J_constraint_F2() { 571 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,J"(i32 -32768) 572 ret i32 %v0 573} 574 575; NOGCN: error: invalid operand for inline asm constraint 'J' 576define i32 @inline_J_constraint_F6() { 577 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,J"(i32 32768) 578 ret i32 %v0 579} 580 581; NOGCN: error: invalid operand for inline asm constraint 'J' 582define i32 @inline_J_constraint_F7() { 583 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,J"(i32 -32769) 584 ret i32 %v0 585} 586 587; NOGCN: error: invalid operand for inline asm constraint 'J' 588define i32 @inline_J_constraint_F8() { 589 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,J"(float -4.0) 590 ret i32 %v0 591} 592 593;============================================================================== 594; 'J' constraint, 64-bit operand 595;============================================================================== 596 597; GCN-LABEL: {{^}}inline_J_constraint_D0: 598; GCN: v_mov_b32 {{v[0-9]+}}, 0x7fff 599define i32 @inline_J_constraint_D0() { 600 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,J"(i64 32767) 601 ret i32 %v0 602} 603 604; GCN-LABEL: {{^}}inline_J_constraint_D1: 605; GCN: v_mov_b32 {{v[0-9]+}}, 0xffffffffffff8000 606define i32 @inline_J_constraint_D1() { 607 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,J"(i64 -32768) 608 ret i32 %v0 609} 610 611; NOGCN: error: invalid operand for inline asm constraint 'J' 612define i32 @inline_J_constraint_D8() { 613 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,J"(i64 32768) 614 ret i32 %v0 615} 616 617; NOGCN: error: invalid operand for inline asm constraint 'J' 618define i32 @inline_J_constraint_D9() { 619 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,J"(i64 -32769) 620 ret i32 %v0 621} 622 623;============================================================================== 624; 'J' constraint, v2x16 operand 625;============================================================================== 626 627; NOSI: error: invalid operand for inline asm constraint 'J' 628; VI-LABEL: {{^}}inline_J_constraint_V0: 629; VI: v_mov_b32 {{v[0-9]+}}, -4 630define i32 @inline_J_constraint_V0() { 631 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,J"(<2 x i16> <i16 -4, i16 -4>) 632 ret i32 %v0 633} 634 635; NOSI: error: invalid operand for inline asm constraint 'J' 636; VI-LABEL: {{^}}inline_J_constraint_V1: 637; VI: v_mov_b32 {{v[0-9]+}}, 0x7fff 638define i32 @inline_J_constraint_V1() { 639 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,J"(<2 x i16> <i16 32767, i16 32767>) 640 ret i32 %v0 641} 642 643; NOSI: error: invalid operand for inline asm constraint 'J' 644; VI-LABEL: {{^}}inline_J_constraint_V2: 645; VI: v_mov_b32 {{v[0-9]+}}, 0x8000 646define i32 @inline_J_constraint_V2() { 647 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,J"(<2 x i16> <i16 -32768, i16 -32768>) 648 ret i32 %v0 649} 650 651; NOSI: error: invalid operand for inline asm constraint 'J' 652; VI-LABEL: {{^}}inline_J_constraint_V3: 653; VI: v_mov_b32 {{v[0-9]+}}, 0x4c00 654define i32 @inline_J_constraint_V3() { 655 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,J"(<2 x half> <half 16.0, half 16.0>) 656 ret i32 %v0 657} 658 659;============================================================================== 660; 'J' constraint, type errors 661;============================================================================== 662 663; NOGCN: error: invalid operand for inline asm constraint 'J' 664define i32 @inline_J_constraint_E1(i32 %x) { 665 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,J"(i32 %x) 666 ret i32 %v0 667} 668 669; NOGCN: error: invalid operand for inline asm constraint 'J' 670define i32 @inline_J_constraint_E2() { 671 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,J"(i128 100000000000000000000) 672 ret i32 %v0 673} 674 675;============================================================================== 676; 'B' constraint, 16-bit operand 677;============================================================================== 678 679; NOSI: error: invalid operand for inline asm constraint 'B' 680; VI-LABEL: {{^}}inline_B_constraint_H0: 681; VI: v_mov_b32 {{v[0-9]+}}, 0x7fff 682define i32 @inline_B_constraint_H0() { 683 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,B"(i16 32767) 684 ret i32 %v0 685} 686 687; NOSI: error: invalid operand for inline asm constraint 'B' 688; VI-LABEL: {{^}}inline_B_constraint_H1: 689; VI: v_mov_b32 {{v[0-9]+}}, -1 690define i32 @inline_B_constraint_H1() { 691 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,B"(i16 65535) 692 ret i32 %v0 693} 694 695; NOSI: error: invalid operand for inline asm constraint 'B' 696; VI-LABEL: {{^}}inline_B_constraint_H3: 697; VI: v_mov_b32 {{v[0-9]+}}, 0x8000 698define i32 @inline_B_constraint_H3() { 699 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,B"(i16 -32768) 700 ret i32 %v0 701} 702 703; NOSI: error: invalid operand for inline asm constraint 'B' 704; VI-LABEL: {{^}}inline_B_constraint_H4: 705; VI: v_mov_b32 {{v[0-9]+}}, 0x4a80 706define i32 @inline_B_constraint_H4() { 707 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,B"(half 13.0) 708 ret i32 %v0 709} 710 711;============================================================================== 712; 'B' constraint, 32-bit operand 713;============================================================================== 714 715; GCN-LABEL: {{^}}inline_B_constraint_F0: 716; GCN: v_mov_b32 {{v[0-9]+}}, -1 717define i32 @inline_B_constraint_F0() { 718 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,B"(i32 4294967295) 719 ret i32 %v0 720} 721 722; GCN-LABEL: {{^}}inline_B_constraint_F1: 723; GCN: v_mov_b32 {{v[0-9]+}}, 0x80000000 724define i32 @inline_B_constraint_F1() { 725 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,B"(i32 2147483648) 726 ret i32 %v0 727} 728 729; GCN-LABEL: {{^}}inline_B_constraint_F2: 730; GCN: v_mov_b32 {{v[0-9]+}}, 0x42000000 731define i32 @inline_B_constraint_F2() { 732 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,B"(float 32.0) 733 ret i32 %v0 734} 735 736;============================================================================== 737; 'B' constraint, 64-bit operand 738;============================================================================== 739 740; GCN-LABEL: {{^}}inline_B_constraint_D0: 741; GCN: v_mov_b32 {{v[0-9]+}}, 0x7fffffff 742define i32 @inline_B_constraint_D0() { 743 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,B"(i64 2147483647) 744 ret i32 %v0 745} 746 747; GCN-LABEL: {{^}}inline_B_constraint_D1: 748; GCN: v_mov_b32 {{v[0-9]+}}, -1 749define i32 @inline_B_constraint_D1() { 750 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,B"(i64 -1) 751 ret i32 %v0 752} 753 754; GCN-LABEL: {{^}}inline_B_constraint_D2: 755; GCN: v_mov_b32 {{v[0-9]+}}, 0xffffffff80000000 756define i32 @inline_B_constraint_D2() { 757 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,B"(i64 -2147483648) 758 ret i32 %v0 759} 760 761; NOGCN: error: invalid operand for inline asm constraint 'B' 762define i32 @inline_B_constraint_D7() { 763 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,B"(i64 -2147483649) 764 ret i32 %v0 765} 766 767; NOGCN: error: invalid operand for inline asm constraint 'B' 768define i32 @inline_B_constraint_D8() { 769 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,B"(i64 4294967295) 770 ret i32 %v0 771} 772 773; NOGCN: error: invalid operand for inline asm constraint 'B' 774define i32 @inline_B_constraint_D9() { 775 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,B"(i64 2147483648) 776 ret i32 %v0 777} 778 779;============================================================================== 780; 'B' constraint, v2x16 operand 781;============================================================================== 782 783; NOSI: error: invalid operand for inline asm constraint 'B' 784; VI-LABEL: {{^}}inline_B_constraint_V0: 785; VI: v_mov_b32 {{v[0-9]+}}, 0x7fff 786define i32 @inline_B_constraint_V0() { 787 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,B"(<2 x i16> <i16 32767, i16 32767>) 788 ret i32 %v0 789} 790 791; NOSI: error: invalid operand for inline asm constraint 'B' 792; VI-LABEL: {{^}}inline_B_constraint_V1: 793; VI: v_mov_b32 {{v[0-9]+}}, -1 794define i32 @inline_B_constraint_V1() { 795 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,B"(<2 x i16> <i16 -1, i16 -1>) 796 ret i32 %v0 797} 798 799; NOSI: error: invalid operand for inline asm constraint 'B' 800; VI-LABEL: {{^}}inline_B_constraint_V2: 801; VI: v_mov_b32 {{v[0-9]+}}, 0x8000 802define i32 @inline_B_constraint_V2() { 803 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,B"(<2 x i16> <i16 -32768, i16 -32768>) 804 ret i32 %v0 805} 806 807;============================================================================== 808; 'C' constraint, 16-bit operand 809;============================================================================== 810 811; NOSI: error: invalid operand for inline asm constraint 'C' 812; VI-LABEL: {{^}}inline_C_constraint_H0: 813; VI: v_mov_b32 {{v[0-9]+}}, 0x7fff 814define i32 @inline_C_constraint_H0() { 815 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,C"(i16 32767) 816 ret i32 %v0 817} 818 819; NOSI: error: invalid operand for inline asm constraint 'C' 820; VI-LABEL: {{^}}inline_C_constraint_H1: 821; VI: v_mov_b32 {{v[0-9]+}}, -1 822define i32 @inline_C_constraint_H1() { 823 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,C"(i16 65535) 824 ret i32 %v0 825} 826 827; NOSI: error: invalid operand for inline asm constraint 'C' 828; VI-LABEL: {{^}}inline_C_constraint_H3: 829; VI: v_mov_b32 {{v[0-9]+}}, 0x8000 830define i32 @inline_C_constraint_H3() { 831 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,C"(i16 -32768) 832 ret i32 %v0 833} 834 835; NOSI: error: invalid operand for inline asm constraint 'C' 836; VI-LABEL: {{^}}inline_C_constraint_H4: 837; VI: v_mov_b32 {{v[0-9]+}}, 0x4a80 838define i32 @inline_C_constraint_H4() { 839 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,C"(half 13.0) 840 ret i32 %v0 841} 842 843;============================================================================== 844; 'C' constraint, 32-bit operand 845;============================================================================== 846 847; GCN-LABEL: {{^}}inline_C_constraint_F0: 848; GCN: v_mov_b32 {{v[0-9]+}}, -1 849define i32 @inline_C_constraint_F0() { 850 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,C"(i32 4294967295) 851 ret i32 %v0 852} 853 854; GCN-LABEL: {{^}}inline_C_constraint_F1: 855; GCN: v_mov_b32 {{v[0-9]+}}, 0x80000000 856define i32 @inline_C_constraint_F1() { 857 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,C"(i32 2147483648) 858 ret i32 %v0 859} 860 861; GCN-LABEL: {{^}}inline_C_constraint_F2: 862; GCN: v_mov_b32 {{v[0-9]+}}, 0x7fffffff 863define i32 @inline_C_constraint_F2() { 864 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,C"(i32 2147483647) 865 ret i32 %v0 866} 867 868; GCN-LABEL: {{^}}inline_C_constraint_F3: 869; GCN: v_mov_b32 {{v[0-9]+}}, 0x42000000 870define i32 @inline_C_constraint_F3() { 871 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,C"(float 32.0) 872 ret i32 %v0 873} 874 875; GCN-LABEL: {{^}}inline_C_constraint_F4: 876; GCN: v_mov_b32 {{v[0-9]+}}, -16 877define i32 @inline_C_constraint_F4() { 878 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,C"(i32 -16) 879 ret i32 %v0 880} 881 882; GCN-LABEL: {{^}}inline_C_constraint_F5: 883; GCN: v_mov_b32 {{v[0-9]+}}, 0xffffffef 884define i32 @inline_C_constraint_F5() { 885 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,C"(i32 -17) 886 ret i32 %v0 887} 888 889;============================================================================== 890; 'C' constraint, 64-bit operand 891;============================================================================== 892 893; GCN-LABEL: {{^}}inline_C_constraint_D0: 894; GCN: v_mov_b32 {{v[0-9]+}}, 0xffffffff 895define i32 @inline_C_constraint_D0() { 896 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,C"(i64 4294967295) 897 ret i32 %v0 898} 899 900; GCN-LABEL: {{^}}inline_C_constraint_D1: 901; GCN: v_mov_b32 {{v[0-9]+}}, 0x80000000 902define i32 @inline_C_constraint_D1() { 903 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,C"(i64 2147483648) 904 ret i32 %v0 905} 906 907; GCN-LABEL: {{^}}inline_C_constraint_D2: 908; GCN: v_mov_b32 {{v[0-9]+}}, -16 909define i32 @inline_C_constraint_D2() { 910 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,C"(i64 -16) 911 ret i32 %v0 912} 913 914; NOGCN: error: invalid operand for inline asm constraint 'C' 915define i32 @inline_C_constraint_D8() { 916 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,C"(i64 -17) 917 ret i32 %v0 918} 919 920; NOGCN: error: invalid operand for inline asm constraint 'C' 921define i32 @inline_C_constraint_D9() { 922 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,C"(i64 4294967296) 923 ret i32 %v0 924} 925 926;============================================================================== 927; 'C' constraint, v2x16 operand 928;============================================================================== 929 930; NOSI: error: invalid operand for inline asm constraint 'C' 931; VI-LABEL: {{^}}inline_C_constraint_V0: 932; VI: v_mov_b32 {{v[0-9]+}}, 0x7fff 933define i32 @inline_C_constraint_V0() { 934 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,C"(<2 x i16> <i16 32767, i16 32767>) 935 ret i32 %v0 936} 937 938; NOSI: error: invalid operand for inline asm constraint 'C' 939; VI-LABEL: {{^}}inline_C_constraint_V1: 940; VI: v_mov_b32 {{v[0-9]+}}, -1 941define i32 @inline_C_constraint_V1() { 942 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,C"(<2 x i16> <i16 -1, i16 -1>) 943 ret i32 %v0 944} 945 946; NOSI: error: invalid operand for inline asm constraint 'C' 947; VI-LABEL: {{^}}inline_C_constraint_V2: 948; VI: v_mov_b32 {{v[0-9]+}}, 0x8000 949define i32 @inline_C_constraint_V2() { 950 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,C"(<2 x i16> <i16 -32768, i16 -32768>) 951 ret i32 %v0 952} 953 954;============================================================================== 955; 'DA' constraint, 16-bit operand 956;============================================================================== 957 958; NOSI: error: invalid operand for inline asm constraint 'DA' 959; VI-LABEL: {{^}}inline_DA_constraint_H0: 960; VI: v_mov_b32 {{v[0-9]+}}, 64 961define i32 @inline_DA_constraint_H0() { 962 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(i16 64) 963 ret i32 %v0 964} 965 966; NOSI: error: invalid operand for inline asm constraint 'DA' 967; VI-LABEL: {{^}}inline_DA_constraint_H1: 968; VI: v_mov_b32 {{v[0-9]+}}, -16 969define i32 @inline_DA_constraint_H1() { 970 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(i16 -16) 971 ret i32 %v0 972} 973 974; NOSI: error: invalid operand for inline asm constraint 'DA' 975; VI-LABEL: {{^}}inline_DA_constraint_H2: 976; VI: v_mov_b32 {{v[0-9]+}}, 0x3c00 977define i32 @inline_DA_constraint_H2() { 978 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(i16 bitcast (half 1.0 to i16)) 979 ret i32 %v0 980} 981 982; NOSI: error: invalid operand for inline asm constraint 'DA' 983; VI-LABEL: {{^}}inline_DA_constraint_H3: 984; VI: v_mov_b32 {{v[0-9]+}}, 0xbc00 985define i32 @inline_DA_constraint_H3() { 986 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(i16 bitcast (half -1.0 to i16)) 987 ret i32 %v0 988} 989 990; NOSI: error: invalid operand for inline asm constraint 'DA' 991; VI-LABEL: {{^}}inline_DA_constraint_H4: 992; VI: v_mov_b32 {{v[0-9]+}}, 0x3118 993define i32 @inline_DA_constraint_H4() { 994 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(half 0xH3118) 995 ret i32 %v0 996} 997 998; NOSI: error: invalid operand for inline asm constraint 'DA' 999; VI-LABEL: {{^}}inline_DA_constraint_H5: 1000; VI: v_mov_b32 {{v[0-9]+}}, 0x3118 1001define i32 @inline_DA_constraint_H5() { 1002 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(i16 bitcast (half 0xH3118 to i16)) 1003 ret i32 %v0 1004} 1005 1006; NOSI: error: invalid operand for inline asm constraint 'DA' 1007; VI-LABEL: {{^}}inline_DA_constraint_H6: 1008; VI: v_mov_b32 {{v[0-9]+}}, 0xb800 1009define i32 @inline_DA_constraint_H6() { 1010 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(half -0.5) 1011 ret i32 %v0 1012} 1013 1014; NOGCN: error: invalid operand for inline asm constraint 'DA' 1015define i32 @inline_DA_constraint_H7() { 1016 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(i16 bitcast (half 0xH3119 to i16)) 1017 ret i32 %v0 1018} 1019 1020; NOGCN: error: invalid operand for inline asm constraint 'DA' 1021define i32 @inline_DA_constraint_H8() { 1022 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(i16 -17) 1023 ret i32 %v0 1024} 1025 1026; NOGCN: error: invalid operand for inline asm constraint 'DA' 1027define i32 @inline_DA_constraint_H9() { 1028 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(i16 65) 1029 ret i32 %v0 1030} 1031 1032;============================================================================== 1033; 'DA' constraint, 32-bit operand 1034;============================================================================== 1035 1036; GCN-LABEL: {{^}}inline_DA_constraint_F0: 1037; GCN: v_mov_b32 {{v[0-9]+}}, -16 1038define i32 @inline_DA_constraint_F0() { 1039 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(i32 -16) 1040 ret i32 %v0 1041} 1042 1043; GCN-LABEL: {{^}}inline_DA_constraint_F1: 1044; GCN: v_mov_b32 {{v[0-9]+}}, 1 1045define i32 @inline_DA_constraint_F1() { 1046 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(i32 1) 1047 ret i32 %v0 1048} 1049 1050; GCN-LABEL: {{^}}inline_DA_constraint_F2: 1051; GCN: v_mov_b32 {{v[0-9]+}}, 0xbf000000 1052define i32 @inline_DA_constraint_F2() { 1053 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(i32 bitcast (float -0.5 to i32)) 1054 ret i32 %v0 1055} 1056 1057; GCN-LABEL: {{^}}inline_DA_constraint_F3: 1058; GCN: v_mov_b32 {{v[0-9]+}}, 0x40000000 1059define i32 @inline_DA_constraint_F3() { 1060 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(i32 bitcast (float 2.0 to i32)) 1061 ret i32 %v0 1062} 1063 1064; GCN-LABEL: {{^}}inline_DA_constraint_F4: 1065; GCN: v_mov_b32 {{v[0-9]+}}, 0xc0800000 1066define i32 @inline_DA_constraint_F4() { 1067 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(float -4.0) 1068 ret i32 %v0 1069} 1070 1071; NOSI: error: invalid operand for inline asm constraint 'DA' 1072; VI-LABEL: {{^}}inline_DA_constraint_F5: 1073; VI: v_mov_b32 {{v[0-9]+}}, 0x3e22f983 1074define i32 @inline_DA_constraint_F5() { 1075 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(i32 1042479491) 1076 ret i32 %v0 1077} 1078 1079; GCN-LABEL: {{^}}inline_DA_constraint_F6: 1080; GCN: v_mov_b32 {{v[0-9]+}}, 0x3f000000 1081define i32 @inline_DA_constraint_F6() { 1082 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(float 0.5) 1083 ret i32 %v0 1084} 1085 1086; NOGCN: error: invalid operand for inline asm constraint 'DA' 1087define i32 @inline_DA_constraint_F7() { 1088 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(i32 65) 1089 ret i32 %v0 1090} 1091 1092; NOGCN: error: invalid operand for inline asm constraint 'DA' 1093define i32 @inline_DA_constraint_F8() { 1094 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(i32 -17) 1095 ret i32 %v0 1096} 1097 1098;============================================================================== 1099; 'DA' constraint, 64-bit operand 1100;============================================================================== 1101 1102; GCN-LABEL: {{^}}inline_DA_constraint_D0: 1103; GCN: v_mov_b32 {{v[0-9]+}}, 0x40fffffff0 1104define i32 @inline_DA_constraint_D0() { 1105 %v0 = tail call i32 asm "v_mov_b32 $0, $1 >> 32", "=v,^DA"(i64 bitcast (double 0x40fffffff0 to i64)) 1106 ret i32 %v0 1107} 1108 1109; GCN-LABEL: {{^}}inline_DA_constraint_D1: 1110; GCN: v_mov_b32 {{v[0-9]+}}, 0xfffffff000000040 1111define i32 @inline_DA_constraint_D1() { 1112 %v0 = tail call i32 asm "v_mov_b32 $0, $1 >> 32", "=v,^DA"(i64 bitcast (double 0xfffffff000000040 to i64)) 1113 ret i32 %v0 1114} 1115 1116; GCN-LABEL: {{^}}inline_DA_constraint_D2: 1117; GCN: v_mov_b32 {{v[0-9]+}}, -1 1118define i32 @inline_DA_constraint_D2() { 1119 %v0 = tail call i32 asm "v_mov_b32 $0, $1 >> 32", "=v,^DA"(i64 -1) 1120 ret i32 %v0 1121} 1122 1123; GCN-LABEL: {{^}}inline_DA_constraint_D3: 1124; GCN: v_mov_b32 {{v[0-9]+}}, 0xbf000000c0800000 1125define i32 @inline_DA_constraint_D3() { 1126 %v0 = tail call i32 asm "v_mov_b32 $0, $1 >> 32", "=v,^DA"(i64 bitcast (double 0xbf000000c0800000 to i64)) 1127 ret i32 %v0 1128} 1129 1130; NOSI: error: invalid operand for inline asm constraint 'DA' 1131; VI-LABEL: {{^}}inline_DA_constraint_D4: 1132; VI: v_mov_b32 {{v[0-9]+}}, 0x3e22f9833e22f983 1133define i32 @inline_DA_constraint_D4() { 1134 %v0 = tail call i32 asm "v_mov_b32 $0, $1 >> 32", "=v,^DA"(i64 bitcast (double 0x3e22f9833e22f983 to i64)) 1135 ret i32 %v0 1136} 1137 1138; NOGCN: error: invalid operand for inline asm constraint 'DA' 1139define i32 @inline_DA_constraint_D5() { 1140 %v0 = tail call i32 asm "v_mov_b32 $0, $1 >> 32", "=v,^DA"(i64 bitcast (double 0x0000004000000041 to i64)) 1141 ret i32 %v0 1142} 1143 1144; NOGCN: error: invalid operand for inline asm constraint 'DA' 1145define i32 @inline_DA_constraint_D8() { 1146 %v0 = tail call i32 asm "v_mov_b32 $0, $1 >> 32", "=v,^DA"(i64 bitcast (double 0x0000004100000040 to i64)) 1147 ret i32 %v0 1148} 1149 1150; NOGCN: error: invalid operand for inline asm constraint 'DA' 1151define i32 @inline_DA_constraint_D9() { 1152 %v0 = tail call i32 asm "v_mov_b32 $0, $1 >> 32", "=v,^DA"(double 100.0) 1153 ret i32 %v0 1154} 1155 1156;============================================================================== 1157; 'DA' constraint, v2x16 operand 1158;============================================================================== 1159 1160; NOSI: error: invalid operand for inline asm constraint 'DA' 1161; VI-LABEL: {{^}}inline_DA_constraint_V0: 1162; VI: v_mov_b32 {{v[0-9]+}}, -4 1163define i32 @inline_DA_constraint_V0() { 1164 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(<2 x i16> <i16 -4, i16 -4>) 1165 ret i32 %v0 1166} 1167 1168; NOSI: error: invalid operand for inline asm constraint 'DA' 1169; VI-LABEL: {{^}}inline_DA_constraint_V1: 1170; VI: v_mov_b32 {{v[0-9]+}}, 0xb800 1171define i32 @inline_DA_constraint_V1() { 1172 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(<2 x half> <half -0.5, half -0.5>) 1173 ret i32 %v0 1174} 1175 1176; NOGCN: error: invalid operand for inline asm constraint 'DA' 1177define i32 @inline_DA_constraint_V2() { 1178 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(<2 x i16> <i16 -4, i16 undef>) 1179 ret i32 %v0 1180} 1181 1182; NOGCN: error: invalid operand for inline asm constraint 'DA' 1183define i32 @inline_DA_constraint_V6() { 1184 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(<2 x i32> <i32 0, i32 0>) 1185 ret i32 %v0 1186} 1187 1188;============================================================================== 1189; 'DA' constraint, type errors 1190;============================================================================== 1191 1192; NOGCN: error: invalid operand for inline asm constraint 'DA' 1193define i32 @inline_DA_constraint_E1(i32 %x) { 1194 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(i32 %x) 1195 ret i32 %v0 1196} 1197 1198; NOGCN: error: invalid operand for inline asm constraint 'DA' 1199define i32 @inline_DA_constraint_E2() { 1200 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(i128 100000000000000000000) 1201 ret i32 %v0 1202} 1203 1204;============================================================================== 1205; 'DB' constraint, 16-bit operand 1206;============================================================================== 1207 1208; NOSI: error: invalid operand for inline asm constraint 'DB' 1209; VI-LABEL: {{^}}inline_DB_constraint_H0: 1210; VI: v_mov_b32 {{v[0-9]+}}, 0x7fff 1211define i32 @inline_DB_constraint_H0() { 1212 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DB"(i16 32767) 1213 ret i32 %v0 1214} 1215 1216; NOSI: error: invalid operand for inline asm constraint 'DB' 1217; VI-LABEL: {{^}}inline_DB_constraint_H1: 1218; VI: v_mov_b32 {{v[0-9]+}}, -1 1219define i32 @inline_DB_constraint_H1() { 1220 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DB"(i16 65535) 1221 ret i32 %v0 1222} 1223 1224; NOSI: error: invalid operand for inline asm constraint 'DB' 1225; VI-LABEL: {{^}}inline_DB_constraint_H2: 1226; VI: v_mov_b32 {{v[0-9]+}}, 0x4a80 1227define i32 @inline_DB_constraint_H2() { 1228 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DB"(half 13.0) 1229 ret i32 %v0 1230} 1231 1232;============================================================================== 1233; 'DB' constraint, 32-bit operand 1234;============================================================================== 1235 1236; GCN-LABEL: {{^}}inline_DB_constraint_F0: 1237; GCN: v_mov_b32 {{v[0-9]+}}, -1 1238define i32 @inline_DB_constraint_F0() { 1239 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DB"(i32 4294967295) 1240 ret i32 %v0 1241} 1242 1243; GCN-LABEL: {{^}}inline_DB_constraint_F1: 1244; GCN: v_mov_b32 {{v[0-9]+}}, 0x80000000 1245define i32 @inline_DB_constraint_F1() { 1246 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DB"(i32 2147483648) 1247 ret i32 %v0 1248} 1249 1250; GCN-LABEL: {{^}}inline_DB_constraint_F2: 1251; GCN: v_mov_b32 {{v[0-9]+}}, 0x42000000 1252define i32 @inline_DB_constraint_F2() { 1253 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DB"(float 32.0) 1254 ret i32 %v0 1255} 1256 1257;============================================================================== 1258; 'DB' constraint, 64-bit operand 1259;============================================================================== 1260 1261; GCN-LABEL: {{^}}inline_DB_constraint_D0: 1262; GCN: v_mov_b32 {{v[0-9]+}}, -1 1263define i32 @inline_DB_constraint_D0() { 1264 %v0 = tail call i32 asm "v_mov_b32 $0, $1 >> 32", "=v,^DB"(i64 -1) 1265 ret i32 %v0 1266} 1267 1268; GCN-LABEL: {{^}}inline_DB_constraint_D1: 1269; GCN: v_mov_b32 {{v[0-9]+}}, 0x1234567890abcdef 1270define i32 @inline_DB_constraint_D1() { 1271 %v0 = tail call i32 asm "v_mov_b32 $0, $1 >> 32", "=v,^DB"(i64 bitcast (double 0x1234567890abcdef to i64)) 1272 ret i32 %v0 1273} 1274 1275;============================================================================== 1276; 'DB' constraint, v2x16 operand 1277;============================================================================== 1278 1279; NOSI: error: invalid operand for inline asm constraint 'DB' 1280; VI-LABEL: {{^}}inline_DB_constraint_V0: 1281; VI: v_mov_b32 {{v[0-9]+}}, 0x7fff 1282define i32 @inline_DB_constraint_V0() { 1283 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DB"(<2 x i16> <i16 32767, i16 32767>) 1284 ret i32 %v0 1285} 1286 1287; NOSI: error: invalid operand for inline asm constraint 'DB' 1288; VI-LABEL: {{^}}inline_DB_constraint_V1: 1289; VI: v_mov_b32 {{v[0-9]+}}, -1 1290define i32 @inline_DB_constraint_V1() { 1291 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DB"(<2 x i16> <i16 65535, i16 65535>) 1292 ret i32 %v0 1293} 1294 1295; NOSI: error: invalid operand for inline asm constraint 'DB' 1296; VI-LABEL: {{^}}inline_DB_constraint_V2: 1297; VI: v_mov_b32 {{v[0-9]+}}, 0xd640 1298define i32 @inline_DB_constraint_V2() { 1299 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DB"(<2 x half> <half -100.0, half -100.0>) 1300 ret i32 %v0 1301} 1302 1303;============================================================================== 1304; 'DB' constraint, type errors 1305;============================================================================== 1306 1307; NOGCN: error: invalid operand for inline asm constraint 'DB' 1308define i32 @inline_DB_constraint_E1(i32 %x) { 1309 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DB"(i32 %x) 1310 ret i32 %v0 1311} 1312 1313; NOGCN: error: invalid operand for inline asm constraint 'DB' 1314define i32 @inline_DB_constraint_E2() { 1315 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DB"(i128 100000000000000000000) 1316 ret i32 %v0 1317} 1318