1; RUN:  llc -amdgpu-scalarize-global-loads=false  -march=amdgcn -mcpu=fiji -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=VI %s
2
3declare half @llvm.amdgcn.ldexp.f16(half %a, i32 %b)
4
5; GCN-LABEL: {{^}}ldexp_f16
6; GCN: buffer_load_ushort v[[A_F16:[0-9]+]]
7; GCN: buffer_load_dword v[[B_I32:[0-9]+]]
8; VI: v_ldexp_f16_e32 v[[R_F16:[0-9]+]], v[[A_F16]], v[[B_I32]]
9; GCN: buffer_store_short v[[R_F16]]
10define amdgpu_kernel void @ldexp_f16(
11    half addrspace(1)* %r,
12    half addrspace(1)* %a,
13    i32 addrspace(1)* %b) {
14  %a.val = load half, half addrspace(1)* %a
15  %b.val = load i32, i32 addrspace(1)* %b
16  %r.val = call half @llvm.amdgcn.ldexp.f16(half %a.val, i32 %b.val)
17  store half %r.val, half addrspace(1)* %r
18  ret void
19}
20
21; GCN-LABEL: {{^}}ldexp_f16_imm_a
22; GCN: buffer_load_dword v[[B_I32:[0-9]+]]
23; VI: v_ldexp_f16_e32 v[[R_F16:[0-9]+]], 2.0, v[[B_I32]]
24; GCN: buffer_store_short v[[R_F16]]
25define amdgpu_kernel void @ldexp_f16_imm_a(
26    half addrspace(1)* %r,
27    i32 addrspace(1)* %b) {
28  %b.val = load i32, i32 addrspace(1)* %b
29  %r.val = call half @llvm.amdgcn.ldexp.f16(half 2.0, i32 %b.val)
30  store half %r.val, half addrspace(1)* %r
31  ret void
32}
33
34; GCN-LABEL: {{^}}ldexp_f16_imm_b
35; GCN: buffer_load_ushort v[[A_F16:[0-9]+]]
36; VI: v_ldexp_f16_e64 v[[R_F16:[0-9]+]], v[[A_F16]], 2{{$}}
37; GCN: buffer_store_short v[[R_F16]]
38define amdgpu_kernel void @ldexp_f16_imm_b(
39    half addrspace(1)* %r,
40    half addrspace(1)* %a) {
41  %a.val = load half, half addrspace(1)* %a
42  %r.val = call half @llvm.amdgcn.ldexp.f16(half %a.val, i32 2)
43  store half %r.val, half addrspace(1)* %r
44  ret void
45}
46