1; RUN: llc -march=amdgcn -mcpu=gfx1010 -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=GFX10 %s
2
3; GFX10-LABEL: {{^}}dpp8_test:
4; GFX10: v_mov_b32_e32 [[SRC:v[0-9]+]], s{{[0-9]+}}
5; GFX10: v_mov_b32_dpp [[SRC]], [[SRC]]  dpp8:[1,0,0,0,0,0,0,0]{{$}}
6define amdgpu_kernel void @dpp8_test(i32 addrspace(1)* %out, i32 %in) {
7  %tmp0 = call i32 @llvm.amdgcn.mov.dpp8.i32(i32 %in, i32 1) #0
8  store i32 %tmp0, i32 addrspace(1)* %out
9  ret void
10}
11
12; GFX10-LABEL: {{^}}dpp8_wait_states:
13; GFX10-NOOPT: v_mov_b32_e32 [[VGPR1:v[0-9]+]], s{{[0-9]+}}
14; GFX10: v_mov_b32_e32 [[VGPR0:v[0-9]+]], s{{[0-9]+}}
15; GFX10: v_mov_b32_dpp [[VGPR0]], [[VGPR0]] dpp8:[1,0,0,0,0,0,0,0]{{$}}
16; GFX10: v_mov_b32_dpp [[VGPR0]], [[VGPR0]] dpp8:[5,0,0,0,0,0,0,0]{{$}}
17define amdgpu_kernel void @dpp8_wait_states(i32 addrspace(1)* %out, i32 %in) {
18  %tmp0 = call i32 @llvm.amdgcn.mov.dpp8.i32(i32 %in, i32 1) #0
19  %tmp1 = call i32 @llvm.amdgcn.mov.dpp8.i32(i32 %tmp0, i32 5) #0
20  store i32 %tmp1, i32 addrspace(1)* %out
21  ret void
22}
23
24declare i32 @llvm.amdgcn.mov.dpp8.i32(i32, i32) #0
25
26attributes #0 = { nounwind readnone convergent }
27