1; RUN: llc -march=amdgcn -mcpu=gfx906 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=GCN,GFX906
2; RUN: llc -march=amdgcn -mcpu=gfx1011 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=GCN,GFX10
3; RUN: llc -march=amdgcn -mcpu=gfx1012 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=GCN,GFX10
4; RUN: llc -march=amdgcn -mcpu=gfx1030 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=GCN,GFX10
5; RUN: llc -march=amdgcn -mcpu=gfx1031 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=GCN,GFX10
6
7declare i32 @llvm.amdgcn.sdot4(i32 %a, i32 %b, i32 %c, i1 %clamp)
8
9; GCN-LABEL: {{^}}test_llvm_amdgcn_sdot4_clamp
10; GFX906: v_dot4_i32_i8 v{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} clamp{{$}}
11; GFX10:  v_dot4_i32_i8 v{{[0-9]+}}, s{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}} clamp{{$}}
12define amdgpu_kernel void @test_llvm_amdgcn_sdot4_clamp(
13    i32 addrspace(1)* %r,
14    <4 x i8> addrspace(1)* %a,
15    <4 x i8> addrspace(1)* %b,
16    i32 addrspace(1)* %c) {
17entry:
18  %a.val = load <4 x i8>, <4 x i8> addrspace(1)* %a
19  %b.val = load <4 x i8>, <4 x i8> addrspace(1)* %b
20  %a.val.cast = bitcast <4 x i8> %a.val to i32
21  %b.val.cast = bitcast <4 x i8> %b.val to i32
22  %c.val = load i32, i32 addrspace(1)* %c
23  %r.val = call i32 @llvm.amdgcn.sdot4(i32 %a.val.cast, i32 %b.val.cast, i32 %c.val, i1 1)
24  store i32 %r.val, i32 addrspace(1)* %r
25  ret void
26}
27
28; GCN-LABEL: {{^}}test_llvm_amdgcn_sdot4_no_clamp
29; GFX906: v_dot4_i32_i8 v{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}{{$}}
30; GFX10:  v_dot4c_i32_i8_e32 v{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}{{$}}
31define amdgpu_kernel void @test_llvm_amdgcn_sdot4_no_clamp(
32    i32 addrspace(1)* %r,
33    <4 x i8> addrspace(1)* %a,
34    <4 x i8> addrspace(1)* %b,
35    i32 addrspace(1)* %c) {
36entry:
37  %a.val = load <4 x i8>, <4 x i8> addrspace(1)* %a
38  %b.val = load <4 x i8>, <4 x i8> addrspace(1)* %b
39  %a.val.cast = bitcast <4 x i8> %a.val to i32
40  %b.val.cast = bitcast <4 x i8> %b.val to i32
41  %c.val = load i32, i32 addrspace(1)* %c
42  %r.val = call i32 @llvm.amdgcn.sdot4(i32 %a.val.cast, i32 %b.val.cast, i32 %c.val, i1 0)
43  store i32 %r.val, i32 addrspace(1)* %r
44  ret void
45}
46