1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1010 -run-pass=machine-cse -o - %s | FileCheck %s
3
4--- |
5  define void @commute_instruction_subreg_target_flag() { ret void }
6  define void @commute_target_flag_frame_index() { ret void }
7  define void @commute_target_flag_global() { ret void }
8  define void @commute_target_flag_global_offset() { ret void }
9  define void @commute_target_flag_global_offset_mismatch() { ret void }
10
11  declare void @func()
12  @gv = external addrspace(1) global i32
13
14...
15
16# Make sure the subreg index is cleared when commuting a register and immediate.
17
18---
19name: commute_instruction_subreg_target_flag
20tracksRegLiveness: true
21body:             |
22  bb.0:
23    liveins: $vgpr0_vgpr1
24
25    ; CHECK-LABEL: name: commute_instruction_subreg_target_flag
26    ; CHECK: liveins: $vgpr0_vgpr1
27    ; CHECK: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
28    ; CHECK: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[COPY]].sub1, 64, 0, implicit $exec
29    ; CHECK: S_ENDPGM 0, implicit [[V_ADD_U32_e64_]], implicit [[V_ADD_U32_e64_]]
30    %0:vreg_64 = COPY $vgpr0_vgpr1
31    %1:vgpr_32 = V_ADD_U32_e64 %0.sub1, 64, 0, implicit $exec
32    %2:vgpr_32 = V_ADD_U32_e64 64, %0.sub1, 0, implicit $exec
33    S_ENDPGM 0, implicit %1, implicit %2
34
35...
36
37# FIXME: Why doesn't this CSE?
38---
39name: commute_target_flag_frame_index
40tracksRegLiveness: true
41stack:
42  - { id: 0, type: default, offset: 0, size: 4, alignment: 4 }
43body:             |
44  bb.0:
45    liveins: $vgpr0_vgpr1
46
47    ; CHECK-LABEL: name: commute_target_flag_frame_index
48    ; CHECK: liveins: $vgpr0_vgpr1
49    ; CHECK: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
50    ; CHECK: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 %stack.0, [[COPY]].sub0, 0, implicit $exec
51    ; CHECK: S_ENDPGM 0, implicit [[V_ADD_U32_e64_]], implicit [[V_ADD_U32_e64_]]
52    %0:vreg_64 = COPY $vgpr0_vgpr1
53    %1:vgpr_32 = V_ADD_U32_e64 %0.sub0, %stack.0, 0, implicit $exec
54    %2:vgpr_32 = V_ADD_U32_e64 %stack.0, %0.sub0, 0, implicit $exec
55    S_ENDPGM 0, implicit %1, implicit %2
56
57...
58
59# FIXME: Handle commuting global variables
60---
61name: commute_target_flag_global
62tracksRegLiveness: true
63body:             |
64  bb.0:
65    liveins: $sgpr0_sgpr1
66
67    ; CHECK-LABEL: name: commute_target_flag_global
68    ; CHECK: liveins: $sgpr0_sgpr1
69    ; CHECK: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
70    ; CHECK: [[S_ADD_U32_:%[0-9]+]]:sreg_32 = S_ADD_U32 [[COPY]].sub0, target-flags(amdgpu-rel32-lo) @func, implicit-def dead $scc
71    ; CHECK: S_ENDPGM 0, implicit [[S_ADD_U32_]], implicit [[S_ADD_U32_]]
72    %0:sreg_64 = COPY $sgpr0_sgpr1
73    %1:sreg_32 = S_ADD_U32 %0.sub0, target-flags(amdgpu-rel32-lo) @func, implicit-def dead $scc
74    %2:sreg_32 = S_ADD_U32 target-flags(amdgpu-rel32-lo) @func, %0.sub0, implicit-def dead $scc
75    S_ENDPGM 0, implicit %1, implicit %2
76
77...
78
79---
80name: commute_target_flag_global_offset
81tracksRegLiveness: true
82body:             |
83  bb.0:
84    liveins: $sgpr0_sgpr1
85
86    ; CHECK-LABEL: name: commute_target_flag_global_offset
87    ; CHECK: liveins: $sgpr0_sgpr1
88    ; CHECK: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
89    ; CHECK: [[S_ADD_U32_:%[0-9]+]]:sreg_32 = S_ADD_U32 [[COPY]].sub0, target-flags(amdgpu-rel32-lo) @gv + 4, implicit-def dead $scc
90    ; CHECK: S_ENDPGM 0, implicit [[S_ADD_U32_]], implicit [[S_ADD_U32_]]
91    %0:sreg_64 = COPY $sgpr0_sgpr1
92    %1:sreg_32 = S_ADD_U32 %0.sub0, target-flags(amdgpu-rel32-lo) @gv + 4, implicit-def dead $scc
93    %2:sreg_32 = S_ADD_U32 target-flags(amdgpu-rel32-lo) @gv + 4, %0.sub0, implicit-def dead $scc
94    S_ENDPGM 0, implicit %1, implicit %2
95
96...
97
98---
99name: commute_target_flag_global_offset_mismatch
100tracksRegLiveness: true
101body:             |
102  bb.0:
103    liveins: $sgpr0_sgpr1
104
105    ; CHECK-LABEL: name: commute_target_flag_global_offset_mismatch
106    ; CHECK: liveins: $sgpr0_sgpr1
107    ; CHECK: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
108    ; CHECK: [[S_ADD_U32_:%[0-9]+]]:sreg_32 = S_ADD_U32 [[COPY]].sub0, target-flags(amdgpu-rel32-lo) @gv + 4, implicit-def dead $scc
109    ; CHECK: [[S_ADD_U32_1:%[0-9]+]]:sreg_32 = S_ADD_U32 target-flags(amdgpu-rel32-lo) @gv + 8, [[COPY]].sub0, implicit-def dead $scc
110    ; CHECK: S_ENDPGM 0, implicit [[S_ADD_U32_]], implicit [[S_ADD_U32_1]]
111    %0:sreg_64 = COPY $sgpr0_sgpr1
112    %1:sreg_32 = S_ADD_U32 %0.sub0, target-flags(amdgpu-rel32-lo) @gv + 4, implicit-def dead $scc
113    %2:sreg_32 = S_ADD_U32 target-flags(amdgpu-rel32-lo) @gv + 8, %0.sub0, implicit-def dead $scc
114    S_ENDPGM 0, implicit %1, implicit %2
115
116...
117