1# RUN: llc -march=amdgcn -mcpu=gfx803 -run-pass si-memory-legalizer  %s -o - | FileCheck %s
2
3--- |
4  define amdgpu_kernel void @multiple_mem_operands(i32 addrspace(1)* %out, i32 %cond, i32 %if_offset, i32 %else_offset) #0 {
5  entry:
6    %scratch0 = alloca [8192 x i32], addrspace(5)
7    %scratch1 = alloca [8192 x i32], addrspace(5)
8    %scratchptr01 = bitcast [8192 x i32] addrspace(5)* %scratch0 to i32 addrspace(5)*
9    store i32 1, i32 addrspace(5)* %scratchptr01
10    %scratchptr12 = bitcast [8192 x i32] addrspace(5)* %scratch1 to i32 addrspace(5)*
11    store i32 2, i32 addrspace(5)* %scratchptr12
12    %cmp = icmp eq i32 %cond, 0
13    br i1 %cmp, label %if, label %else, !structurizecfg.uniform !0, !amdgpu.uniform !0
14
15  if:                                               ; preds = %entry
16    %if_ptr = getelementptr [8192 x i32], [8192 x i32] addrspace(5)* %scratch0, i32 0, i32 %if_offset, !amdgpu.uniform !0
17    %if_value = load i32, i32 addrspace(5)* %if_ptr, align 4, !nontemporal !1
18    br label %done, !structurizecfg.uniform !0
19
20  else:                                             ; preds = %entry
21    %else_ptr = getelementptr [8192 x i32], [8192 x i32] addrspace(5)* %scratch1, i32 0, i32 %else_offset, !amdgpu.uniform !0
22    %else_value = load i32, i32 addrspace(5)* %else_ptr, align 4, !nontemporal !1
23    br label %done, !structurizecfg.uniform !0
24
25  done:                                             ; preds = %else, %if
26    %value = phi i32 [ %if_value, %if ], [ %else_value, %else ]
27    store i32 %value, i32 addrspace(1)* %out
28    ret void
29  }
30
31  ; Function Attrs: convergent nounwind
32  declare { i1, i64 } @llvm.amdgcn.if(i1) #1
33
34  ; Function Attrs: convergent nounwind
35  declare { i1, i64 } @llvm.amdgcn.else(i64) #1
36
37  ; Function Attrs: convergent nounwind readnone
38  declare i64 @llvm.amdgcn.break(i64) #2
39
40  ; Function Attrs: convergent nounwind readnone
41  declare i64 @llvm.amdgcn.if.break(i1, i64) #2
42
43  ; Function Attrs: convergent nounwind readnone
44  declare i64 @llvm.amdgcn.else.break(i64, i64) #2
45
46  ; Function Attrs: convergent nounwind
47  declare i1 @llvm.amdgcn.loop(i64) #1
48
49  ; Function Attrs: convergent nounwind
50  declare void @llvm.amdgcn.end.cf(i64) #1
51
52  attributes #0 = { "target-cpu"="gfx803" }
53  attributes #1 = { convergent nounwind }
54  attributes #2 = { convergent nounwind readnone }
55
56  !0 = !{}
57  !1 = !{i32 1}
58
59...
60---
61
62# CHECK-LABEL: name: multiple_mem_operands
63
64# CHECK-LABEL: bb.3.done:
65# CHECK: BUFFER_LOAD_DWORD_OFFEN killed $vgpr0, killed $sgpr8_sgpr9_sgpr10_sgpr11, $sgpr3, 0, 1, 1, 0, 0
66
67name:            multiple_mem_operands
68alignment:       1
69exposesReturnsTwice: false
70legalized:       false
71regBankSelected: false
72selected:        false
73tracksRegLiveness: true
74registers:
75liveins:
76  - { reg: '$sgpr0_sgpr1', virtual-reg: '' }
77  - { reg: '$sgpr3', virtual-reg: '' }
78frameInfo:
79  isFrameAddressTaken: false
80  isReturnAddressTaken: false
81  hasStackMap:     false
82  hasPatchPoint:   false
83  stackSize:       65540
84  offsetAdjustment: 0
85  maxAlignment:    4
86  adjustsStack:    false
87  hasCalls:        false
88  stackProtector:  ''
89  maxCallFrameSize: 0
90  hasOpaqueSPAdjustment: false
91  hasVAStart:      false
92  hasMustTailInVarArgFunc: false
93  savePoint:       ''
94  restorePoint:    ''
95fixedStack:
96  - { id: 0, type: default, offset: 0, size: 4, alignment: 4, stack-id: default,
97      isImmutable: false, isAliased: false, callee-saved-register: '' }
98stack:
99  - { id: 0, name: scratch0, type: default, offset: 4, size: 32768, alignment: 4,
100      stack-id: default, callee-saved-register: '', local-offset: 0,
101      debug-info-variable: '', debug-info-expression: '',
102      debug-info-location: '' }
103  - { id: 1, name: scratch1, type: default, offset: 32772, size: 32768,
104      alignment: 4, stack-id: default, callee-saved-register: '', local-offset: 32768,
105      debug-info-variable: '', debug-info-expression: '',
106      debug-info-location: '' }
107constants:
108body:             |
109  bb.0.entry:
110    successors: %bb.1.if(0x30000000), %bb.2.else(0x50000000)
111    liveins: $sgpr0_sgpr1, $sgpr3
112
113    $sgpr2 = S_LOAD_DWORD_IMM $sgpr0_sgpr1, 44, 0, 0 :: (non-temporal dereferenceable invariant load 4 from `i32 addrspace(4)* undef`)
114    $sgpr8 = S_MOV_B32 &SCRATCH_RSRC_DWORD0, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11
115    $sgpr4_sgpr5 = S_LOAD_DWORDX2_IMM $sgpr0_sgpr1, 36, 0, 0 :: (non-temporal dereferenceable invariant load 8 from `i64 addrspace(4)* undef`)
116    $sgpr9 = S_MOV_B32 &SCRATCH_RSRC_DWORD1, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11
117    $sgpr10 = S_MOV_B32 4294967295, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11
118    $sgpr11 = S_MOV_B32 15204352, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11
119    $vgpr0 = V_MOV_B32_e32 1, implicit $exec
120    BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr8_sgpr9_sgpr10_sgpr11, $sgpr3, 4, 0, 0, 0, 0, 0, implicit $exec :: (store 4 into %ir.scratchptr01)
121    S_WAITCNT 127
122    S_CMP_LG_U32 killed $sgpr2, 0, implicit-def $scc
123    S_WAITCNT 3855
124    $vgpr0 = V_MOV_B32_e32 2, implicit $exec
125    $vgpr1 = V_MOV_B32_e32 32772, implicit $exec
126    BUFFER_STORE_DWORD_OFFEN killed $vgpr0, killed $vgpr1, $sgpr8_sgpr9_sgpr10_sgpr11, $sgpr3, 0, 0, 0, 0, 0, 0, implicit $exec :: (store 4 into %ir.scratchptr12)
127    S_CBRANCH_SCC0 %bb.1.if, implicit killed $scc
128
129  bb.2.else:
130    successors: %bb.3.done(0x80000000)
131    liveins: $sgpr0_sgpr1, $sgpr4_sgpr5, $sgpr3, $sgpr8_sgpr9_sgpr10_sgpr11
132
133    $sgpr0 = S_LOAD_DWORD_IMM killed $sgpr0_sgpr1, 52, 0, 0 :: (non-temporal dereferenceable invariant load 4 from `i32 addrspace(4)* undef`)
134    S_WAITCNT 3855
135    $vgpr0 = V_MOV_B32_e32 32772, implicit $exec
136    S_BRANCH %bb.3.done
137
138  bb.1.if:
139    successors: %bb.3.done(0x80000000)
140    liveins: $sgpr0_sgpr1, $sgpr4_sgpr5, $sgpr3, $sgpr8_sgpr9_sgpr10_sgpr11
141
142    $sgpr0 = S_LOAD_DWORD_IMM killed $sgpr0_sgpr1, 48, 0, 0 :: (non-temporal dereferenceable invariant load 4 from `i32 addrspace(4)* undef`)
143    S_WAITCNT 3855
144    $vgpr0 = V_MOV_B32_e32 4, implicit $exec
145
146  bb.3.done:
147    liveins: $sgpr3, $sgpr4_sgpr5, $sgpr8_sgpr9_sgpr10_sgpr11, $vgpr0, $sgpr0
148
149    S_WAITCNT 127
150    $sgpr0 = S_LSHL_B32 killed $sgpr0, 2, implicit-def dead $scc
151    $vgpr0 = V_ADD_CO_U32_e32 killed $sgpr0, killed $vgpr0, implicit-def dead $vcc, implicit $exec
152    $vgpr0 = BUFFER_LOAD_DWORD_OFFEN killed $vgpr0, killed $sgpr8_sgpr9_sgpr10_sgpr11, $sgpr3, 0, 0, 0, 0, 0, 0, implicit $exec :: (non-temporal load 4 from %ir.else_ptr), (non-temporal load 4 from %ir.if_ptr)
153    $vgpr1 = V_MOV_B32_e32 $sgpr4, implicit $exec, implicit-def $vgpr1_vgpr2, implicit $sgpr4_sgpr5
154    $vgpr2 = V_MOV_B32_e32 killed $sgpr5, implicit $exec, implicit $sgpr4_sgpr5, implicit $exec
155    S_WAITCNT 3952
156    FLAT_STORE_DWORD killed $vgpr1_vgpr2, killed $vgpr0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 4 into %ir.out)
157    S_ENDPGM 0
158
159...
160