1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -march=amdgcn -mcpu=gfx902 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s 3 4define amdgpu_kernel void @vector_clause(<4 x i32> addrspace(1)* noalias nocapture readonly %arg, <4 x i32> addrspace(1)* noalias nocapture %arg1) { 5; GCN-LABEL: vector_clause: 6; GCN: ; %bb.0: ; %bb 7; GCN-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 8; GCN-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x2c 9; GCN-NEXT: v_lshlrev_b32_e32 v16, 4, v0 10; GCN-NEXT: s_waitcnt lgkmcnt(0) 11; GCN-NEXT: global_load_dwordx4 v[0:3], v16, s[2:3] 12; GCN-NEXT: global_load_dwordx4 v[4:7], v16, s[2:3] offset:16 13; GCN-NEXT: global_load_dwordx4 v[8:11], v16, s[2:3] offset:32 14; GCN-NEXT: global_load_dwordx4 v[12:15], v16, s[2:3] offset:48 15; GCN-NEXT: s_waitcnt vmcnt(3) 16; GCN-NEXT: global_store_dwordx4 v16, v[0:3], s[4:5] 17; GCN-NEXT: s_waitcnt vmcnt(3) 18; GCN-NEXT: global_store_dwordx4 v16, v[4:7], s[4:5] offset:16 19; GCN-NEXT: s_waitcnt vmcnt(3) 20; GCN-NEXT: global_store_dwordx4 v16, v[8:11], s[4:5] offset:32 21; GCN-NEXT: s_waitcnt vmcnt(3) 22; GCN-NEXT: global_store_dwordx4 v16, v[12:15], s[4:5] offset:48 23; GCN-NEXT: s_endpgm 24bb: 25 %tmp = tail call i32 @llvm.amdgcn.workitem.id.x() 26 %tmp2 = zext i32 %tmp to i64 27 %tmp3 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg, i64 %tmp2 28 %tmp4 = load <4 x i32>, <4 x i32> addrspace(1)* %tmp3, align 16 29 %tmp5 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg1, i64 %tmp2 30 %tmp6 = add nuw nsw i64 %tmp2, 1 31 %tmp7 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg, i64 %tmp6 32 %tmp8 = load <4 x i32>, <4 x i32> addrspace(1)* %tmp7, align 16 33 %tmp9 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg1, i64 %tmp6 34 %tmp10 = add nuw nsw i64 %tmp2, 2 35 %tmp11 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg, i64 %tmp10 36 %tmp12 = load <4 x i32>, <4 x i32> addrspace(1)* %tmp11, align 16 37 %tmp13 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg1, i64 %tmp10 38 %tmp14 = add nuw nsw i64 %tmp2, 3 39 %tmp15 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg, i64 %tmp14 40 %tmp16 = load <4 x i32>, <4 x i32> addrspace(1)* %tmp15, align 16 41 %tmp17 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg1, i64 %tmp14 42 store <4 x i32> %tmp4, <4 x i32> addrspace(1)* %tmp5, align 16 43 store <4 x i32> %tmp8, <4 x i32> addrspace(1)* %tmp9, align 16 44 store <4 x i32> %tmp12, <4 x i32> addrspace(1)* %tmp13, align 16 45 store <4 x i32> %tmp16, <4 x i32> addrspace(1)* %tmp17, align 16 46 ret void 47} 48 49define amdgpu_kernel void @scalar_clause(<4 x i32> addrspace(1)* noalias nocapture readonly %arg, <4 x i32> addrspace(1)* noalias nocapture %arg1) { 50; GCN-LABEL: scalar_clause: 51; GCN: ; %bb.0: ; %bb 52; GCN-NEXT: s_load_dwordx2 s[16:17], s[0:1], 0x24 53; GCN-NEXT: s_load_dwordx2 s[18:19], s[0:1], 0x2c 54; GCN-NEXT: v_mov_b32_e32 v12, 0 55; GCN-NEXT: s_waitcnt lgkmcnt(0) 56; GCN-NEXT: s_load_dwordx4 s[0:3], s[16:17], 0x0 57; GCN-NEXT: s_load_dwordx4 s[4:7], s[16:17], 0x10 58; GCN-NEXT: s_load_dwordx4 s[8:11], s[16:17], 0x20 59; GCN-NEXT: s_load_dwordx4 s[12:15], s[16:17], 0x30 60; GCN-NEXT: s_waitcnt lgkmcnt(0) 61; GCN-NEXT: v_mov_b32_e32 v0, s0 62; GCN-NEXT: v_mov_b32_e32 v4, s4 63; GCN-NEXT: v_mov_b32_e32 v8, s8 64; GCN-NEXT: v_mov_b32_e32 v1, s1 65; GCN-NEXT: v_mov_b32_e32 v2, s2 66; GCN-NEXT: v_mov_b32_e32 v3, s3 67; GCN-NEXT: v_mov_b32_e32 v5, s5 68; GCN-NEXT: v_mov_b32_e32 v6, s6 69; GCN-NEXT: v_mov_b32_e32 v7, s7 70; GCN-NEXT: v_mov_b32_e32 v9, s9 71; GCN-NEXT: v_mov_b32_e32 v10, s10 72; GCN-NEXT: v_mov_b32_e32 v11, s11 73; GCN-NEXT: global_store_dwordx4 v12, v[0:3], s[18:19] 74; GCN-NEXT: global_store_dwordx4 v12, v[4:7], s[18:19] offset:16 75; GCN-NEXT: global_store_dwordx4 v12, v[8:11], s[18:19] offset:32 76; GCN-NEXT: v_mov_b32_e32 v0, s12 77; GCN-NEXT: v_mov_b32_e32 v1, s13 78; GCN-NEXT: v_mov_b32_e32 v2, s14 79; GCN-NEXT: v_mov_b32_e32 v3, s15 80; GCN-NEXT: global_store_dwordx4 v12, v[0:3], s[18:19] offset:48 81; GCN-NEXT: s_endpgm 82bb: 83 %tmp = load <4 x i32>, <4 x i32> addrspace(1)* %arg, align 16 84 %tmp2 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg, i64 1 85 %tmp3 = load <4 x i32>, <4 x i32> addrspace(1)* %tmp2, align 16 86 %tmp4 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg1, i64 1 87 %tmp5 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg, i64 2 88 %tmp6 = load <4 x i32>, <4 x i32> addrspace(1)* %tmp5, align 16 89 %tmp7 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg1, i64 2 90 %tmp8 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg, i64 3 91 %tmp9 = load <4 x i32>, <4 x i32> addrspace(1)* %tmp8, align 16 92 %tmp10 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg1, i64 3 93 store <4 x i32> %tmp, <4 x i32> addrspace(1)* %arg1, align 16 94 store <4 x i32> %tmp3, <4 x i32> addrspace(1)* %tmp4, align 16 95 store <4 x i32> %tmp6, <4 x i32> addrspace(1)* %tmp7, align 16 96 store <4 x i32> %tmp9, <4 x i32> addrspace(1)* %tmp10, align 16 97 ret void 98} 99 100define void @mubuf_clause(<4 x i32> addrspace(5)* noalias nocapture readonly %arg, <4 x i32> addrspace(5)* noalias nocapture %arg1) { 101; GCN-LABEL: mubuf_clause: 102; GCN: ; %bb.0: ; %bb 103; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 104; GCN-NEXT: v_and_b32_e32 v2, 0x3ff, v2 105; GCN-NEXT: v_lshlrev_b32_e32 v2, 4, v2 106; GCN-NEXT: v_add_u32_e32 v0, v0, v2 107; GCN-NEXT: buffer_load_dword v3, v0, s[0:3], 0 offen 108; GCN-NEXT: buffer_load_dword v4, v0, s[0:3], 0 offen offset:4 109; GCN-NEXT: buffer_load_dword v5, v0, s[0:3], 0 offen offset:8 110; GCN-NEXT: buffer_load_dword v6, v0, s[0:3], 0 offen offset:12 111; GCN-NEXT: buffer_load_dword v7, v0, s[0:3], 0 offen offset:16 112; GCN-NEXT: buffer_load_dword v8, v0, s[0:3], 0 offen offset:20 113; GCN-NEXT: buffer_load_dword v9, v0, s[0:3], 0 offen offset:24 114; GCN-NEXT: buffer_load_dword v10, v0, s[0:3], 0 offen offset:28 115; GCN-NEXT: buffer_load_dword v11, v0, s[0:3], 0 offen offset:32 116; GCN-NEXT: buffer_load_dword v12, v0, s[0:3], 0 offen offset:36 117; GCN-NEXT: buffer_load_dword v13, v0, s[0:3], 0 offen offset:40 118; GCN-NEXT: buffer_load_dword v14, v0, s[0:3], 0 offen offset:44 119; GCN-NEXT: buffer_load_dword v15, v0, s[0:3], 0 offen offset:48 120; GCN-NEXT: buffer_load_dword v16, v0, s[0:3], 0 offen offset:52 121; GCN-NEXT: buffer_load_dword v17, v0, s[0:3], 0 offen offset:56 122; GCN-NEXT: v_add_u32_e32 v1, v1, v2 123; GCN-NEXT: buffer_load_dword v0, v0, s[0:3], 0 offen offset:60 124; GCN-NEXT: s_waitcnt vmcnt(12) 125; GCN-NEXT: buffer_store_dword v6, v1, s[0:3], 0 offen offset:12 126; GCN-NEXT: buffer_store_dword v5, v1, s[0:3], 0 offen offset:8 127; GCN-NEXT: buffer_store_dword v4, v1, s[0:3], 0 offen offset:4 128; GCN-NEXT: buffer_store_dword v3, v1, s[0:3], 0 offen 129; GCN-NEXT: s_waitcnt vmcnt(12) 130; GCN-NEXT: buffer_store_dword v10, v1, s[0:3], 0 offen offset:28 131; GCN-NEXT: buffer_store_dword v9, v1, s[0:3], 0 offen offset:24 132; GCN-NEXT: buffer_store_dword v8, v1, s[0:3], 0 offen offset:20 133; GCN-NEXT: buffer_store_dword v7, v1, s[0:3], 0 offen offset:16 134; GCN-NEXT: s_waitcnt vmcnt(12) 135; GCN-NEXT: buffer_store_dword v14, v1, s[0:3], 0 offen offset:44 136; GCN-NEXT: buffer_store_dword v13, v1, s[0:3], 0 offen offset:40 137; GCN-NEXT: buffer_store_dword v12, v1, s[0:3], 0 offen offset:36 138; GCN-NEXT: buffer_store_dword v11, v1, s[0:3], 0 offen offset:32 139; GCN-NEXT: s_waitcnt vmcnt(12) 140; GCN-NEXT: buffer_store_dword v0, v1, s[0:3], 0 offen offset:60 141; GCN-NEXT: buffer_store_dword v17, v1, s[0:3], 0 offen offset:56 142; GCN-NEXT: buffer_store_dword v16, v1, s[0:3], 0 offen offset:52 143; GCN-NEXT: buffer_store_dword v15, v1, s[0:3], 0 offen offset:48 144; GCN-NEXT: s_waitcnt vmcnt(0) 145; GCN-NEXT: s_setpc_b64 s[30:31] 146bb: 147 %tmp = tail call i32 @llvm.amdgcn.workitem.id.x() 148 %tmp2 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(5)* %arg, i32 %tmp 149 %tmp3 = load <4 x i32>, <4 x i32> addrspace(5)* %tmp2, align 16 150 %tmp4 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(5)* %arg1, i32 %tmp 151 %tmp5 = add nuw nsw i32 %tmp, 1 152 %tmp6 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(5)* %arg, i32 %tmp5 153 %tmp7 = load <4 x i32>, <4 x i32> addrspace(5)* %tmp6, align 16 154 %tmp8 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(5)* %arg1, i32 %tmp5 155 %tmp9 = add nuw nsw i32 %tmp, 2 156 %tmp10 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(5)* %arg, i32 %tmp9 157 %tmp11 = load <4 x i32>, <4 x i32> addrspace(5)* %tmp10, align 16 158 %tmp12 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(5)* %arg1, i32 %tmp9 159 %tmp13 = add nuw nsw i32 %tmp, 3 160 %tmp14 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(5)* %arg, i32 %tmp13 161 %tmp15 = load <4 x i32>, <4 x i32> addrspace(5)* %tmp14, align 16 162 %tmp16 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(5)* %arg1, i32 %tmp13 163 store <4 x i32> %tmp3, <4 x i32> addrspace(5)* %tmp4, align 16 164 store <4 x i32> %tmp7, <4 x i32> addrspace(5)* %tmp8, align 16 165 store <4 x i32> %tmp11, <4 x i32> addrspace(5)* %tmp12, align 16 166 store <4 x i32> %tmp15, <4 x i32> addrspace(5)* %tmp16, align 16 167 ret void 168} 169 170define amdgpu_kernel void @vector_clause_indirect(i64 addrspace(1)* noalias nocapture readonly %arg, <4 x i32> addrspace(1)* noalias nocapture readnone %arg1, <4 x i32> addrspace(1)* noalias nocapture %arg2) { 171; GCN-LABEL: vector_clause_indirect: 172; GCN: ; %bb.0: ; %bb 173; GCN-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 174; GCN-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x34 175; GCN-NEXT: v_lshlrev_b32_e32 v0, 3, v0 176; GCN-NEXT: s_waitcnt lgkmcnt(0) 177; GCN-NEXT: global_load_dwordx2 v[8:9], v0, s[2:3] 178; GCN-NEXT: s_waitcnt vmcnt(0) 179; GCN-NEXT: global_load_dwordx4 v[0:3], v[8:9], off 180; GCN-NEXT: global_load_dwordx4 v[4:7], v[8:9], off offset:16 181; GCN-NEXT: v_mov_b32_e32 v8, 0 182; GCN-NEXT: s_waitcnt vmcnt(1) 183; GCN-NEXT: global_store_dwordx4 v8, v[0:3], s[4:5] 184; GCN-NEXT: s_waitcnt vmcnt(1) 185; GCN-NEXT: global_store_dwordx4 v8, v[4:7], s[4:5] offset:16 186; GCN-NEXT: s_endpgm 187bb: 188 %tmp = tail call i32 @llvm.amdgcn.workitem.id.x() 189 %tmp3 = zext i32 %tmp to i64 190 %tmp4 = getelementptr inbounds i64, i64 addrspace(1)* %arg, i64 %tmp3 191 %tmp5 = bitcast i64 addrspace(1)* %tmp4 to <4 x i32> addrspace(1)* addrspace(1)* 192 %tmp6 = load <4 x i32> addrspace(1)*, <4 x i32> addrspace(1)* addrspace(1)* %tmp5, align 8 193 %tmp7 = load <4 x i32>, <4 x i32> addrspace(1)* %tmp6, align 16 194 %tmp8 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %tmp6, i64 1 195 %tmp9 = load <4 x i32>, <4 x i32> addrspace(1)* %tmp8, align 16 196 store <4 x i32> %tmp7, <4 x i32> addrspace(1)* %arg2, align 16 197 %tmp10 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg2, i64 1 198 store <4 x i32> %tmp9, <4 x i32> addrspace(1)* %tmp10, align 16 199 ret void 200} 201 202define void @load_global_d16_hi(i16 addrspace(1)* %in, i16 %reg, <2 x i16> addrspace(1)* %out) { 203; GCN-LABEL: load_global_d16_hi: 204; GCN: ; %bb.0: ; %entry 205; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 206; GCN-NEXT: v_mov_b32_e32 v5, v2 207; GCN-NEXT: global_load_short_d16_hi v5, v[0:1], off 208; GCN-NEXT: s_nop 0 209; GCN-NEXT: global_load_short_d16_hi v2, v[0:1], off offset:64 210; GCN-NEXT: s_waitcnt vmcnt(1) 211; GCN-NEXT: global_store_dword v[3:4], v5, off 212; GCN-NEXT: s_waitcnt vmcnt(1) 213; GCN-NEXT: global_store_dword v[3:4], v2, off offset:128 214; GCN-NEXT: s_waitcnt vmcnt(0) 215; GCN-NEXT: s_setpc_b64 s[30:31] 216entry: 217 %gep = getelementptr inbounds i16, i16 addrspace(1)* %in, i64 32 218 %load1 = load i16, i16 addrspace(1)* %in 219 %load2 = load i16, i16 addrspace(1)* %gep 220 %build0 = insertelement <2 x i16> undef, i16 %reg, i32 0 221 %build1 = insertelement <2 x i16> %build0, i16 %load1, i32 1 222 store <2 x i16> %build1, <2 x i16> addrspace(1)* %out 223 %build2 = insertelement <2 x i16> undef, i16 %reg, i32 0 224 %build3 = insertelement <2 x i16> %build2, i16 %load2, i32 1 225 %gep2 = getelementptr inbounds <2 x i16>, <2 x i16> addrspace(1)* %out, i64 32 226 store <2 x i16> %build3, <2 x i16> addrspace(1)* %gep2 227 ret void 228} 229 230define void @load_global_d16_lo(i16 addrspace(1)* %in, i32 %reg, <2 x i16> addrspace(1)* %out) { 231; GCN-LABEL: load_global_d16_lo: 232; GCN: ; %bb.0: ; %entry 233; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 234; GCN-NEXT: v_mov_b32_e32 v5, v2 235; GCN-NEXT: global_load_short_d16 v5, v[0:1], off 236; GCN-NEXT: s_nop 0 237; GCN-NEXT: global_load_short_d16 v2, v[0:1], off offset:64 238; GCN-NEXT: s_waitcnt vmcnt(1) 239; GCN-NEXT: global_store_dword v[3:4], v5, off 240; GCN-NEXT: s_waitcnt vmcnt(1) 241; GCN-NEXT: global_store_dword v[3:4], v2, off offset:128 242; GCN-NEXT: s_waitcnt vmcnt(0) 243; GCN-NEXT: s_setpc_b64 s[30:31] 244entry: 245 %gep = getelementptr inbounds i16, i16 addrspace(1)* %in, i64 32 246 %reg.bc1 = bitcast i32 %reg to <2 x i16> 247 %reg.bc2 = bitcast i32 %reg to <2 x i16> 248 %load1 = load i16, i16 addrspace(1)* %in 249 %load2 = load i16, i16 addrspace(1)* %gep 250 %build1 = insertelement <2 x i16> %reg.bc1, i16 %load1, i32 0 251 %build2 = insertelement <2 x i16> %reg.bc2, i16 %load2, i32 0 252 %gep2 = getelementptr inbounds <2 x i16>, <2 x i16> addrspace(1)* %out, i64 32 253 store <2 x i16> %build1, <2 x i16> addrspace(1)* %out 254 store <2 x i16> %build2, <2 x i16> addrspace(1)* %gep2 255 ret void 256} 257 258declare i32 @llvm.amdgcn.workitem.id.x() 259