1# RUN: llc -march=amdgcn -verify-machineinstrs -run-pass si-load-store-opt -o - %s | FileCheck %s
2
3# Check that SILoadStoreOptimizer honors physregs defs/uses between moved
4# instructions.
5#
6# The following IR snippet would usually be optimized by the peephole optimizer.
7# However, an equivalent situation can occur with buffer instructions as well.
8
9# CHECK-LABEL: name: scc_def_and_use_no_dependency
10# CHECK: S_ADD_U32
11# CHECK: S_ADDC_U32
12# CHECK: DS_READ2_B32
13---
14name:            scc_def_and_use_no_dependency
15machineFunctionInfo:
16  isEntryFunction: true
17body:             |
18  bb.0:
19    liveins: $vgpr0, $sgpr0
20
21    %1:vgpr_32 = COPY $vgpr0
22    %10:sgpr_32 = COPY $sgpr0
23
24    $m0 = S_MOV_B32 -1
25    %2:vgpr_32 = DS_READ_B32 %1, 0, 0, implicit $m0, implicit $exec :: (load 4)
26
27    %11:sgpr_32 = S_ADD_U32 %10, 4, implicit-def $scc
28    %12:sgpr_32 = S_ADDC_U32 %10, 0, implicit-def dead $scc, implicit $scc
29
30    %3:vgpr_32 = DS_READ_B32 %1, 64, 0, implicit $m0, implicit $exec :: (load 4)
31    S_ENDPGM 0
32
33...
34
35# CHECK-LABEL: name: scc_def_and_use_dependency
36# CHECK: DS_READ2_B32
37# CHECK: S_ADD_U32
38# CHECK: S_ADDC_U32
39---
40name:            scc_def_and_use_dependency
41machineFunctionInfo:
42  isEntryFunction: true
43
44body:             |
45  bb.0:
46    liveins: $vgpr0, $sgpr0
47
48    %1:vgpr_32 = COPY $vgpr0
49    %10:sgpr_32 = COPY $sgpr0
50
51    $m0 = S_MOV_B32 -1
52    %2:vgpr_32 = DS_READ_B32 %1, 0, 0, implicit $m0, implicit $exec :: (load 4)
53    %20:sgpr_32 = V_READFIRSTLANE_B32 %2, implicit $exec
54
55    %21:sgpr_32 = S_ADD_U32 %20, 4, implicit-def $scc
56    ; The S_ADDC_U32 depends on the first DS_READ_B32 only via SCC
57    %11:sgpr_32 = S_ADDC_U32 %10, 0, implicit-def dead $scc, implicit $scc
58
59    %3:vgpr_32 = DS_READ_B32 %1, 64, 0, implicit $m0, implicit $exec :: (load 4)
60    S_ENDPGM 0
61
62...
63