1; RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx1010 -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GFX10 %s
2
3; GCN-LABEL: _amdgpu_hs_main:
4
5define amdgpu_hs void @_amdgpu_hs_main() #0 {
6.entry:
7  ret void
8}
9
10; GCN-LABEL: _amdgpu_ps_main:
11; GCN: s_and_saveexec_b64
12
13define amdgpu_ps void @_amdgpu_ps_main(i32 %arg) local_unnamed_addr #1 {
14.entry:
15  %tmp = tail call float @llvm.amdgcn.interp.p2(float undef, float undef, i32 1, i32 0, i32 %arg) #2
16  %tmp1 = tail call float @llvm.amdgcn.image.sample.2d.f32.f32(i32 1, float undef, float %tmp, <8 x i32> undef, <4 x i32> undef, i1 false, i32 0, i32 0)
17  %tmp2 = fcmp olt float %tmp1, 5.000000e-01
18  br i1 %tmp2, label %bb, label %l
19
20bb:                                               ; preds = %.entry
21  unreachable
22
23l: ; preds = %.entry
24  ret void
25}
26
27; GCN-LABEL: _amdgpu_gs_main:
28
29define amdgpu_gs void @_amdgpu_gs_main() #4 {
30.entry:
31  ret void
32}
33
34declare float @llvm.amdgcn.interp.p2(float, float, i32, i32, i32) #2
35declare float @llvm.amdgcn.image.sample.2d.f32.f32(i32, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #3
36
37attributes #0 = { "amdgpu-max-work-group-size"="128" "target-features"=",+wavefrontsize32" }
38attributes #1 = { "target-features"=",+wavefrontsize64" }
39attributes #2 = { nounwind readnone speculatable }
40attributes #3 = { nounwind readonly }
41attributes #4 = { "target-features"=",+wavefrontsize32" }
42