1; RUN: llc -march=r600 -mcpu=redwood -verify-machineinstrs < %s | \
2; RUN: FileCheck -check-prefix=EG -check-prefix=FUNC %s
3
4; FUNC-LABEL: {{^}}tgid_x:
5; EG: MEM_RAT_CACHELESS STORE_RAW T1.X
6define amdgpu_kernel void @tgid_x(i32 addrspace(1)* %out) {
7entry:
8  %0 = call i32 @llvm.r600.read.tgid.x() #0
9  store i32 %0, i32 addrspace(1)* %out
10  ret void
11}
12
13; FUNC-LABEL: {{^}}tgid_y:
14; EG: MEM_RAT_CACHELESS STORE_RAW [[REG:T[0-9]+]].X
15; EG: MOV [[REG]].X, T1.Y
16define amdgpu_kernel void @tgid_y(i32 addrspace(1)* %out) {
17entry:
18  %0 = call i32 @llvm.r600.read.tgid.y() #0
19  store i32 %0, i32 addrspace(1)* %out
20  ret void
21}
22
23; FUNC-LABEL: {{^}}tgid_z:
24; EG: MEM_RAT_CACHELESS STORE_RAW [[REG:T[0-9]+]].X
25; EG: MOV [[REG]].X, T1.Z
26define amdgpu_kernel void @tgid_z(i32 addrspace(1)* %out) {
27entry:
28  %0 = call i32 @llvm.r600.read.tgid.z() #0
29  store i32 %0, i32 addrspace(1)* %out
30  ret void
31}
32
33; FUNC-LABEL: {{^}}tidig_x:
34; EG: MEM_RAT_CACHELESS STORE_RAW T0.X
35define amdgpu_kernel void @tidig_x(i32 addrspace(1)* %out) {
36entry:
37  %0 = call i32 @llvm.r600.read.tidig.x() #0
38  store i32 %0, i32 addrspace(1)* %out
39  ret void
40}
41
42; FUNC-LABEL: {{^}}tidig_y:
43; EG: MEM_RAT_CACHELESS STORE_RAW [[REG:T[0-9]+]].X
44; EG: MOV [[REG]].X, T0.Y
45define amdgpu_kernel void @tidig_y(i32 addrspace(1)* %out) {
46entry:
47  %0 = call i32 @llvm.r600.read.tidig.y() #0
48  store i32 %0, i32 addrspace(1)* %out
49  ret void
50}
51
52; FUNC-LABEL: {{^}}tidig_z:
53; EG: MEM_RAT_CACHELESS STORE_RAW [[REG:T[0-9]+]].X
54; EG: MOV [[REG]].X, T0.Z
55define amdgpu_kernel void @tidig_z(i32 addrspace(1)* %out) {
56entry:
57  %0 = call i32 @llvm.r600.read.tidig.z() #0
58  store i32 %0, i32 addrspace(1)* %out
59  ret void
60}
61
62; FUNC-LABEL: {{^}}test_implicit:
63; 36 prepended implicit bytes + 4(out pointer) + 4*4 = 56 == KC0[3].Z
64; EG: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+.[XYZW]]], [[PTR:T[0-9]+.[XYZW]]]
65; EG-NOT: VTX_READ
66; EG-DAG: MOV {{\*?}} [[VAL]], KC0[3].Z
67; EG-DAG: LSHR {{\*? *}}[[PTR]], KC0[2].Y, literal
68define amdgpu_kernel void @test_implicit(i32 addrspace(1)* %out) #1 {
69  %implicitarg.ptr = call noalias i8 addrspace(7)* @llvm.r600.implicitarg.ptr()
70  %header.ptr = bitcast i8 addrspace(7)* %implicitarg.ptr to i32 addrspace(7)*
71  %gep = getelementptr i32, i32 addrspace(7)* %header.ptr, i32 4
72  %value = load i32, i32 addrspace(7)* %gep
73  store i32 %value, i32 addrspace(1)* %out
74  ret void
75}
76
77; FUNC-LABEL: {{^}}test_implicit_dyn:
78; 36 prepended implicit bytes + 8(out pointer + in) = 44
79; EG: VTX_READ_32 {{T[0-9]+\.[XYZW]}}, {{T[0-9]+\.[XYZW]}}, 44, #3
80define amdgpu_kernel void @test_implicit_dyn(i32 addrspace(1)* %out, i32 %in) #1 {
81  %implicitarg.ptr = call noalias i8 addrspace(7)* @llvm.r600.implicitarg.ptr()
82  %header.ptr = bitcast i8 addrspace(7)* %implicitarg.ptr to i32 addrspace(7)*
83  %gep = getelementptr i32, i32 addrspace(7)* %header.ptr, i32 %in
84  %value = load i32, i32 addrspace(7)* %gep
85  store i32 %value, i32 addrspace(1)* %out
86  ret void
87}
88
89declare i8 addrspace(7)* @llvm.r600.implicitarg.ptr() #0
90
91declare i32 @llvm.r600.read.tgid.x() #0
92declare i32 @llvm.r600.read.tgid.y() #0
93declare i32 @llvm.r600.read.tgid.z() #0
94
95declare i32 @llvm.r600.read.tidig.x() #0
96declare i32 @llvm.r600.read.tidig.y() #0
97declare i32 @llvm.r600.read.tidig.z() #0
98
99attributes #0 = { readnone }
100