1; RUN: llc -mtriple=amdgcn--amdpal -mcpu=tahiti -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
2; RUN: llc -mtriple=amdgcn--amdpal -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
3
4; SI-LABEL: {{^}}s_mulk_i32_k0:
5; SI: s_load_dword [[VAL:s[0-9]+]]
6; SI: s_mulk_i32 [[VAL]], 0x41
7; SI: v_mov_b32_e32 [[VRESULT:v[0-9]+]], [[VAL]]
8; SI: buffer_store_dword [[VRESULT]]
9; SI: s_endpgm
10define amdgpu_kernel void @s_mulk_i32_k0(i32 addrspace(1)* %out, i32 %b) {
11  %mul = mul i32 %b, 65
12  store i32 %mul, i32 addrspace(1)* %out
13  ret void
14}
15
16; SI-LABEL: {{^}}s_mulk_i32_k1:
17; SI: s_mulk_i32 {{s[0-9]+}}, 0x7fff{{$}}
18; SI: s_endpgm
19define amdgpu_kernel void @s_mulk_i32_k1(i32 addrspace(1)* %out, i32 %b) {
20  %mul = mul i32 %b, 32767 ; (1 << 15) - 1
21  store i32 %mul, i32 addrspace(1)* %out
22  ret void
23}
24
25; SI-LABEL: {{^}}s_mulk_i32_k2:
26; SI: s_mulk_i32 {{s[0-9]+}}, 0xffef{{$}}
27; SI: s_endpgm
28define amdgpu_kernel void @s_mulk_i32_k2(i32 addrspace(1)* %out, i32 %b) {
29  %mul = mul i32 %b, -17
30  store i32 %mul, i32 addrspace(1)* %out
31  ret void
32}
33
34; SI-LABEL: {{^}}no_s_mulk_i32_k0:
35; SI: s_mul_i32 {{s[0-9]+}}, {{s[0-9]+}}, 0x8001{{$}}
36; SI: s_endpgm
37define amdgpu_kernel void @no_s_mulk_i32_k0(i32 addrspace(1)* %out, i32 %b) {
38  %mul = mul i32 %b, 32769 ; 1 << 15 + 1
39  store i32 %mul, i32 addrspace(1)* %out
40  ret void
41}
42
43@lds = addrspace(3) global [512 x i32] undef, align 4
44
45; SI-LABEL: {{^}}commute_s_mulk_i32:
46; SI: s_mulk_i32 s{{[0-9]+}}, 0x800{{$}}
47define amdgpu_kernel void @commute_s_mulk_i32(i32 addrspace(1)* %out, i32 %b) #0 {
48  %size = call i32 @llvm.amdgcn.groupstaticsize()
49  %add = mul i32 %size, %b
50  call void asm sideeffect "; foo $0, $1", "v,s"([512 x i32] addrspace(3)* @lds, i32 %add)
51  ret void
52}
53
54declare i32 @llvm.amdgcn.groupstaticsize() #1
55
56attributes #0 = { nounwind }
57attributes #1 = { nounwind readnone }
58