1# RUN: llc -march=amdgcn -misched=converge -run-pass machine-scheduler %s -o - -debug-only=machine-scheduler 2>&1 | FileCheck %s
2# REQUIRES: asserts
3
4# Check there is no SReg_32 pressure created by DS_* instructions because of M0 use
5
6# CHECK: ScheduleDAGMILive::schedule starting
7# CHECK: SU({{.*}} = DS_READ_B32 {{.*}} implicit $m0, implicit $exec
8# CHECK: Pressure Diff : {{$}}
9# CHECK: SU({{.*}} DS_WRITE_B32
10
11---
12name:            mo_pset
13alignment:       1
14exposesReturnsTwice: false
15legalized:       false
16regBankSelected: false
17selected:        false
18tracksRegLiveness: true
19registers:
20  - { id: 0, class: sgpr_128 }
21  - { id: 1, class: sgpr_64 }
22  - { id: 2, class: sreg_32_xm0 }
23  - { id: 3, class: sgpr_32 }
24  - { id: 4, class: vgpr_32 }
25  - { id: 5, class: sreg_32_xm0_xexec }
26  - { id: 6, class: vgpr_32 }
27  - { id: 7, class: vgpr_32 }
28  - { id: 8, class: vgpr_32 }
29liveins:
30  - { reg: '$sgpr4_sgpr5', virtual-reg: '%1' }
31frameInfo:
32  isFrameAddressTaken: false
33  isReturnAddressTaken: false
34  hasStackMap:     false
35  hasPatchPoint:   false
36  stackSize:       0
37  offsetAdjustment: 0
38  maxAlignment:    0
39  adjustsStack:    false
40  hasCalls:        false
41  maxCallFrameSize: 0
42  hasOpaqueSPAdjustment: false
43  hasVAStart:      false
44  hasMustTailInVarArgFunc: false
45body:             |
46  bb.0:
47    liveins: $sgpr4_sgpr5
48
49    %1 = COPY $sgpr4_sgpr5
50    %5 = S_LOAD_DWORD_IMM %1, 0, 0, 0 :: (non-temporal dereferenceable invariant load 4 from `i32 addrspace(4)* undef`)
51    $m0 = S_MOV_B32 -1
52    %7 = COPY %5
53    %6 = DS_READ_B32 %7, 0, 0, implicit $m0, implicit $exec
54    DS_WRITE_B32 %7, %6, 4, 0, implicit killed $m0, implicit $exec
55    S_ENDPGM 0
56
57...
58