1; RUN: llc -mtriple=amdgcn-amd-amdhsa < %s | FileCheck -check-prefix=GCN %s
2
3; GCN-LABEL: {{^}}select_undef_lhs:
4; GCN: s_waitcnt
5; GCN-NOT: v_cmp
6; GCN-NOT: v_cndmask
7; GCN-NEXT: s_setpc_b64
8define float @select_undef_lhs(float %val, i1 %cond) {
9  %undef = call float @llvm.amdgcn.rcp.f32(float undef)
10  %sel = select i1 %cond, float %undef, float %val
11  ret float %sel
12}
13
14; GCN-LABEL: {{^}}select_undef_rhs:
15; GCN: s_waitcnt
16; GCN-NOT: v_cmp
17; GCN-NOT: v_cndmask
18; GCN-NEXT: s_setpc_b64
19define float @select_undef_rhs(float %val, i1 %cond) {
20  %undef = call float @llvm.amdgcn.rcp.f32(float undef)
21  %sel = select i1 %cond, float %val, float %undef
22  ret float %sel
23}
24
25; GCN-LABEL: {{^}}select_undef_n1:
26; GCN: v_mov_b32_e32 [[RES:v[0-9]+]], 1.0
27; GCN: store_dword {{[^,]+}}, [[RES]]
28define void @select_undef_n1(float addrspace(1)* %a, i32 %c) {
29  %cc = icmp eq i32 %c, 0
30  %sel = select i1 %cc, float 1.000000e+00, float undef
31  store float %sel, float addrspace(1)* %a
32  ret void
33}
34
35; GCN-LABEL: {{^}}select_undef_n2:
36; GCN: v_mov_b32_e32 [[RES:v[0-9]+]], 1.0
37; GCN: store_dword {{[^,]+}}, [[RES]]
38define void @select_undef_n2(float addrspace(1)* %a, i32 %c) {
39  %cc = icmp eq i32 %c, 0
40  %sel = select i1 %cc, float undef, float 1.000000e+00
41  store float %sel, float addrspace(1)* %a
42  ret void
43}
44
45declare float @llvm.amdgcn.rcp.f32(float)
46