1; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s 2 3; GCN-LABEL: {{^}}const_load_no_shrink_dword_to_unaligned_byte: 4; GCN: s_load_dword [[LD:s[0-9]+]], 5; GCN: s_bfe_i32 s{{[0-9]+}}, [[LD]], 0x10013 6define amdgpu_kernel void @const_load_no_shrink_dword_to_unaligned_byte(i32 addrspace(1)* %out, i32 addrspace(4)* %in, i32 %x) { 7 %ptr = getelementptr i32, i32 addrspace(4)* %in, i32 %x 8 %load = load i32, i32 addrspace(4)* %ptr, align 4 9 %and = and i32 %load, 524288 10 %cmp = icmp eq i32 %and, 0 11 %sel = select i1 %cmp, i32 0, i32 -1 12 store i32 %sel, i32 addrspace(1)* %out 13 ret void 14} 15 16; GCN-LABEL: const_load_no_shrink_dword_to_aligned_byte: 17; GCN: s_load_dword [[LD:s[0-9]+]], 18; GCN: s_bfe_i32 s{{[0-9]+}}, [[LD]], 0x10003 19define amdgpu_kernel void @const_load_no_shrink_dword_to_aligned_byte(i32 addrspace(1)* %out, i32 addrspace(4)* %in, i32 %x) { 20 %ptr = getelementptr i32, i32 addrspace(4)* %in, i32 %x 21 %load = load i32, i32 addrspace(4)* %ptr, align 4 22 %and = and i32 %load, 8 23 %cmp = icmp eq i32 %and, 0 24 %sel = select i1 %cmp, i32 0, i32 -1 25 store i32 %sel, i32 addrspace(1)* %out 26 ret void 27} 28 29; GCN-LABEL: global_load_no_shrink_dword_to_unaligned_byte: 30; GCN: s_load_dword [[LD:s[0-9]+]], 31; GCN: s_bfe_i32 s{{[0-9]+}}, [[LD]], 0x10013 32define amdgpu_kernel void @global_load_no_shrink_dword_to_unaligned_byte(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %in, i32 %x) { 33 %ptr = getelementptr i32, i32 addrspace(1)* %in, i32 %x 34 %load = load i32, i32 addrspace(1)* %ptr, align 4 35 %and = and i32 %load, 524288 36 %cmp = icmp eq i32 %and, 0 37 %sel = select i1 %cmp, i32 0, i32 -1 38 store i32 %sel, i32 addrspace(1)* %out 39 ret void 40} 41 42; GCN-LABEL: global_load_no_shrink_dword_to_aligned_byte: 43; GCN: s_load_dword [[LD:s[0-9]+]], 44; GCN: s_bfe_i32 s{{[0-9]+}}, [[LD]], 0x10003 45define amdgpu_kernel void @global_load_no_shrink_dword_to_aligned_byte(i32 addrspace(1)* %out, i32 addrspace(1)* %in, i32 %x) { 46 %ptr = getelementptr i32, i32 addrspace(1)* %in, i32 %x 47 %load = load i32, i32 addrspace(1)* %ptr, align 4 48 %and = and i32 %load, 8 49 %cmp = icmp eq i32 %and, 0 50 %sel = select i1 %cmp, i32 0, i32 -1 51 store i32 %sel, i32 addrspace(1)* %out 52 ret void 53} 54 55; GCN-LABEL: const_load_shrink_dword_to_unaligned_byte: 56; GCN: global_load_ushort 57define amdgpu_kernel void @const_load_shrink_dword_to_unaligned_byte(i32 addrspace(1)* %out, i32 addrspace(4)* %in, i32 %x) { 58 %ptr = getelementptr i32, i32 addrspace(4)* %in, i32 %x 59 %load = load i32, i32 addrspace(4)* %ptr, align 2 60 %and = and i32 %load, 524288 61 %cmp = icmp eq i32 %and, 0 62 %sel = select i1 %cmp, i32 0, i32 -1 63 store i32 %sel, i32 addrspace(1)* %out 64 ret void 65} 66