1; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx906 -verify-machineinstrs -o - %s | FileCheck %s
2
3target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-ni:7"
4target triple = "amdgcn-amd-amdhsa"
5
6; CHECK-LABEL: {{^}}t0:
7; CHECK: s_load_dwordx2 s{{\[}}[[PTR_LO:[0-9]+]]:[[PTR_HI:[0-9]+]]], s[4:5], 0x0
8; CHECK: v_mov_b32_e32 v{{[0-9]+}}, s[[PTR_HI]]
9; There should be no redundant copies from PTR_HI.
10; CHECK-NOT: v_mov_b32_e32 v{{[0-9]+}}, s[[PTR_HI]]
11define protected amdgpu_kernel void @t0(float addrspace(1)* %p, i32 %i0, i32 %j0, i32 %k0) {
12entry:
13  %0 = tail call i32 @llvm.amdgcn.workitem.id.x()
14  %i = add i32 %0, %i0
15  %j = add i32 %0, %j0
16  %k = add i32 %0, %k0
17  %pi = getelementptr float, float addrspace(1)* %p, i32 %i
18  %vi = load float, float addrspace(1)* %pi
19  %pj = getelementptr float, float addrspace(1)* %p, i32 %j
20  %vj = load float, float addrspace(1)* %pj
21  %sum = fadd float %vi, %vj
22  %pk = getelementptr float, float addrspace(1)* %p, i32 %k
23  store float %sum, float addrspace(1)* %pk
24  ret void
25}
26
27declare i32 @llvm.amdgcn.workitem.id.x()
28