1; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s 2; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s 3; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s 4 5; FUNC-LABEL: {{^}}s_sint_to_fp_i32_to_f32: 6; SI: v_cvt_f32_i32_e32 {{v[0-9]+}}, {{s[0-9]+$}} 7 8; R600: INT_TO_FLT * T{{[0-9]+\.[XYZW]}}, KC0[2].Z 9define amdgpu_kernel void @s_sint_to_fp_i32_to_f32(float addrspace(1)* %out, i32 %in) #0 { 10 %result = sitofp i32 %in to float 11 store float %result, float addrspace(1)* %out 12 ret void 13} 14 15; FUNC-LABEL: {{^}}v_sint_to_fp_i32_to_f32: 16; SI: v_cvt_f32_i32_e32 {{v[0-9]+}}, {{v[0-9]+$}} 17 18; R600: INT_TO_FLT 19define amdgpu_kernel void @v_sint_to_fp_i32_to_f32(float addrspace(1)* %out, i32 addrspace(1)* %in) #0 { 20 %tid = call i32 @llvm.amdgcn.workitem.id.x() 21 %in.gep = getelementptr i32, i32 addrspace(1)* %in, i32 %tid 22 %out.gep = getelementptr float, float addrspace(1)* %out, i32 %tid 23 %val = load i32, i32 addrspace(1)* %in.gep 24 %result = sitofp i32 %val to float 25 store float %result, float addrspace(1)* %out.gep 26 ret void 27} 28 29; FUNC-LABEL: {{^}}s_sint_to_fp_v2i32: 30; SI: v_cvt_f32_i32_e32 31; SI: v_cvt_f32_i32_e32 32 33; R600-DAG: INT_TO_FLT * T{{[0-9]+\.[XYZW]}}, KC0[2].W 34; R600-DAG: INT_TO_FLT * T{{[0-9]+\.[XYZW]}}, KC0[3].X 35define amdgpu_kernel void @s_sint_to_fp_v2i32(<2 x float> addrspace(1)* %out, <2 x i32> %in) #0{ 36 %result = sitofp <2 x i32> %in to <2 x float> 37 store <2 x float> %result, <2 x float> addrspace(1)* %out 38 ret void 39} 40 41; FUNC-LABEL: {{^}}s_sint_to_fp_v4i32_to_v4f32: 42; SI: v_cvt_f32_i32_e32 43; SI: v_cvt_f32_i32_e32 44; SI: v_cvt_f32_i32_e32 45; SI: v_cvt_f32_i32_e32 46; SI: s_endpgm 47 48; R600: INT_TO_FLT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} 49; R600: INT_TO_FLT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} 50; R600: INT_TO_FLT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} 51; R600: INT_TO_FLT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} 52define amdgpu_kernel void @s_sint_to_fp_v4i32_to_v4f32(<4 x float> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) #0 { 53 %value = load <4 x i32>, <4 x i32> addrspace(1) * %in 54 %result = sitofp <4 x i32> %value to <4 x float> 55 store <4 x float> %result, <4 x float> addrspace(1)* %out 56 ret void 57} 58 59; FUNC-LABEL: {{^}}v_sint_to_fp_v4i32: 60; SI: v_cvt_f32_i32_e32 61; SI: v_cvt_f32_i32_e32 62; SI: v_cvt_f32_i32_e32 63; SI: v_cvt_f32_i32_e32 64 65; R600: INT_TO_FLT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} 66; R600: INT_TO_FLT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} 67; R600: INT_TO_FLT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} 68; R600: INT_TO_FLT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} 69define amdgpu_kernel void @v_sint_to_fp_v4i32(<4 x float> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) #0 { 70 %tid = call i32 @llvm.amdgcn.workitem.id.x() 71 %in.gep = getelementptr <4 x i32>, <4 x i32> addrspace(1)* %in, i32 %tid 72 %out.gep = getelementptr <4 x float>, <4 x float> addrspace(1)* %out, i32 %tid 73 %value = load <4 x i32>, <4 x i32> addrspace(1)* %in.gep 74 %result = sitofp <4 x i32> %value to <4 x float> 75 store <4 x float> %result, <4 x float> addrspace(1)* %out.gep 76 ret void 77} 78 79; FUNC-LABEL: {{^}}s_sint_to_fp_i1_f32: 80; SI: v_cmp_eq_u32_e64 [[CMP:s\[[0-9]+:[0-9]\]]], 81; SI: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, 1.0, [[CMP]] 82; SI: buffer_store_dword [[RESULT]], 83; SI: s_endpgm 84define amdgpu_kernel void @s_sint_to_fp_i1_f32(float addrspace(1)* %out, i32 %in) #0 { 85 %cmp = icmp eq i32 %in, 0 86 %fp = uitofp i1 %cmp to float 87 store float %fp, float addrspace(1)* %out 88 ret void 89} 90 91; FUNC-LABEL: {{^}}s_sint_to_fp_i1_f32_load: 92; SI: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, -1.0 93; SI: buffer_store_dword [[RESULT]], 94; SI: s_endpgm 95define amdgpu_kernel void @s_sint_to_fp_i1_f32_load(float addrspace(1)* %out, i1 %in) #0 { 96 %fp = sitofp i1 %in to float 97 store float %fp, float addrspace(1)* %out 98 ret void 99} 100 101; FUNC-LABEL: {{^}}v_sint_to_fp_i1_f32_load: 102; SI: {{buffer|flat}}_load_ubyte 103; SI: v_and_b32_e32 {{v[0-9]+}}, 1, {{v[0-9]+}} 104; SI: v_cmp_eq_u32 105; SI: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, -1.0 106; SI: {{buffer|flat}}_store_dword {{.*}}[[RESULT]] 107; SI: s_endpgm 108define amdgpu_kernel void @v_sint_to_fp_i1_f32_load(float addrspace(1)* %out, i1 addrspace(1)* %in) #0 { 109 %tid = call i32 @llvm.amdgcn.workitem.id.x() 110 %in.gep = getelementptr i1, i1 addrspace(1)* %in, i32 %tid 111 %out.gep = getelementptr float, float addrspace(1)* %out, i32 %tid 112 %val = load i1, i1 addrspace(1)* %in.gep 113 %fp = sitofp i1 %val to float 114 store float %fp, float addrspace(1)* %out.gep 115 ret void 116} 117 118declare i32 @llvm.amdgcn.workitem.id.x() #1 119 120attributes #0 = { nounwind } 121attributes #1 = { nounwind readnone } 122