1# RUN: llc -march=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -verify-machineinstrs -run-pass post-RA-hazard-rec -o - %s | FileCheck -check-prefix=GCN %s 2 3# GCN-LABEL: name: hazard_smem_war 4# GCN: S_LOAD_DWORD_IMM 5# GCN: $sgpr_null = S_MOV_B32 0 6# GCN-NEXT: V_CMP_EQ_F32 7--- 8name: hazard_smem_war 9body: | 10 bb.0: 11 liveins: $sgpr0, $sgpr1, $vgpr0, $vgpr1 12 $sgpr2 = S_LOAD_DWORD_IMM $sgpr0_sgpr1, 0, 0, 0 13 $sgpr0_sgpr1 = V_CMP_EQ_F32_e64 0, $vgpr0, 0, $vgpr1, 1, implicit $mode, implicit $exec 14 S_ENDPGM 0 15... 16 17# GCN-LABEL: name: hazard_smem_war_no_hazard 18# GCN: S_LOAD_DWORD_IMM 19# GCN-NEXT: S_ADD_U32 20# GCN-NEXT: V_CMP_EQ_F32 21--- 22name: hazard_smem_war_no_hazard 23body: | 24 bb.0: 25 liveins: $sgpr0, $sgpr1, $sgpr4, $sgpr5, $vgpr0, $vgpr1 26 $sgpr2 = S_LOAD_DWORD_IMM $sgpr0_sgpr1, 0, 0, 0 27 $sgpr3 = S_ADD_U32 $sgpr4, $sgpr5, implicit-def $scc 28 $sgpr0_sgpr1 = V_CMP_EQ_F32_e64 0, $vgpr0, 0, $vgpr1, 1, implicit $mode, implicit $exec 29 S_ENDPGM 0 30... 31 32# GCN-LABEL: name: hazard_smem_war_dependent_salu 33# GCN: S_LOAD_DWORD_IMM 34# GCN-NEXT: S_WAITCNT 35# GCN-NEXT: S_ADD_U32 36# GCN-NEXT: V_CMP_EQ_F32 37--- 38name: hazard_smem_war_dependent_salu 39body: | 40 bb.0: 41 liveins: $sgpr0, $sgpr1, $sgpr4, $vgpr0, $vgpr1 42 $sgpr2 = S_LOAD_DWORD_IMM $sgpr0_sgpr1, 0, 0, 0 43 S_WAITCNT 0 44 $sgpr3 = S_ADD_U32 $sgpr2, $sgpr4, implicit-def $scc 45 $sgpr0_sgpr1 = V_CMP_EQ_F32_e64 0, $vgpr0, 0, $vgpr1, 1, implicit $mode, implicit $exec 46 S_ENDPGM 0 47... 48 49# GCN-LABEL: name: hazard_smem_war_independent_salu 50# GCN: S_LOAD_DWORD_IMM 51# GCN-NEXT: S_WAITCNT 52# GCN-NEXT: S_ADD_U32 53# GCN-NEXT: V_CMP_EQ_F32 54--- 55name: hazard_smem_war_independent_salu 56body: | 57 bb.0: 58 liveins: $sgpr0, $sgpr1, $sgpr4, $sgpr5, $vgpr0, $vgpr1 59 $sgpr2 = S_LOAD_DWORD_IMM $sgpr0_sgpr1, 0, 0, 0 60 S_WAITCNT 0 61 $sgpr3 = S_ADD_U32 $sgpr5, $sgpr4, implicit-def $scc 62 $sgpr0_sgpr1 = V_CMP_EQ_F32_e64 0, $vgpr0, 0, $vgpr1, 1, implicit $mode, implicit $exec 63 S_ENDPGM 0 64... 65 66# GCN-LABEL: name: hazard_smem_war_only_smem 67# GCN: S_LOAD_DWORD_IMM 68# GCN-NEXT: S_LOAD_DWORD_IMM 69# GCN-NEXT: $sgpr_null = S_MOV_B32 0 70# GCN-NEXT: V_CMP_EQ_F32 71--- 72name: hazard_smem_war_only_smem 73body: | 74 bb.0: 75 liveins: $sgpr0, $sgpr1, $sgpr6, $sgpr7, $vgpr0, $vgpr1 76 $sgpr2 = S_LOAD_DWORD_IMM $sgpr0_sgpr1, 0, 0, 0 77 $sgpr5 = S_LOAD_DWORD_IMM $sgpr6_sgpr7, 0, 0, 0 78 $sgpr0_sgpr1 = V_CMP_EQ_F32_e64 0, $vgpr0, 0, $vgpr1, 1, implicit $mode, implicit $exec 79 S_ENDPGM 0 80... 81 82# GCN-LABEL: name: hazard_smem_war_only_waitcnt_0 83# GCN: S_LOAD_DWORD_IMM 84# GCN-NEXT: S_WAITCNT 85# GCN-NEXT: V_CMP_EQ_F32 86--- 87name: hazard_smem_war_only_waitcnt_0 88body: | 89 bb.0: 90 liveins: $sgpr0, $sgpr1, $vgpr0, $vgpr1 91 $sgpr2 = S_LOAD_DWORD_IMM $sgpr0_sgpr1, 0, 0, 0 92 S_WAITCNT 0 93 $sgpr0_sgpr1 = V_CMP_EQ_F32_e64 0, $vgpr0, 0, $vgpr1, 1, implicit $mode, implicit $exec 94 S_ENDPGM 0 95... 96 97# GCN-LABEL: name: hazard_smem_war_only_vmcnt_0 98# GCN: S_LOAD_DWORD_IMM 99# GCN-NEXT: S_WAITCNT 3952{{$}} 100# GCN-NEXT: $sgpr_null = S_MOV_B32 0 101# GCN-NEXT: V_CMP_EQ_F32 102--- 103name: hazard_smem_war_only_vmcnt_0 104body: | 105 bb.0: 106 liveins: $sgpr0, $sgpr1, $vgpr0, $vgpr1 107 $sgpr2 = S_LOAD_DWORD_IMM $sgpr0_sgpr1, 0, 0, 0 108 S_WAITCNT 3952 109 $sgpr0_sgpr1 = V_CMP_EQ_F32_e64 0, $vgpr0, 0, $vgpr1, 1, implicit $mode, implicit $exec 110 S_ENDPGM 0 111... 112 113# GCN-LABEL: name: hazard_smem_war_only_expcnt_0 114# GCN: S_LOAD_DWORD_IMM 115# GCN-NEXT: S_WAITCNT 53007{{$}} 116# GCN-NEXT: $sgpr_null = S_MOV_B32 0 117# GCN-NEXT: V_CMP_EQ_F32 118--- 119name: hazard_smem_war_only_expcnt_0 120body: | 121 bb.0: 122 liveins: $sgpr0, $sgpr1, $vgpr0, $vgpr1 123 $sgpr2 = S_LOAD_DWORD_IMM $sgpr0_sgpr1, 0, 0, 0 124 S_WAITCNT 53007 125 $sgpr0_sgpr1 = V_CMP_EQ_F32_e64 0, $vgpr0, 0, $vgpr1, 1, implicit $mode, implicit $exec 126 S_ENDPGM 0 127... 128 129# GCN-LABEL: name: hazard_smem_war_only_lgkmcnt_0 130# GCN: S_LOAD_DWORD_IMM 131# GCN-NEXT: S_WAITCNT 49279{{$}} 132# GCN-NEXT: V_CMP_EQ_F32 133--- 134name: hazard_smem_war_only_lgkmcnt_0 135body: | 136 bb.0: 137 liveins: $sgpr0, $sgpr1, $vgpr0, $vgpr1 138 $sgpr2 = S_LOAD_DWORD_IMM $sgpr0_sgpr1, 0, 0, 0 139 S_WAITCNT 49279 140 $sgpr0_sgpr1 = V_CMP_EQ_F32_e64 0, $vgpr0, 0, $vgpr1, 1, implicit $mode, implicit $exec 141 S_ENDPGM 0 142... 143 144# GCN-LABEL: name: hazard_smem_war_only_waitcnt_lgkmcnt_0 145# GCN: S_LOAD_DWORD_IMM 146# GCN-NEXT: S_WAITCNT_LGKMCNT 147# GCN-NEXT: V_CMP_EQ_F32 148--- 149name: hazard_smem_war_only_waitcnt_lgkmcnt_0 150body: | 151 bb.0: 152 liveins: $sgpr0, $sgpr1, $vgpr0, $vgpr1 153 $sgpr2 = S_LOAD_DWORD_IMM $sgpr0_sgpr1, 0, 0, 0 154 S_WAITCNT_LGKMCNT $sgpr_null, 0 155 $sgpr0_sgpr1 = V_CMP_EQ_F32_e64 0, $vgpr0, 0, $vgpr1, 1, implicit $mode, implicit $exec 156 S_ENDPGM 0 157... 158 159# GCN-LABEL: name: hazard_smem_war_only_waitcnt_lgkmcnt_1 160# GCN: S_LOAD_DWORD_IMM 161# GCN-NEXT: S_WAITCNT_LGKMCNT 162# GCN-NEXT: $sgpr_null = S_MOV_B32 0 163# GCN-NEXT: V_CMP_EQ_F32 164--- 165name: hazard_smem_war_only_waitcnt_lgkmcnt_1 166body: | 167 bb.0: 168 liveins: $sgpr0, $sgpr1, $vgpr0, $vgpr1 169 $sgpr2 = S_LOAD_DWORD_IMM $sgpr0_sgpr1, 0, 0, 0 170 S_WAITCNT_LGKMCNT $sgpr_null, 1 171 $sgpr0_sgpr1 = V_CMP_EQ_F32_e64 0, $vgpr0, 0, $vgpr1, 1, implicit $mode, implicit $exec 172 S_ENDPGM 0 173... 174 175# GCN-LABEL: name: hazard_smem_war_branch 176# GCN: S_LOAD_DWORD_IMM 177# GCN: $sgpr_null = S_MOV_B32 0 178# GCN-NEXT: V_CMP_EQ_F32 179--- 180name: hazard_smem_war_branch 181body: | 182 bb.0: 183 liveins: $sgpr0, $sgpr1, $sgpr4, $vgpr0, $vgpr1 184 successors: %bb.1 185 $sgpr2 = S_LOAD_DWORD_IMM $sgpr0_sgpr1, 0, 0, 0 186 S_BRANCH %bb.1 187 188 bb.1: 189 liveins: $sgpr0, $sgpr1, $sgpr2, $vgpr0, $vgpr1 190 $sgpr0_sgpr1 = V_CMP_EQ_F32_e64 0, $vgpr0, 0, $vgpr1, 1, implicit $mode, implicit $exec 191 S_ENDPGM 0 192... 193 194# GCN-LABEL: name: hazard_smem_war_cbranch 195# GCN: S_AND_B64 196# GCN: S_LOAD_DWORD_IMM 197# GCN: S_CBRANCH_VCCZ 198# GCN-NOT: $sgpr_null = S_MOV_B32 0 199# GCN: V_CMP_EQ_F32 200# GCN: S_ENDPGM 0 201# GCN: $sgpr_null = S_MOV_B32 0 202# GCN-NEXT: V_CMP_EQ_F32 203--- 204name: hazard_smem_war_cbranch 205body: | 206 bb.0: 207 liveins: $sgpr0, $sgpr1, $sgpr4, $sgpr5, $vgpr0, $vgpr1 208 successors: %bb.1, %bb.2 209 $vcc = S_AND_B64 $sgpr4_sgpr5, $sgpr4_sgpr5, implicit-def $scc 210 $sgpr2 = S_LOAD_DWORD_IMM $sgpr0_sgpr1, 0, 0, 0 211 S_CBRANCH_VCCZ %bb.2, implicit killed $vcc 212 213 bb.1: 214 liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr4, $sgpr5, $vgpr0, $vgpr1 215 $sgpr4_sgpr5 = V_CMP_EQ_F32_e64 0, $vgpr0, 0, $vgpr1, 1, implicit $mode, implicit $exec 216 S_ENDPGM 0 217 218 bb.2: 219 liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr4, $sgpr5, $vgpr0, $vgpr1 220 $sgpr0_sgpr1 = V_CMP_EQ_F32_e64 0, $vgpr0, 0, $vgpr1, 1, implicit $mode, implicit $exec 221 S_ENDPGM 0 222... 223 224# GCN-LABEL: name: hazard_smem_war_cbranch_carry 225# GCN: S_AND_B64 226# GCN: S_LOAD_DWORD_IMM 227# GCN: S_CBRANCH_VCCZ 228# GCN-NOT: $sgpr_null = S_MOV_B32 0 229# GCN: V_CMP_EQ_F32 230# GCN-NEXT: S_ENDPGM 0 231# GCN-NOT: $sgpr_null = S_MOV_B32 0 232# GCN: V_CMP_EQ_F32 233# GCN: $sgpr_null = S_MOV_B32 0 234# GCN-NEXT: V_CMP_EQ_F32 235--- 236name: hazard_smem_war_cbranch_carry 237body: | 238 bb.0: 239 liveins: $sgpr0, $sgpr1, $sgpr4, $sgpr5, $vgpr0, $vgpr1 240 successors: %bb.1, %bb.2 241 $vcc = S_AND_B64 $sgpr4_sgpr5, $sgpr4_sgpr5, implicit-def $scc 242 $sgpr2 = S_LOAD_DWORD_IMM $sgpr0_sgpr1, 0, 0, 0 243 S_CBRANCH_VCCZ %bb.2, implicit killed $vcc 244 245 bb.1: 246 liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr4, $sgpr5, $vgpr0, $vgpr1 247 $sgpr4_sgpr5 = V_CMP_EQ_F32_e64 0, $vgpr0, 0, $vgpr1, 1, implicit $mode, implicit $exec 248 S_ENDPGM 0 249 250 bb.2: 251 successors: %bb.3 252 liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr4, $sgpr5, $vgpr0, $vgpr1 253 $sgpr4_sgpr5 = V_CMP_EQ_F32_e64 0, $vgpr0, 0, $vgpr1, 1, implicit $mode, implicit $exec 254 255 bb.3: 256 liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr4, $sgpr5, $vgpr0, $vgpr1 257 $sgpr0_sgpr1 = V_CMP_EQ_F32_e64 0, $vgpr0, 0, $vgpr1, 1, implicit $mode, implicit $exec 258 S_ENDPGM 0 259... 260 261# GCN-LABEL: name: hazard_smem_war_backedge 262# GCN: $sgpr_null = S_MOV_B32 0 263# GCN-NEXT: V_CMP_EQ_F32 264# GCN: S_LOAD_DWORD_IMM 265--- 266name: hazard_smem_war_backedge 267body: | 268 bb.0: 269 liveins: $sgpr0, $sgpr1, $sgpr2, $vgpr0, $vgpr1 270 successors: %bb.1 271 $sgpr0_sgpr1 = V_CMP_EQ_F32_e64 0, $vgpr0, 0, $vgpr1, 1, implicit $mode, implicit $exec 272 273 bb.1: 274 liveins: $sgpr0, $sgpr1, $sgpr2, $vgpr0, $vgpr1 275 $sgpr2 = S_LOAD_DWORD_IMM $sgpr0_sgpr1, 0, 0, 0 276 S_BRANCH %bb.0 277... 278 279# GCN-LABEL: name: hazard_smem_war_impdef 280# GCN: S_LOAD_DWORD_IMM 281# GCN: $sgpr_null = S_MOV_B32 0 282# GCN-NEXT: V_CMP_EQ_F32 283--- 284name: hazard_smem_war_impdef 285body: | 286 bb.0: 287 liveins: $vcc, $vgpr0 288 $sgpr0 = S_LOAD_DWORD_IMM $vcc, 0, 0, 0 289 V_CMP_EQ_F32_e32 $vgpr0, $vgpr0, implicit-def $vcc, implicit $mode, implicit $exec 290 S_ENDPGM 0 291... 292 293# GCN-LABEL: name: hazard_smem_war_readlane 294# GCN: S_LOAD_DWORD_IMM 295# GCN: $sgpr_null = S_MOV_B32 0 296# GCN-NEXT: V_READLANE_B32 297--- 298name: hazard_smem_war_readlane 299body: | 300 bb.0: 301 liveins: $sgpr0, $sgpr1, $sgpr3, $vgpr0 302 $sgpr2 = S_LOAD_DWORD_IMM $sgpr0_sgpr1, 0, 0, 0 303 $sgpr0 = V_READLANE_B32 $vgpr0, $sgpr3 304 S_ENDPGM 0 305... 306 307# GCN-LABEL: name: hazard_smem_war_readfirstlane 308# GCN: S_LOAD_DWORD_IMM 309# GCN: $sgpr_null = S_MOV_B32 0 310# GCN-NEXT: V_READFIRSTLANE_B32 311--- 312name: hazard_smem_war_readfirstlane 313body: | 314 bb.0: 315 liveins: $sgpr0, $sgpr1, $vgpr0 316 $sgpr2 = S_LOAD_DWORD_IMM $sgpr0_sgpr1, 0, 0, 0 317 $sgpr0 = V_READFIRSTLANE_B32 $vgpr0, implicit $exec 318 S_ENDPGM 0 319... 320