1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -march=amdgcn -mcpu=tahiti -run-pass=regallocfast -o - %s | FileCheck -check-prefix=SPILLED %s
3# RUN: llc -march=amdgcn -mcpu=tahiti -run-pass=regallocfast,si-lower-sgpr-spills -o - %s | FileCheck -check-prefix=EXPANDED %s
4
5# Make sure spill/restore of 192 bit registers works. We have to
6# settle for a MIR test for now since inlineasm fails without 192-bit
7# MVT.
8
9---
10name: spill_restore_sgpr192
11tracksRegLiveness: true
12machineFunctionInfo:
13  scratchRSrcReg: $sgpr0_sgpr1_sgpr2_sgpr3
14  stackPtrOffsetReg: $sgpr32
15body: |
16  ; SPILLED-LABEL: name: spill_restore_sgpr192
17  ; SPILLED: bb.0:
18  ; SPILLED:   successors: %bb.1(0x80000000)
19  ; SPILLED:   S_NOP 0, implicit-def renamable $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9
20  ; SPILLED:   SI_SPILL_S192_SAVE killed $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9, %stack.0, implicit $exec, implicit $sgpr32 :: (store 24 into %stack.0, align 4, addrspace 5)
21  ; SPILLED:   S_CBRANCH_SCC1 %bb.1, implicit undef $scc
22  ; SPILLED: bb.1:
23  ; SPILLED:   successors: %bb.2(0x80000000)
24  ; SPILLED:   S_NOP 1
25  ; SPILLED: bb.2:
26  ; SPILLED:   $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9 = SI_SPILL_S192_RESTORE %stack.0, implicit $exec, implicit $sgpr32 :: (load 24 from %stack.0, align 4, addrspace 5)
27  ; SPILLED:   S_NOP 0, implicit killed renamable $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9
28  ; EXPANDED-LABEL: name: spill_restore_sgpr192
29  ; EXPANDED: bb.0:
30  ; EXPANDED:   successors: %bb.1(0x80000000)
31  ; EXPANDED:   liveins: $vgpr0
32  ; EXPANDED:   S_NOP 0, implicit-def renamable $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9
33  ; EXPANDED:   $vgpr0 = V_WRITELANE_B32 $sgpr4, 0, undef $vgpr0, implicit-def $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9, implicit $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9
34  ; EXPANDED:   $vgpr0 = V_WRITELANE_B32 $sgpr5, 1, $vgpr0, implicit $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9
35  ; EXPANDED:   $vgpr0 = V_WRITELANE_B32 $sgpr6, 2, $vgpr0, implicit $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9
36  ; EXPANDED:   $vgpr0 = V_WRITELANE_B32 $sgpr7, 3, $vgpr0, implicit $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9
37  ; EXPANDED:   $vgpr0 = V_WRITELANE_B32 $sgpr8, 4, $vgpr0, implicit $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9
38  ; EXPANDED:   $vgpr0 = V_WRITELANE_B32 killed $sgpr9, 5, $vgpr0, implicit killed $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9
39  ; EXPANDED:   S_CBRANCH_SCC1 %bb.1, implicit undef $scc
40  ; EXPANDED: bb.1:
41  ; EXPANDED:   successors: %bb.2(0x80000000)
42  ; EXPANDED:   liveins: $vgpr0
43  ; EXPANDED:   S_NOP 1
44  ; EXPANDED: bb.2:
45  ; EXPANDED:   liveins: $vgpr0
46  ; EXPANDED:   $sgpr4 = V_READLANE_B32 $vgpr0, 0, implicit-def $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9
47  ; EXPANDED:   $sgpr5 = V_READLANE_B32 $vgpr0, 1
48  ; EXPANDED:   $sgpr6 = V_READLANE_B32 $vgpr0, 2
49  ; EXPANDED:   $sgpr7 = V_READLANE_B32 $vgpr0, 3
50  ; EXPANDED:   $sgpr8 = V_READLANE_B32 $vgpr0, 4
51  ; EXPANDED:   $sgpr9 = V_READLANE_B32 $vgpr0, 5
52  ; EXPANDED:   S_NOP 0, implicit killed renamable $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9
53  bb.0:
54    S_NOP 0, implicit-def %0:sgpr_192
55    S_CBRANCH_SCC1 implicit undef $scc, %bb.1
56
57  bb.1:
58    S_NOP 1
59
60  bb.2:
61    S_NOP 0, implicit %0
62...
63
64---
65name: spill_restore_vgpr192
66tracksRegLiveness: true
67machineFunctionInfo:
68  scratchRSrcReg: $sgpr0_sgpr1_sgpr2_sgpr3
69  stackPtrOffsetReg: $sgpr32
70body: |
71  ; SPILLED-LABEL: name: spill_restore_vgpr192
72  ; SPILLED: bb.0:
73  ; SPILLED:   successors: %bb.1(0x80000000)
74  ; SPILLED:   S_NOP 0, implicit-def renamable $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5
75  ; SPILLED:   SI_SPILL_V192_SAVE killed $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5, %stack.0, $sgpr32, 0, implicit $exec :: (store 24 into %stack.0, align 4, addrspace 5)
76  ; SPILLED:   S_CBRANCH_SCC1 %bb.1, implicit undef $scc
77  ; SPILLED: bb.1:
78  ; SPILLED:   successors: %bb.2(0x80000000)
79  ; SPILLED:   S_NOP 1
80  ; SPILLED: bb.2:
81  ; SPILLED:   $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5 = SI_SPILL_V192_RESTORE %stack.0, $sgpr32, 0, implicit $exec :: (load 24 from %stack.0, align 4, addrspace 5)
82  ; SPILLED:   S_NOP 0, implicit killed renamable $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5
83  ; EXPANDED-LABEL: name: spill_restore_vgpr192
84  ; EXPANDED: bb.0:
85  ; EXPANDED:   successors: %bb.1(0x80000000)
86  ; EXPANDED:   S_NOP 0, implicit-def renamable $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5
87  ; EXPANDED:   SI_SPILL_V192_SAVE killed $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5, %stack.0, $sgpr32, 0, implicit $exec :: (store 24 into %stack.0, align 4, addrspace 5)
88  ; EXPANDED:   S_CBRANCH_SCC1 %bb.1, implicit undef $scc
89  ; EXPANDED: bb.1:
90  ; EXPANDED:   successors: %bb.2(0x80000000)
91  ; EXPANDED:   S_NOP 1
92  ; EXPANDED: bb.2:
93  ; EXPANDED:   $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5 = SI_SPILL_V192_RESTORE %stack.0, $sgpr32, 0, implicit $exec :: (load 24 from %stack.0, align 4, addrspace 5)
94  ; EXPANDED:   S_NOP 0, implicit killed renamable $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5
95  bb.0:
96    S_NOP 0, implicit-def %0:vreg_192
97    S_CBRANCH_SCC1 implicit undef $scc, %bb.1
98
99  bb.1:
100    S_NOP 1
101
102  bb.2:
103    S_NOP 0, implicit %0
104...
105