1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s 3 4; Test that when extracting the same unknown vector index from an 5; insertelement the dynamic indexing is folded away. 6 7declare i32 @llvm.amdgcn.workitem.id.x() #0 8 9; No dynamic indexing required 10define amdgpu_kernel void @extract_insert_same_dynelt_v4i32(i32 addrspace(1)* %out, <4 x i32> addrspace(1)* %in, i32 %val, i32 %idx) #1 { 11; GCN-LABEL: extract_insert_same_dynelt_v4i32: 12; GCN: ; %bb.0: 13; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9 14; GCN-NEXT: s_load_dword s0, s[0:1], 0xd 15; GCN-NEXT: s_waitcnt lgkmcnt(0) 16; GCN-NEXT: s_mov_b32 s7, 0xf000 17; GCN-NEXT: s_mov_b32 s6, 0 18; GCN-NEXT: v_lshlrev_b32_e32 v0, 2, v0 19; GCN-NEXT: v_mov_b32_e32 v1, 0 20; GCN-NEXT: v_mov_b32_e32 v2, s0 21; GCN-NEXT: buffer_store_dword v2, v[0:1], s[4:7], 0 addr64 22; GCN-NEXT: s_endpgm 23 %id = call i32 @llvm.amdgcn.workitem.id.x() 24 %id.ext = sext i32 %id to i64 25 %gep.in = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %in, i64 %id.ext 26 %gep.out = getelementptr inbounds i32, i32 addrspace(1)* %out, i64 %id.ext 27 %vec = load <4 x i32>, <4 x i32> addrspace(1)* %gep.in 28 %insert = insertelement <4 x i32> %vec, i32 %val, i32 %idx 29 %extract = extractelement <4 x i32> %insert, i32 %idx 30 store i32 %extract, i32 addrspace(1)* %gep.out 31 ret void 32} 33 34define amdgpu_kernel void @extract_insert_different_dynelt_v4i32(i32 addrspace(1)* %out, <4 x i32> addrspace(1)* %in, i32 %val, i32 %idx0, i32 %idx1) #1 { 35; GCN-LABEL: extract_insert_different_dynelt_v4i32: 36; GCN: ; %bb.0: 37; GCN-NEXT: s_load_dwordx4 s[8:11], s[0:1], 0x9 38; GCN-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0xd 39; GCN-NEXT: v_mov_b32_e32 v5, 0 40; GCN-NEXT: s_mov_b32 s7, 0xf000 41; GCN-NEXT: s_mov_b32 s6, 0 42; GCN-NEXT: s_waitcnt lgkmcnt(0) 43; GCN-NEXT: s_mov_b64 s[4:5], s[10:11] 44; GCN-NEXT: v_lshlrev_b32_e32 v4, 4, v0 45; GCN-NEXT: buffer_load_dwordx4 v[1:4], v[4:5], s[4:7], 0 addr64 46; GCN-NEXT: s_load_dword s0, s[0:1], 0xf 47; GCN-NEXT: v_lshlrev_b32_e32 v6, 2, v0 48; GCN-NEXT: v_mov_b32_e32 v0, s2 49; GCN-NEXT: v_cmp_eq_u32_e64 vcc, s3, 3 50; GCN-NEXT: v_mov_b32_e32 v7, v5 51; GCN-NEXT: s_mov_b64 s[10:11], s[6:7] 52; GCN-NEXT: s_waitcnt vmcnt(0) 53; GCN-NEXT: v_cndmask_b32_e32 v4, v4, v0, vcc 54; GCN-NEXT: v_cmp_eq_u32_e64 vcc, s3, 2 55; GCN-NEXT: v_cndmask_b32_e32 v3, v3, v0, vcc 56; GCN-NEXT: v_cmp_eq_u32_e64 vcc, s3, 1 57; GCN-NEXT: v_cndmask_b32_e32 v2, v2, v0, vcc 58; GCN-NEXT: v_cmp_eq_u32_e64 vcc, s3, 0 59; GCN-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc 60; GCN-NEXT: s_waitcnt lgkmcnt(0) 61; GCN-NEXT: v_cmp_eq_u32_e64 vcc, s0, 1 62; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc 63; GCN-NEXT: v_cmp_eq_u32_e64 vcc, s0, 2 64; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc 65; GCN-NEXT: v_cmp_eq_u32_e64 vcc, s0, 3 66; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc 67; GCN-NEXT: buffer_store_dword v0, v[6:7], s[8:11], 0 addr64 68; GCN-NEXT: s_endpgm 69 %id = call i32 @llvm.amdgcn.workitem.id.x() 70 %id.ext = sext i32 %id to i64 71 %gep.in = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %in, i64 %id.ext 72 %gep.out = getelementptr inbounds i32, i32 addrspace(1)* %out, i64 %id.ext 73 %vec = load <4 x i32>, <4 x i32> addrspace(1)* %gep.in 74 %insert = insertelement <4 x i32> %vec, i32 %val, i32 %idx0 75 %extract = extractelement <4 x i32> %insert, i32 %idx1 76 store i32 %extract, i32 addrspace(1)* %gep.out 77 ret void 78} 79 80define amdgpu_kernel void @extract_insert_same_elt2_v4i32(i32 addrspace(1)* %out, <4 x i32> addrspace(1)* %in, i32 %val, i32 %idx) #1 { 81; GCN-LABEL: extract_insert_same_elt2_v4i32: 82; GCN: ; %bb.0: 83; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9 84; GCN-NEXT: s_load_dword s0, s[0:1], 0xd 85; GCN-NEXT: s_waitcnt lgkmcnt(0) 86; GCN-NEXT: s_mov_b32 s7, 0xf000 87; GCN-NEXT: s_mov_b32 s6, 0 88; GCN-NEXT: v_lshlrev_b32_e32 v0, 2, v0 89; GCN-NEXT: v_mov_b32_e32 v1, 0 90; GCN-NEXT: v_mov_b32_e32 v2, s0 91; GCN-NEXT: buffer_store_dword v2, v[0:1], s[4:7], 0 addr64 92; GCN-NEXT: s_endpgm 93 %id = call i32 @llvm.amdgcn.workitem.id.x() 94 %id.ext = sext i32 %id to i64 95 %gep.in = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %in, i64 %id.ext 96 %gep.out = getelementptr inbounds i32, i32 addrspace(1)* %out, i64 %id.ext 97 %vec = load <4 x i32>, <4 x i32> addrspace(1)* %gep.in 98 %insert = insertelement <4 x i32> %vec, i32 %val, i32 %idx 99 %extract = extractelement <4 x i32> %insert, i32 %idx 100 store i32 %extract, i32 addrspace(1)* %gep.out 101 ret void 102} 103 104define amdgpu_kernel void @extract_insert_same_dynelt_v4f32(float addrspace(1)* %out, <4 x float> addrspace(1)* %in, float %val, i32 %idx) #1 { 105; GCN-LABEL: extract_insert_same_dynelt_v4f32: 106; GCN: ; %bb.0: 107; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9 108; GCN-NEXT: s_load_dword s8, s[0:1], 0xd 109; GCN-NEXT: v_mov_b32_e32 v2, 0 110; GCN-NEXT: s_mov_b32 s3, 0xf000 111; GCN-NEXT: s_mov_b32 s2, 0 112; GCN-NEXT: s_waitcnt lgkmcnt(0) 113; GCN-NEXT: s_mov_b64 s[0:1], s[6:7] 114; GCN-NEXT: v_lshlrev_b32_e32 v1, 4, v0 115; GCN-NEXT: v_lshlrev_b32_e32 v4, 2, v0 116; GCN-NEXT: v_mov_b32_e32 v5, v2 117; GCN-NEXT: buffer_load_dwordx4 v[0:3], v[1:2], s[0:3], 0 addr64 118; GCN-NEXT: s_mov_b64 s[6:7], s[2:3] 119; GCN-NEXT: s_waitcnt vmcnt(0) 120; GCN-NEXT: v_mov_b32_e32 v0, s8 121; GCN-NEXT: buffer_store_dword v0, v[4:5], s[4:7], 0 addr64 122; GCN-NEXT: s_endpgm 123 %id = call i32 @llvm.amdgcn.workitem.id.x() 124 %id.ext = sext i32 %id to i64 125 %gep.in = getelementptr inbounds <4 x float>, <4 x float> addrspace(1)* %in, i64 %id.ext 126 %gep.out = getelementptr inbounds float, float addrspace(1)* %out, i64 %id.ext 127 %vec = load volatile <4 x float>, <4 x float> addrspace(1)* %gep.in 128 %insert = insertelement <4 x float> %vec, float %val, i32 %idx 129 %extract = extractelement <4 x float> %insert, i32 %idx 130 store float %extract, float addrspace(1)* %gep.out 131 ret void 132} 133 134attributes #0 = { nounwind readnone } 135attributes #1 = { nounwind } 136