1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -march=amdgcn -mcpu=gfx1010 | FileCheck %s --check-prefix=GCN 3 4define void @vgpr_descriptor_waterfall_loop_idom_update(<4 x i32>* %arg) #0 { 5; GCN-LABEL: vgpr_descriptor_waterfall_loop_idom_update: 6; GCN: ; %bb.0: ; %entry 7; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 8; GCN-NEXT: s_waitcnt_vscnt null, 0x0 9; GCN-NEXT: BB0_1: ; %bb0 10; GCN-NEXT: ; =>This Loop Header: Depth=1 11; GCN-NEXT: ; Child Loop BB0_2 Depth 2 12; GCN-NEXT: v_add_co_u32_e64 v2, vcc_lo, v0, 8 13; GCN-NEXT: s_mov_b32 s5, exec_lo 14; GCN-NEXT: v_add_co_ci_u32_e32 v3, vcc_lo, 0, v1, vcc_lo 15; GCN-NEXT: s_clause 0x1 16; GCN-NEXT: flat_load_dwordx2 v[2:3], v[2:3] 17; GCN-NEXT: flat_load_dwordx2 v[4:5], v[0:1] 18; GCN-NEXT: BB0_2: ; Parent Loop BB0_1 Depth=1 19; GCN-NEXT: ; => This Inner Loop Header: Depth=2 20; GCN-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) 21; GCN-NEXT: v_readfirstlane_b32 s8, v4 22; GCN-NEXT: v_readfirstlane_b32 s9, v5 23; GCN-NEXT: v_readfirstlane_b32 s10, v2 24; GCN-NEXT: v_readfirstlane_b32 s11, v3 25; GCN-NEXT: v_cmp_eq_u64_e32 vcc_lo, s[8:9], v[4:5] 26; GCN-NEXT: v_cmp_eq_u64_e64 s4, s[10:11], v[2:3] 27; GCN-NEXT: s_and_b32 s4, vcc_lo, s4 28; GCN-NEXT: s_and_saveexec_b32 s4, s4 29; GCN-NEXT: s_nop 0 30; GCN-NEXT: buffer_store_dword v0, v0, s[8:11], 0 offen 31; GCN-NEXT: s_waitcnt_depctr 0xffe3 32; GCN-NEXT: s_xor_b32 exec_lo, exec_lo, s4 33; GCN-NEXT: s_cbranch_execnz BB0_2 34; GCN-NEXT: ; %bb.3: ; in Loop: Header=BB0_1 Depth=1 35; GCN-NEXT: s_mov_b32 exec_lo, s5 36; GCN-NEXT: s_branch BB0_1 37entry: 38 br label %bb0 39 40bb0: 41 %desc = load <4 x i32>, <4 x i32>* %arg, align 8 42 tail call void @llvm.amdgcn.raw.buffer.store.f32(float undef, <4 x i32> %desc, i32 undef, i32 0, i32 0) 43 br label %bb0 44} 45 46declare void @llvm.amdgcn.raw.buffer.store.f32(float, <4 x i32>, i32, i32, i32 immarg) #0 47 48attributes #0 = { nounwind writeonly } 49