1; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
2; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
3
4; Test that we correctly commute a sub instruction
5; FUNC-LABEL: {{^}}sub_rev:
6; SI-NOT: v_sub_i32_e32 v{{[0-9]+}}, vcc, s
7; SI: v_subrev_{{[iu]}}32_e32 v{{[0-9]+}}, vcc, s
8
9; ModuleID = 'vop-shrink.ll'
10
11define amdgpu_kernel void @sub_rev(i32 addrspace(1)* %out, <4 x i32> %sgpr, i32 %cond) {
12entry:
13  %vgpr = call i32 @llvm.amdgcn.workitem.id.x() #1
14  %tmp = icmp eq i32 %cond, 0
15  br i1 %tmp, label %if, label %else
16
17if:                                               ; preds = %entry
18  %tmp1 = getelementptr i32, i32 addrspace(1)* %out, i32 1
19  %tmp2 = extractelement <4 x i32> %sgpr, i32 1
20  store i32 %tmp2, i32 addrspace(1)* %out
21  br label %endif
22
23else:                                             ; preds = %entry
24  %tmp3 = extractelement <4 x i32> %sgpr, i32 2
25  %tmp4 = sub i32 %vgpr, %tmp3
26  store i32 %tmp4, i32 addrspace(1)* %out
27  br label %endif
28
29endif:                                            ; preds = %else, %if
30  ret void
31}
32
33; Test that we fold an immediate that was illegal for a 64-bit op into the
34; 32-bit op when we shrink it.
35
36; FUNC-LABEL: {{^}}add_fold:
37; SI: v_add_f32_e32 v{{[0-9]+}}, 0x44800000
38define amdgpu_kernel void @add_fold(float addrspace(1)* %out) {
39entry:
40  %tmp = call i32 @llvm.amdgcn.workitem.id.x()
41  %tmp1 = uitofp i32 %tmp to float
42  %tmp2 = fadd float %tmp1, 1.024000e+03
43  store float %tmp2, float addrspace(1)* %out
44  ret void
45}
46
47; Function Attrs: nounwind readnone
48declare i32 @llvm.amdgcn.workitem.id.x() #0
49
50attributes #0 = { nounwind readnone }
51attributes #1 = { readnone }
52