1; RUN: llc -O1 -mtriple=armv6-none-none-eabi %s -o - | FileCheck %s
2; RUN: llc -O1 -mtriple=armv7-none-none-eabi %s -o - | FileCheck %s
3; RUN: llc -O1 -mtriple=thumbv7-none-none-eabi %s -o - | FileCheck %s
4; RUN: llc -O1 -mtriple=thumbv6t2-none-none-eabi %s -o - | FileCheck %s
5; RUN: llc -O1 -mtriple=thumbv7em-none-none-eabi %s -o - | FileCheck %s
6; RUN: llc -O1 -mtriple=thumbv8m.main-none-none-eabi -mattr=+dsp %s -o - | FileCheck %s
7
8
9; upper-bound of the immediate argument
10define i32 @ssat1(i32 %a) nounwind {
11; CHECK-LABEL: ssat1
12; CHECK: ssat r0, #32, r0
13  %tmp = call i32 @llvm.arm.ssat(i32 %a, i32 32)
14  ret i32 %tmp
15}
16
17; lower-bound of the immediate argument
18define i32 @ssat2(i32 %a) nounwind {
19; CHECK-LABEL: ssat2
20; CHECK: ssat r0, #1, r0
21  %tmp = call i32 @llvm.arm.ssat(i32 %a, i32 1)
22  ret i32 %tmp
23}
24
25; upper-bound of the immediate argument
26define i32 @usat1(i32 %a) nounwind {
27; CHECK-LABEL: usat1
28; CHECK: usat r0, #31, r0
29  %tmp = call i32 @llvm.arm.usat(i32 %a, i32 31)
30  ret i32 %tmp
31}
32
33; lower-bound of the immediate argument
34define i32 @usat2(i32 %a) nounwind {
35; CHECK-LABEL: usat2
36; CHECK: usat r0, #0, r0
37  %tmp = call i32 @llvm.arm.usat(i32 %a, i32 0)
38  ret i32 %tmp
39}
40
41define i32 @ssat16 (i32 %a) nounwind {
42; CHECK-LABEL: ssat16
43; CHECK: ssat16 r0, #1, r0
44; CHECK: ssat16 r0, #16, r0
45  %tmp = call i32 @llvm.arm.ssat16(i32 %a, i32 1)
46  %tmp2 = call i32 @llvm.arm.ssat16(i32 %tmp, i32 16)
47  ret i32 %tmp2
48}
49
50define i32 @usat16(i32 %a) nounwind {
51; CHECK-LABEL: usat16
52; CHECK: usat16 r0, #0, r0
53; CHECK: usat16 r0, #15, r0
54  %tmp = call i32 @llvm.arm.usat16(i32 %a, i32 0)
55  %tmp2 = call i32 @llvm.arm.usat16(i32 %tmp, i32 15)
56  ret i32 %tmp2
57}
58
59define i32 @pack_unpack(i32 %a, i32 %b) nounwind {
60; CHECK-LABEL: pack_unpack
61; CHECK: sxtab16 r0, r0, r1
62; CHECK: sxtb16 r0, r0
63; CHECK: uxtab16 r0, r1, r0
64; CHECK: uxtb16 r0, r0
65  %tmp = call i32 @llvm.arm.sxtab16(i32 %a, i32 %b)
66  %tmp1 = call i32 @llvm.arm.sxtb16(i32 %tmp)
67  %tmp2 = call i32 @llvm.arm.uxtab16(i32 %b, i32 %tmp1)
68  %tmp3 = call i32 @llvm.arm.uxtb16(i32 %tmp2)
69  ret i32 %tmp3
70}
71
72define i32 @sel(i32 %a, i32 %b) nounwind {
73; CHECK-LABEL: sel
74; CHECK: sel r0, r0, r1
75  %tmp = call i32 @llvm.arm.sel(i32 %a, i32 %b)
76  ret i32 %tmp
77}
78
79define i32 @qadd8(i32 %a, i32 %b) nounwind {
80; CHECK-LABEL: qadd8
81; CHECK: qadd8 r0, r0, r1
82  %tmp = call i32 @llvm.arm.qadd8(i32 %a, i32 %b)
83  ret i32 %tmp
84}
85
86define i32 @qsub8(i32 %a, i32 %b) nounwind {
87; CHECK-LABEL: qsub8
88; CHECK: qsub8 r0, r0, r1
89  %tmp = call i32 @llvm.arm.qsub8(i32 %a, i32 %b)
90  ret i32 %tmp
91}
92
93define i32 @sadd8(i32 %a, i32 %b) nounwind {
94; CHECK-LABEL: sadd8
95; CHECK: sadd8 r0, r0, r1
96  %tmp = call i32 @llvm.arm.sadd8(i32 %a, i32 %b)
97  ret i32 %tmp
98}
99
100define i32 @shadd8(i32 %a, i32 %b) nounwind {
101; CHECK-LABEL: shadd8
102; CHECK: shadd8 r0, r0, r1
103  %tmp = call i32 @llvm.arm.shadd8(i32 %a, i32 %b)
104  ret i32 %tmp
105}
106
107define i32 @shsub8(i32 %a, i32 %b) nounwind {
108; CHECK-LABEL: shsub8
109; CHECK: shsub8 r0, r0, r1
110  %tmp = call i32 @llvm.arm.shsub8(i32 %a, i32 %b)
111  ret i32 %tmp
112}
113
114define i32 @ssub8(i32 %a, i32 %b) nounwind {
115; CHECK-LABEL: ssub8
116; CHECK: ssub8 r0, r0, r1
117  %tmp = call i32 @llvm.arm.ssub8(i32 %a, i32 %b)
118  ret i32 %tmp
119}
120
121define i32 @uadd8(i32 %a, i32 %b) nounwind {
122; CHECK-LABEL: uadd8
123; CHECK: uadd8 r0, r0, r1
124  %tmp = call i32 @llvm.arm.uadd8(i32 %a, i32 %b)
125  ret i32 %tmp
126}
127
128define i32 @uhadd8(i32 %a, i32 %b) nounwind {
129; CHECK-LABEL: uhadd8
130; CHECK: uhadd8 r0, r0, r1
131  %tmp = call i32 @llvm.arm.uhadd8(i32 %a, i32 %b)
132  ret i32 %tmp
133}
134
135define i32 @uhsub8(i32 %a, i32 %b) nounwind {
136; CHECK-LABEL: uhsub8
137; CHECK: uhsub8 r0, r0, r1
138  %tmp = call i32 @llvm.arm.uhsub8(i32 %a, i32 %b)
139  ret i32 %tmp
140}
141
142define i32 @uqadd8(i32 %a, i32 %b) nounwind {
143; CHECK-LABEL: uqadd8
144; CHECK: uqadd8 r0, r0, r1
145  %tmp = call i32 @llvm.arm.uqadd8(i32 %a, i32 %b)
146  ret i32 %tmp
147}
148
149define i32 @uqsub8(i32 %a, i32 %b) nounwind {
150; CHECK-LABEL: uqsub8
151; CHECK: uqsub8 r0, r0, r1
152  %tmp = call i32 @llvm.arm.uqsub8(i32 %a, i32 %b)
153  ret i32 %tmp
154}
155
156define i32 @usub8(i32 %a, i32 %b) nounwind {
157; CHECK-LABEL: usub8
158; CHECK: usub8 r0, r0, r1
159  %tmp = call i32 @llvm.arm.usub8(i32 %a, i32 %b)
160  ret i32 %tmp
161}
162
163define i32 @usad(i32 %a, i32 %b, i32 %c) nounwind {
164; CHECK-LABEL: usad
165; CHECK: usad8 r0, r0, r1
166; CHECK: usada8 r0, r0, r1, r2
167  %tmp = call i32 @llvm.arm.usad8(i32 %a, i32 %b)
168  %tmp1 = call i32 @llvm.arm.usada8(i32 %tmp, i32 %b, i32 %c)
169  ret i32 %tmp1
170}
171
172define i32 @qadd16(i32 %a, i32 %b) nounwind {
173; CHECK-LABEL: qadd16
174; CHECK: qadd16 r0, r0, r1
175  %tmp = call i32 @llvm.arm.qadd16(i32 %a, i32 %b)
176  ret i32 %tmp
177}
178
179define i32 @qasx(i32 %a, i32 %b) nounwind {
180; CHECK-LABEL: qasx
181; CHECK: qasx r0, r0, r1
182  %tmp = call i32 @llvm.arm.qasx(i32 %a, i32 %b)
183  ret i32 %tmp
184}
185
186define i32 @qsax(i32 %a, i32 %b) nounwind {
187; CHECK-LABEL: qsax
188; CHECK: qsax r0, r0, r1
189  %tmp = call i32 @llvm.arm.qsax(i32 %a, i32 %b)
190  ret i32 %tmp
191}
192
193define i32 @qsub16(i32 %a, i32 %b) nounwind {
194; CHECK-LABEL: qsub16
195; CHECK: qsub16 r0, r0, r1
196  %tmp = call i32 @llvm.arm.qsub16(i32 %a, i32 %b)
197  ret i32 %tmp
198}
199
200define i32 @sadd16(i32 %a, i32 %b) nounwind {
201; CHECK-LABEL: sadd16
202; CHECK: sadd16 r0, r0, r1
203  %tmp = call i32 @llvm.arm.sadd16(i32 %a, i32 %b)
204  ret i32 %tmp
205}
206
207define i32 @sasx(i32 %a, i32 %b) nounwind {
208; CHECK-LABEL: sasx
209; CHECK: sasx r0, r0, r1
210  %tmp = call i32 @llvm.arm.sasx(i32 %a, i32 %b)
211  ret i32 %tmp
212}
213
214define i32 @shadd16(i32 %a, i32 %b) nounwind {
215; CHECK-LABEL: shadd16
216; CHECK: shadd16 r0, r0, r1
217  %tmp = call i32 @llvm.arm.shadd16(i32 %a, i32 %b)
218  ret i32 %tmp
219}
220
221define i32 @shasx(i32 %a, i32 %b) nounwind {
222; CHECK-LABEL: shasx
223; CHECK: shasx r0, r0, r1
224  %tmp = call i32 @llvm.arm.shasx(i32 %a, i32 %b)
225  ret i32 %tmp
226}
227
228define i32 @shsax(i32 %a, i32 %b) nounwind {
229; CHECK-LABEL: shsax
230; CHECK: shsax r0, r0, r1
231  %tmp = call i32 @llvm.arm.shsax(i32 %a, i32 %b)
232  ret i32 %tmp
233}
234
235define i32 @shsub16(i32 %a, i32 %b) nounwind {
236; CHECK-LABEL: shsub16
237; CHECK: shsub16 r0, r0, r1
238  %tmp = call i32 @llvm.arm.shsub16(i32 %a, i32 %b)
239  ret i32 %tmp
240}
241
242define i32 @ssax(i32 %a, i32 %b) nounwind {
243; CHECK-LABEL: ssax
244; CHECK: ssax r0, r0, r1
245  %tmp = call i32 @llvm.arm.ssax(i32 %a, i32 %b)
246  ret i32 %tmp
247}
248
249define i32 @ssub16(i32 %a, i32 %b) nounwind {
250; CHECK-LABEL: ssub16
251; CHECK: ssub16 r0, r0, r1
252  %tmp = call i32 @llvm.arm.ssub16(i32 %a, i32 %b)
253  ret i32 %tmp
254}
255
256define i32 @uadd16(i32 %a, i32 %b) nounwind {
257; CHECK-LABEL: uadd16
258; CHECK: uadd16 r0, r0, r1
259  %tmp = call i32 @llvm.arm.uadd16(i32 %a, i32 %b)
260  ret i32 %tmp
261}
262
263define i32 @uasx(i32 %a, i32 %b) nounwind {
264; CHECK-LABEL: uasx
265; CHECK: uasx r0, r0, r1
266  %tmp = call i32 @llvm.arm.uasx(i32 %a, i32 %b)
267  ret i32 %tmp
268}
269
270define i32 @uhadd16(i32 %a, i32 %b) nounwind {
271; CHECK-LABEL: uhadd16
272; CHECK: uhadd16 r0, r0, r1
273  %tmp = call i32 @llvm.arm.uhadd16(i32 %a, i32 %b)
274  ret i32 %tmp
275}
276
277define i32 @uhasx(i32 %a, i32 %b) nounwind {
278; CHECK-LABEL: uhasx
279; CHECK: uhasx r0, r0, r1
280  %tmp = call i32 @llvm.arm.uhasx(i32 %a, i32 %b)
281  ret i32 %tmp
282}
283
284define i32 @uhsax(i32 %a, i32 %b) nounwind {
285; CHECK-LABEL: uhsax
286; CHECK: uhsax r0, r0, r1
287  %tmp = call i32 @llvm.arm.uhsax(i32 %a, i32 %b)
288  ret i32 %tmp
289}
290
291define i32 @uhsub16(i32 %a, i32 %b) nounwind {
292; CHECK-LABEL: uhsub16
293; CHECK: uhsub16 r0, r0, r1
294  %tmp = call i32 @llvm.arm.uhsub16(i32 %a, i32 %b)
295  ret i32 %tmp
296}
297
298define i32 @uqadd16(i32 %a, i32 %b) nounwind {
299; CHECK-LABEL: uqadd16
300; CHECK: uqadd16 r0, r0, r1
301  %tmp = call i32 @llvm.arm.uqadd16(i32 %a, i32 %b)
302  ret i32 %tmp
303}
304
305define i32 @uqasx(i32 %a, i32 %b) nounwind {
306; CHECK-LABEL: uqasx
307; CHECK: uqasx r0, r0, r1
308  %tmp = call i32 @llvm.arm.uqasx(i32 %a, i32 %b)
309  ret i32 %tmp
310}
311
312define i32 @uqsax(i32 %a, i32 %b) nounwind {
313; CHECK-LABEL: uqsax
314; CHECK: uqsax r0, r0, r1
315  %tmp = call i32 @llvm.arm.uqsax(i32 %a, i32 %b)
316  ret i32 %tmp
317}
318
319define i32 @uqsub16(i32 %a, i32 %b) nounwind {
320; CHECK-LABEL: uqsub16
321; CHECK: uqsub16 r0, r0, r1
322  %tmp = call i32 @llvm.arm.uqsub16(i32 %a, i32 %b)
323  ret i32 %tmp
324}
325
326define i32 @usax(i32 %a, i32 %b) nounwind {
327; CHECK-LABEL: usax
328; CHECK: usax r0, r0, r1
329  %tmp = call i32 @llvm.arm.usax(i32 %a, i32 %b)
330  ret i32 %tmp
331}
332
333define i32 @usub16(i32 %a, i32 %b) nounwind {
334; CHECK-LABEL: usub16
335; CHECK: usub16 r0, r0, r1
336  %tmp = call i32 @llvm.arm.usub16(i32 %a, i32 %b)
337  ret i32 %tmp
338}
339
340define i32 @smlad(i32 %a, i32 %b, i32 %c) nounwind {
341; CHECK-LABEL: smlad
342; CHECK: smlad r0, r0, r1, r2
343  %tmp = call i32 @llvm.arm.smlad(i32 %a, i32 %b, i32 %c)
344  ret i32 %tmp
345}
346
347define i32 @smladx(i32 %a, i32 %b, i32 %c) nounwind {
348; CHECK-LABEL: smladx
349; CHECK: smladx r0, r0, r1, r2
350  %tmp = call i32 @llvm.arm.smladx(i32 %a, i32 %b, i32 %c)
351  ret i32 %tmp
352}
353
354define i64 @smlald(i32 %a, i32 %b, i64 %c) nounwind {
355; CHECK-LABEL: smlald
356; CHECK: smlald r2, r3, r0, r1
357  %tmp = call i64 @llvm.arm.smlald(i32 %a, i32 %b, i64 %c)
358  ret i64 %tmp
359}
360
361define i64 @smlaldx(i32 %a, i32 %b, i64 %c) nounwind {
362; CHECK-LABEL: smlaldx
363; CHECK: smlaldx r2, r3, r0, r1
364  %tmp = call i64 @llvm.arm.smlaldx(i32 %a, i32 %b, i64 %c)
365  ret i64 %tmp
366}
367
368define i32 @smlsd(i32 %a, i32 %b, i32 %c) nounwind {
369; CHECK-LABEL: smlsd
370; CHECK: smlsd r0, r0, r1, r2
371  %tmp = call i32 @llvm.arm.smlsd(i32 %a, i32 %b, i32 %c)
372  ret i32 %tmp
373}
374
375define i32 @smlsdx(i32 %a, i32 %b, i32 %c) nounwind {
376; CHECK-LABEL: smlsdx
377; CHECK: smlsdx r0, r0, r1, r2
378  %tmp = call i32 @llvm.arm.smlsdx(i32 %a, i32 %b, i32 %c)
379  ret i32 %tmp
380}
381
382define i64 @smlsld(i32 %a, i32 %b, i64 %c) nounwind {
383; CHECK-LABEL: smlsld
384; CHECK: smlsld r2, r3, r0, r1
385  %tmp = call i64 @llvm.arm.smlsld(i32 %a, i32 %b, i64 %c)
386  ret i64 %tmp
387}
388
389define i64 @smlsldx(i32 %a, i32 %b, i64 %c) nounwind {
390; CHECK-LABEL: smlsldx
391; CHECK: smlsldx r2, r3, r0, r1
392  %tmp = call i64 @llvm.arm.smlsldx(i32 %a, i32 %b, i64 %c)
393  ret i64 %tmp
394}
395
396define i32 @smuad(i32 %a, i32 %b) nounwind {
397; CHECK-LABEL: smuad
398; CHECK: smuad r0, r0, r1
399  %tmp = call i32 @llvm.arm.smuad(i32 %a, i32 %b)
400  ret i32 %tmp
401}
402
403define i32 @smuadx(i32 %a, i32 %b) nounwind {
404;CHECK-LABEL: smuadx
405; CHECK: smuadx r0, r0, r1
406  %tmp = call i32 @llvm.arm.smuadx(i32 %a, i32 %b)
407  ret i32 %tmp
408}
409
410define i32 @smusd(i32 %a, i32 %b) nounwind {
411; CHECK-LABEL: smusd
412; CHECK: smusd r0, r0, r1
413  %tmp = call i32 @llvm.arm.smusd(i32 %a, i32 %b)
414  ret i32 %tmp
415}
416
417define i32 @smusdx(i32 %a, i32 %b) nounwind {
418; CHECK-LABEL: smusdx
419; CHECK: smusdx r0, r0, r1
420  %tmp = call i32 @llvm.arm.smusdx(i32 %a, i32 %b)
421  ret i32 %tmp
422}
423declare i32 @llvm.arm.ssat(i32, i32) nounwind readnone
424declare i32 @llvm.arm.usat(i32, i32) nounwind readnone
425declare i32 @llvm.arm.ssat16(i32, i32) nounwind
426declare i32 @llvm.arm.usat16(i32, i32) nounwind
427declare i32 @llvm.arm.sxtab16(i32, i32)
428declare i32 @llvm.arm.sxtb16(i32)
429declare i32 @llvm.arm.uxtab16(i32, i32)
430declare i32 @llvm.arm.uxtb16(i32)
431declare i32 @llvm.arm.sel(i32, i32) nounwind
432declare i32 @llvm.arm.qadd8(i32, i32) nounwind
433declare i32 @llvm.arm.qsub8(i32, i32) nounwind
434declare i32 @llvm.arm.sadd8(i32, i32) nounwind
435declare i32 @llvm.arm.shadd8(i32, i32) nounwind
436declare i32 @llvm.arm.shsub8(i32, i32) nounwind
437declare i32 @llvm.arm.ssub8(i32, i32) nounwind
438declare i32 @llvm.arm.uadd8(i32, i32) nounwind
439declare i32 @llvm.arm.uhadd8(i32, i32) nounwind
440declare i32 @llvm.arm.uhsub8(i32, i32) nounwind
441declare i32 @llvm.arm.uqadd8(i32, i32) nounwind
442declare i32 @llvm.arm.uqsub8(i32, i32) nounwind
443declare i32 @llvm.arm.usub8(i32, i32) nounwind
444declare i32 @llvm.arm.usad8(i32, i32) nounwind readnone
445declare i32 @llvm.arm.usada8(i32, i32, i32) nounwind readnone
446declare i32 @llvm.arm.qadd16(i32, i32) nounwind
447declare i32 @llvm.arm.qasx(i32, i32) nounwind
448declare i32 @llvm.arm.qsax(i32, i32) nounwind
449declare i32 @llvm.arm.qsub16(i32, i32) nounwind
450declare i32 @llvm.arm.sadd16(i32, i32) nounwind
451declare i32 @llvm.arm.sasx(i32, i32) nounwind
452declare i32 @llvm.arm.shadd16(i32, i32) nounwind
453declare i32 @llvm.arm.shasx(i32, i32) nounwind
454declare i32 @llvm.arm.shsax(i32, i32) nounwind
455declare i32 @llvm.arm.shsub16(i32, i32) nounwind
456declare i32 @llvm.arm.ssax(i32, i32) nounwind
457declare i32 @llvm.arm.ssub16(i32, i32) nounwind
458declare i32 @llvm.arm.uadd16(i32, i32) nounwind
459declare i32 @llvm.arm.uasx(i32, i32) nounwind
460declare i32 @llvm.arm.usax(i32, i32) nounwind
461declare i32 @llvm.arm.uhadd16(i32, i32) nounwind
462declare i32 @llvm.arm.uhasx(i32, i32) nounwind
463declare i32 @llvm.arm.uhsax(i32, i32) nounwind
464declare i32 @llvm.arm.uhsub16(i32, i32) nounwind
465declare i32 @llvm.arm.uqadd16(i32, i32) nounwind
466declare i32 @llvm.arm.uqasx(i32, i32) nounwind
467declare i32 @llvm.arm.uqsax(i32, i32) nounwind
468declare i32 @llvm.arm.uqsub16(i32, i32) nounwind
469declare i32 @llvm.arm.usub16(i32, i32) nounwind
470declare i32 @llvm.arm.smlad(i32, i32, i32) nounwind
471declare i32 @llvm.arm.smladx(i32, i32, i32) nounwind
472declare i64 @llvm.arm.smlald(i32, i32, i64) nounwind
473declare i64 @llvm.arm.smlaldx(i32, i32, i64) nounwind
474declare i32 @llvm.arm.smlsd(i32, i32, i32) nounwind
475declare i32 @llvm.arm.smlsdx(i32, i32, i32) nounwind
476declare i64 @llvm.arm.smlsld(i32, i32, i64) nounwind
477declare i64 @llvm.arm.smlsldx(i32, i32, i64) nounwind
478declare i32 @llvm.arm.smuad(i32, i32) nounwind
479declare i32 @llvm.arm.smuadx(i32, i32) nounwind
480declare i32 @llvm.arm.smusd(i32, i32) nounwind
481declare i32 @llvm.arm.smusdx(i32, i32) nounwind
482