1; RUN: llc -mtriple armv8-unknown-linux -o - < %s | FileCheck %s
2
3define <2 x float> @test_float(<6 x float>* %src) {
4  %v= load <6 x float>, <6 x float>* %src, align 1
5  %r = shufflevector <6 x float> %v, <6 x float> undef, <2 x i32> <i32 2, i32 5>
6  ret <2 x float> %r
7}
8; CHECK-LABEL: test_float
9; CHECK: vld3.32    {d16, d17, d18}, [r0]
10
11define <2 x i32> @test_i32(<6 x i32>* %src) {
12  %v= load <6 x i32>, <6 x i32>* %src, align 1
13  %r = shufflevector <6 x i32> %v, <6 x i32> undef, <2 x i32> <i32 2, i32 5>
14  ret <2 x i32> %r
15}
16; CHECK-LABEL:  test_i32
17; CHECK: vld3.32    {d16, d17, d18}, [r0]
18
19define <4 x i16> @test_i16(<12 x i16>* %src) {
20  %v= load <12 x i16>, <12 x i16>* %src, align 1
21  %r = shufflevector <12 x i16> %v, <12 x i16> undef, <4 x i32> <i32 2, i32 5, i32 8, i32 7>
22  ret <4 x i16> %r
23}
24; CHECK-LABEL: test_i16
25; CHECK:    vld1.8  {d16, d17}, [r0]!
26; CHECK:    vmov.u16    r1, d16[2]
27
28define <8 x i8> @test_i8(<24 x i8>* %src) {
29  %v= load <24 x i8>, <24 x i8>* %src, align 1
30  %r = shufflevector <24 x i8> %v, <24 x i8> undef, <8 x i32> <i32 2, i32 5, i32 8, i32 11, i32 14, i32 17, i32 20, i32 23>
31  ret <8 x i8> %r
32}
33; CHECK-LABEL: test_i8
34; CHECK:    vld3.8	{d16, d17, d18}, [r0]
35