1; RUN: llc < %s -mtriple armv7-eabi -o - | FileCheck %s --check-prefixes=CHECK,CHECK-LE
2; RUN: llc < %s -mtriple armebv7-eabi -o - | FileCheck %s --check-prefixes=CHECK,CHECK-BE
3
4; CHECK-LABEL: vmov_i8
5; CHECK-LE: vmov.i64 d0, #0xff00000000000000{{$}}
6; CHECK-BE: vmov.i64 d0, #0xff{{$}}
7; CHECK-NEXT: bx lr
8define arm_aapcs_vfpcc <8 x i8> @vmov_i8() {
9  ret <8 x i8> <i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 -1>
10}
11
12; CHECK-LABEL: vmov_i16_a:
13; CHECK-LE: vmov.i64 d0, #0xffff000000000000{{$}}
14; CHECK-BE: vmov.i64 d0, #0xffff{{$}}
15; CHECK-NEXT: bx lr
16define arm_aapcs_vfpcc <4 x i16> @vmov_i16_a() {
17  ret <4 x i16> <i16 0, i16 0, i16 0, i16 -1>
18}
19
20; CHECK-LABEL: vmov_i16_b:
21; CHECK-LE: vmov.i64 d0, #0xff000000000000{{$}}
22; CHECK-BE: vmov.i64 d0, #0xff{{$}}
23; CHECK-NEXT: bx lr
24define arm_aapcs_vfpcc <4 x i16> @vmov_i16_b() {
25  ret <4 x i16> <i16 0, i16 0, i16 0, i16 255>
26}
27
28; CHECK-LABEL: vmov_i16_c:
29; CHECK-LE: vmov.i64 d0, #0xff00000000000000{{$}}
30; CHECK-BE: vmov.i64 d0, #0xff00{{$}}
31; CHECK-NEXT: bx lr
32define arm_aapcs_vfpcc <4 x i16> @vmov_i16_c() {
33  ret <4 x i16> <i16 0, i16 0, i16 0, i16 65280>
34}
35
36; CHECK-LABEL: vmov_i32_a:
37; CHECK-LE: vmov.i64 d0, #0xffffffff00000000{{$}}
38; CHECK-BE: vmov.i64 d0, #0xffffffff{{$}}
39; CHECK-NEXT: bx lr
40define arm_aapcs_vfpcc <2 x i32> @vmov_i32_a() {
41  ret <2 x i32> <i32 0, i32 -1>
42}
43
44; CHECK-LABEL: vmov_i32_b:
45; CHECK-LE: vmov.i64 d0, #0xff00000000{{$}}
46; CHECK-BE: vmov.i64 d0, #0xff{{$}}
47; CHECK-NEXT: bx lr
48define arm_aapcs_vfpcc <2 x i32> @vmov_i32_b() {
49  ret <2 x i32> <i32 0, i32 255>
50}
51
52; CHECK-LABEL: vmov_i32_c:
53; CHECK-LE: vmov.i64 d0, #0xff0000000000{{$}}
54; CHECK-BE: vmov.i64 d0, #0xff00{{$}}
55; CHECK-NEXT: bx lr
56define arm_aapcs_vfpcc <2 x i32> @vmov_i32_c() {
57  ret <2 x i32> <i32 0, i32 65280>
58}
59
60; CHECK-LABEL: vmov_i32_d:
61; CHECK-LE: vmov.i64 d0, #0xff000000000000{{$}}
62; CHECK-BE: vmov.i64 d0, #0xff0000{{$}}
63; CHECK-NEXT: bx lr
64define arm_aapcs_vfpcc <2 x i32> @vmov_i32_d() {
65  ret <2 x i32> <i32 0, i32 16711680>
66}
67
68; CHECK-LABEL: vmov_i32_e:
69; CHECK-LE: vmov.i64 d0, #0xff00000000000000{{$}}
70; CHECK-BE: vmov.i64 d0, #0xff000000{{$}}
71; CHECK-NEXT: bx lr
72define arm_aapcs_vfpcc <2 x i32> @vmov_i32_e() {
73  ret <2 x i32> <i32 0, i32 4278190080>
74}
75
76; CHECK-LABEL: vmov_i64_a:
77; CHECK: vmov.i8 d0, #0xff{{$}}
78; CHECK-NEXT: bx lr
79define arm_aapcs_vfpcc <1 x i64> @vmov_i64_a() {
80  ret <1 x i64> <i64 -1>
81}
82
83; CHECK-LABEL: vmov_i64_b:
84; CHECK: vmov.i64 d0, #0xffff00ff0000ff{{$}}
85; CHECK-NEXT: bx lr
86define arm_aapcs_vfpcc <1 x i64> @vmov_i64_b() {
87  ret <1 x i64> <i64 72056498804490495>
88}
89