1# RUN: llc -mtriple=thumbv8m.main -mcpu=cortex-m33 --float-abi=hard --run-pass=arm-pseudo %s -o - | \
2# RUN: FileCheck %s
3--- |
4  ; ModuleID = 'cmse-vlldm-no-reorder.ll'
5  source_filename = "cmse-vlldm-no-reorder.ll"
6  target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
7  target triple = "thumbv8m.main"
8
9  @g = hidden local_unnamed_addr global float (...)* null, align 4
10  @a = hidden local_unnamed_addr global float 0.000000e+00, align 4
11
12  ; Function Attrs: nounwind
13  define hidden void @f() local_unnamed_addr #0 {
14  entry:
15    %0 = load float ()*, float ()** bitcast (float (...)** @g to float ()**), align 4
16    %call = tail call nnan ninf nsz float %0() #2
17    store float %call, float* @a, align 4
18    ret void
19  }
20
21  ; Function Attrs: nounwind
22  declare void @llvm.stackprotector(i8*, i8**) #1
23
24  attributes #0 = { nounwind "target-cpu"="cortex-m33" }
25  attributes #1 = { nounwind }
26  attributes #2 = { nounwind "cmse_nonsecure_call" }
27
28...
29---
30name:            f
31alignment:       2
32exposesReturnsTwice: false
33legalized:       false
34regBankSelected: false
35selected:        false
36failedISel:      false
37tracksRegLiveness: true
38hasWinCFI:       false
39registers:       []
40liveins:         []
41frameInfo:
42  isFrameAddressTaken: false
43  isReturnAddressTaken: false
44  hasStackMap:     false
45  hasPatchPoint:   false
46  stackSize:       8
47  offsetAdjustment: 0
48  maxAlignment:    4
49  adjustsStack:    true
50  hasCalls:        true
51  stackProtector:  ''
52  maxCallFrameSize: 0
53  cvBytesOfCalleeSavedRegisters: 0
54  hasOpaqueSPAdjustment: false
55  hasVAStart:      false
56  hasMustTailInVarArgFunc: false
57  localFrameSize:  0
58  savePoint:       ''
59  restorePoint:    ''
60fixedStack:      []
61stack:
62  - { id: 0, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4,
63      stack-id: default, callee-saved-register: '$lr', callee-saved-restored: false,
64      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
65  - { id: 1, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4,
66      stack-id: default, callee-saved-register: '$r7', callee-saved-restored: true,
67      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
68callSites:       []
69constants:       []
70machineFunctionInfo: {}
71body:             |
72  bb.0.entry:
73    liveins: $r7, $lr
74
75    $sp = frame-setup t2STMDB_UPD $sp, 14 /* CC::al */, $noreg, killed $r7, killed $lr
76    frame-setup CFI_INSTRUCTION def_cfa_offset 8
77    frame-setup CFI_INSTRUCTION offset $lr, -4
78    frame-setup CFI_INSTRUCTION offset $r7, -8
79    renamable $r0 = t2MOVi32imm @g
80    renamable $r0 = t2LDRi12 killed renamable $r0, 0, 14 /* CC::al */, $noreg :: (dereferenceable load 4 from `float ()** bitcast (float (...)** @g to float ()**)`)
81    tBLXNS_CALL killed renamable $r0, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp, implicit-def $s0
82    renamable $r0 = t2MOVi32imm @a
83    VSTRS killed renamable $s0, killed renamable $r0, 0, 14 /* CC::al */, $noreg :: (store 4 into @a)
84    $sp = frame-destroy t2LDMIA_RET $sp, 14 /* CC::al */, $noreg, def $r7, def $pc
85
86...
87
88# CHECK-LABEL: bb.0.entry:
89# CHECK: $sp = t2STMDB_UPD $sp, 14 /* CC::al */, $noreg, $r4, $r5, $r6, undef $r7, $r8, $r9, $r10, $r11
90# CHECK-NEXT:  $r0 = t2BICri $r0, 1, 14 /* CC::al */, $noreg, $noreg
91# CHECK-NEXT:  $sp = tSUBspi $sp, 34, 14 /* CC::al */, $noreg
92# CHECK-NEXT:  VLSTM $sp, 14 /* CC::al */, $noreg, implicit undef $vpr, implicit undef $fpscr, implicit undef $fpscr_nzcv, implicit undef $q0, implicit undef $q1, implicit undef $q2, implicit undef $q3, implicit undef $q4, implicit undef $q5, implicit undef $q6, implicit undef $q7
93# CHECK-NEXT:  $r1 = tMOVr $r0, 14 /* CC::al */, $noreg
94# CHECK-NEXT:  $r2 = tMOVr $r0, 14 /* CC::al */, $noreg
95# CHECK-NEXT:  $r3 = tMOVr $r0, 14 /* CC::al */, $noreg
96# CHECK-NEXT:  $r4 = tMOVr $r0, 14 /* CC::al */, $noreg
97# CHECK-NEXT:  $r5 = tMOVr $r0, 14 /* CC::al */, $noreg
98# CHECK-NEXT:  $r6 = tMOVr $r0, 14 /* CC::al */, $noreg
99# CHECK-NEXT:  $r7 = tMOVr $r0, 14 /* CC::al */, $noreg
100# CHECK-NEXT:  $r8 = tMOVr $r0, 14 /* CC::al */, $noreg
101# CHECK-NEXT:  $r9 = tMOVr $r0, 14 /* CC::al */, $noreg
102# CHECK-NEXT:  $r10 = tMOVr $r0, 14 /* CC::al */, $noreg
103# CHECK-NEXT:  $r11 = tMOVr $r0, 14 /* CC::al */, $noreg
104# CHECK-NEXT:  $r12 = tMOVr $r0, 14 /* CC::al */, $noreg
105# CHECK-NEXT:  t2MSR_M 3072, $r0, 14 /* CC::al */, $noreg, implicit-def $cpsr
106# CHECK-NEXT:  tBLXNSr 14 /* CC::al */, $noreg, killed $r0, csr_aapcs, implicit-def $lr, implicit $sp, implicit-def dead $lr, implicit $sp, implicit-def $sp, implicit-def $s0
107# CHECK-NEXT:  $r12 = VMOVRS $s0, 14 /* CC::al */, $noreg
108# CHECK-NEXT:  VLLDM $sp, 14 /* CC::al */, $noreg, implicit-def $q0, implicit-def $q1, implicit-def $q2, implicit-def $q3, implicit-def $q4, implicit-def $q5, implicit-def $q6, implicit-def $q7, implicit-def $vpr, implicit-def $fpscr, implicit-def $fpscr_nzcv
109# CHECK-NEXT:  $s0 = VMOVSR $r12, 14 /* CC::al */, $noreg
110# CHECK-NEXT:  $sp = tADDspi $sp, 34, 14 /* CC::al */, $noreg
111# CHECK-NEXT:  $sp = t2LDMIA_UPD $sp, 14 /* CC::al */, $noreg, def $r4, def $r5, def $r6, def $r7, def $r8, def $r9, def $r10, def $r11
112