1; RUN: llc < %s -mtriple=armv7-apple-darwin | FileCheck %s
2; PHI elimination shouldn't break backedge.
3
4%struct.list_data_s = type { i16, i16 }
5%struct.list_head = type { %struct.list_head*, %struct.list_data_s* }
6
7define arm_apcscc %struct.list_head* @t1(%struct.list_head* %list) nounwind {
8entry:
9; CHECK-LABEL: t1:
10  %0 = icmp eq %struct.list_head* %list, null
11  br i1 %0, label %bb2, label %bb
12
13bb:
14; CHECK: LBB0_1:
15; CHECK: LBB0_[[LABEL:[0-9]]]:
16; CHECK: bne LBB0_[[LABEL]]
17; CHECK-NOT: b LBB0_[[LABEL]]
18; CHECK: bx lr
19  %list_addr.05 = phi %struct.list_head* [ %2, %bb ], [ %list, %entry ]
20  %next.04 = phi %struct.list_head* [ %list_addr.05, %bb ], [ null, %entry ]
21  %1 = getelementptr inbounds %struct.list_head, %struct.list_head* %list_addr.05, i32 0, i32 0
22  %2 = load %struct.list_head*, %struct.list_head** %1, align 4
23  store %struct.list_head* %next.04, %struct.list_head** %1, align 4
24  %3 = icmp eq %struct.list_head* %2, null
25  br i1 %3, label %bb2, label %bb
26
27bb2:
28  %next.0.lcssa = phi %struct.list_head* [ null, %entry ], [ %list_addr.05, %bb ]
29  ret %struct.list_head* %next.0.lcssa
30}
31
32; Optimize loop entry, eliminate intra loop branches
33define i32 @t2(i32 %passes, i32* nocapture %src, i32 %size) nounwind readonly {
34entry:
35; CHECK-LABEL: t2:
36  %0 = icmp eq i32 %passes, 0                     ; <i1> [#uses=1]
37  br i1 %0, label %bb5, label %bb.nph15
38
39bb1:                                              ; preds = %bb2.preheader, %bb1
40; CHECK: LBB1_[[BB3:.]]: @ %bb3
41; CHECK: LBB1_[[PREHDR:.]]: @ %bb2.preheader
42; CHECK: bmi LBB1_[[BB3]]
43  %indvar = phi i32 [ %indvar.next, %bb1 ], [ 0, %bb2.preheader ] ; <i32> [#uses=2]
44  %sum.08 = phi i32 [ %2, %bb1 ], [ %sum.110, %bb2.preheader ] ; <i32> [#uses=1]
45  %tmp17 = sub i32 %i.07, %indvar                 ; <i32> [#uses=1]
46  %scevgep = getelementptr i32, i32* %src, i32 %tmp17  ; <i32*> [#uses=1]
47  %1 = load i32, i32* %scevgep, align 4                ; <i32> [#uses=1]
48  %2 = add nsw i32 %1, %sum.08                    ; <i32> [#uses=2]
49  %indvar.next = add i32 %indvar, 1               ; <i32> [#uses=2]
50  %exitcond = icmp eq i32 %indvar.next, %size     ; <i1> [#uses=1]
51  br i1 %exitcond, label %bb3, label %bb1
52
53bb3:                                              ; preds = %bb1, %bb2.preheader
54; CHECK: LBB1_[[BB1:.]]: @ %bb1
55; CHECK: bne LBB1_[[BB1]]
56  %sum.0.lcssa = phi i32 [ %sum.110, %bb2.preheader ], [ %2, %bb1 ] ; <i32> [#uses=2]
57  %3 = add i32 %pass.011, 1                       ; <i32> [#uses=2]
58  %exitcond18 = icmp eq i32 %3, %passes           ; <i1> [#uses=1]
59  br i1 %exitcond18, label %bb5, label %bb2.preheader
60
61bb.nph15:                                         ; preds = %entry
62  %i.07 = add i32 %size, -1                       ; <i32> [#uses=2]
63  %4 = icmp sgt i32 %i.07, -1                     ; <i1> [#uses=1]
64  br label %bb2.preheader
65
66bb2.preheader:                                    ; preds = %bb3, %bb.nph15
67  %pass.011 = phi i32 [ 0, %bb.nph15 ], [ %3, %bb3 ] ; <i32> [#uses=1]
68  %sum.110 = phi i32 [ 0, %bb.nph15 ], [ %sum.0.lcssa, %bb3 ] ; <i32> [#uses=2]
69  br i1 %4, label %bb1, label %bb3
70
71bb5:                                              ; preds = %bb3, %entry
72  %sum.1.lcssa = phi i32 [ 0, %entry ], [ %sum.0.lcssa, %bb3 ] ; <i32> [#uses=1]
73  ret i32 %sum.1.lcssa
74}
75