1# RUN: llc -mtriple=arm-none-eabi -run-pass=arm-cp-islands %s -o - | FileCheck %s
2#
3# This checks alignment of a block when a CPE is placed before/after a
4# block (as e.g. opposed to splitting up a block).
5#
6--- |
7  ; ModuleID = '<stdin>'
8  source_filename = "<stdin>"
9  target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
10  target triple = "arm-arm--eabi"
11
12  declare i32 @llvm.arm.space(i32, i32) #0
13
14  define dso_local i32 @CP() #1 {
15  entry:
16    %res = alloca half, align 2
17    store half 0xH706B, half* %res, align 2
18    %0 = load half, half* %res, align 2
19    %tobool = fcmp une half %0, 0xH0000
20    br i1 %tobool, label %LA, label %END
21
22  LA:                                               ; preds = %entry
23    %1 = call i32 @llvm.arm.space(i32 1000, i32 undef)
24    br label %END
25
26  END:                                              ; preds = %LA, %entry
27    %2 = call i32 @llvm.arm.space(i32 100, i32 undef)
28    ret i32 42
29  }
30
31  ; Function Attrs: nounwind
32  declare void @llvm.stackprotector(i8*, i8**) #2
33
34  attributes #0 = { nounwind "target-features"="+v8.2a,+fullfp16" }
35  attributes #1 = { "target-features"="+v8.2a,+fullfp16" }
36  attributes #2 = { nounwind }
37
38...
39---
40name:            CP
41alignment:       4
42exposesReturnsTwice: false
43legalized:       false
44regBankSelected: false
45selected:        false
46tracksRegLiveness: true
47registers:
48liveins:
49frameInfo:
50  isFrameAddressTaken: false
51  isReturnAddressTaken: false
52  hasStackMap:     false
53  hasPatchPoint:   false
54  stackSize:       4
55  offsetAdjustment: 0
56  maxAlignment:    2
57  adjustsStack:    false
58  hasCalls:        false
59  stackProtector:  ''
60  maxCallFrameSize: 0
61  hasOpaqueSPAdjustment: false
62  hasVAStart:      false
63  hasMustTailInVarArgFunc: false
64  savePoint:       ''
65  restorePoint:    ''
66fixedStack:
67stack:
68  - { id: 0, name: res, type: default, offset: -2, size: 2, alignment: 2,
69      stack-id: default, callee-saved-register: '', callee-saved-restored: true,
70      local-offset: -2, debug-info-variable: '', debug-info-expression: '',
71      debug-info-location: '' }
72constants:
73  - id:              0
74    value:           half 0xH706B
75    alignment:       2
76    isTargetSpecific: false
77
78
79#CHECK:  bb.{{.*}} (align 2):
80#CHECK:    successors:
81#CHECK:    CONSTPOOL_ENTRY 1, %const{{.*}}, 2
82# We want this block to be 4 byte aligned:
83#CHECK:  bb.{{.*}}.LA (align 4):
84
85body:             |
86  bb.0.entry:
87    successors: %bb.1(0x50000000), %bb.2(0x30000000)
88
89    $sp = frame-setup SUBri $sp, 4, 14, $noreg, $noreg
90    frame-setup CFI_INSTRUCTION def_cfa_offset 4
91    renamable $s0 = VLDRH %const.0, 0, 14, $noreg :: (load 2 from constant-pool)
92    VCMPZH renamable $s0, 14, $noreg, implicit-def $fpscr_nzcv
93    VSTRH killed renamable $s0, $sp, 1, 14, $noreg :: (store 2 into %ir.res)
94    FMSTAT 14, $noreg, implicit-def $cpsr, implicit killed $fpscr_nzcv
95    Bcc %bb.2, 0, killed $cpsr
96
97  bb.1.LA:
98    successors: %bb.2(0x80000000)
99
100    dead renamable $r0 = SPACE 1000, undef renamable $r0
101
102  bb.2.END:
103    dead renamable $r0 = SPACE 100, undef renamable $r0
104    $r0 = MOVi 42, 14, $noreg, $noreg
105    $sp = ADDri $sp, 4, 14, $noreg, $noreg
106    BX_RET 14, $noreg, implicit killed $r0
107
108...
109