1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=armv6 < %s | FileCheck %s --check-prefixes=ARM,ARM6
3; RUN: llc -mtriple=armv7 < %s | FileCheck %s --check-prefixes=ARM,ARM78
4; RUN: llc -mtriple=armv8a < %s | FileCheck %s --check-prefixes=ARM,ARM78
5; RUN: llc -mtriple=thumbv6 < %s | FileCheck %s --check-prefixes=THUMB6
6; RUN: llc -mtriple=thumbv7 < %s | FileCheck %s --check-prefixes=THUMB78
7; RUN: llc -mtriple=thumbv8-eabi < %s | FileCheck %s --check-prefixes=THUMB78
8
9; These two forms are equivalent:
10;   sub %y, (xor %x, -1)
11;   add (add %x, 1), %y
12; Some targets may prefer one to the other.
13
14define i8 @scalar_i8(i8 %x, i8 %y) nounwind {
15; ARM-LABEL: scalar_i8:
16; ARM:       @ %bb.0:
17; ARM-NEXT:    add r0, r0, r1
18; ARM-NEXT:    add r0, r0, #1
19; ARM-NEXT:    bx lr
20;
21; THUMB6-LABEL: scalar_i8:
22; THUMB6:       @ %bb.0:
23; THUMB6-NEXT:    adds r0, r0, r1
24; THUMB6-NEXT:    adds r0, r0, #1
25; THUMB6-NEXT:    bx lr
26;
27; THUMB78-LABEL: scalar_i8:
28; THUMB78:       @ %bb.0:
29; THUMB78-NEXT:    add r0, r1
30; THUMB78-NEXT:    adds r0, #1
31; THUMB78-NEXT:    bx lr
32  %t0 = add i8 %x, 1
33  %t1 = add i8 %y, %t0
34  ret i8 %t1
35}
36
37define i16 @scalar_i16(i16 %x, i16 %y) nounwind {
38; ARM-LABEL: scalar_i16:
39; ARM:       @ %bb.0:
40; ARM-NEXT:    add r0, r0, r1
41; ARM-NEXT:    add r0, r0, #1
42; ARM-NEXT:    bx lr
43;
44; THUMB6-LABEL: scalar_i16:
45; THUMB6:       @ %bb.0:
46; THUMB6-NEXT:    adds r0, r0, r1
47; THUMB6-NEXT:    adds r0, r0, #1
48; THUMB6-NEXT:    bx lr
49;
50; THUMB78-LABEL: scalar_i16:
51; THUMB78:       @ %bb.0:
52; THUMB78-NEXT:    add r0, r1
53; THUMB78-NEXT:    adds r0, #1
54; THUMB78-NEXT:    bx lr
55  %t0 = add i16 %x, 1
56  %t1 = add i16 %y, %t0
57  ret i16 %t1
58}
59
60define i32 @scalar_i32(i32 %x, i32 %y) nounwind {
61; ARM-LABEL: scalar_i32:
62; ARM:       @ %bb.0:
63; ARM-NEXT:    add r0, r0, r1
64; ARM-NEXT:    add r0, r0, #1
65; ARM-NEXT:    bx lr
66;
67; THUMB6-LABEL: scalar_i32:
68; THUMB6:       @ %bb.0:
69; THUMB6-NEXT:    adds r0, r0, r1
70; THUMB6-NEXT:    adds r0, r0, #1
71; THUMB6-NEXT:    bx lr
72;
73; THUMB78-LABEL: scalar_i32:
74; THUMB78:       @ %bb.0:
75; THUMB78-NEXT:    add r0, r1
76; THUMB78-NEXT:    adds r0, #1
77; THUMB78-NEXT:    bx lr
78  %t0 = add i32 %x, 1
79  %t1 = add i32 %y, %t0
80  ret i32 %t1
81}
82
83define i64 @scalar_i64(i64 %x, i64 %y) nounwind {
84; ARM-LABEL: scalar_i64:
85; ARM:       @ %bb.0:
86; ARM-NEXT:    adds r0, r0, r2
87; ARM-NEXT:    adc r1, r1, r3
88; ARM-NEXT:    adds r0, r0, #1
89; ARM-NEXT:    adc r1, r1, #0
90; ARM-NEXT:    bx lr
91;
92; THUMB6-LABEL: scalar_i64:
93; THUMB6:       @ %bb.0:
94; THUMB6-NEXT:    mvns r1, r1
95; THUMB6-NEXT:    mvns r0, r0
96; THUMB6-NEXT:    subs r0, r2, r0
97; THUMB6-NEXT:    sbcs r3, r1
98; THUMB6-NEXT:    mov r1, r3
99; THUMB6-NEXT:    bx lr
100;
101; THUMB78-LABEL: scalar_i64:
102; THUMB78:       @ %bb.0:
103; THUMB78-NEXT:    adds r0, r0, r2
104; THUMB78-NEXT:    adcs r1, r3
105; THUMB78-NEXT:    adds r0, #1
106; THUMB78-NEXT:    adc r1, r1, #0
107; THUMB78-NEXT:    bx lr
108  %t0 = add i64 %x, 1
109  %t1 = add i64 %y, %t0
110  ret i64 %t1
111}
112
113define <16 x i8> @vector_i128_i8(<16 x i8> %x, <16 x i8> %y) nounwind {
114; ARM6-LABEL: vector_i128_i8:
115; ARM6:       @ %bb.0:
116; ARM6-NEXT:    ldrb r12, [sp, #116]
117; ARM6-NEXT:    ldrb r1, [sp, #52]
118; ARM6-NEXT:    add r1, r1, r12
119; ARM6-NEXT:    ldrb r12, [sp, #112]
120; ARM6-NEXT:    add r1, r1, #1
121; ARM6-NEXT:    strb r1, [r0, #15]
122; ARM6-NEXT:    ldrb r1, [sp, #48]
123; ARM6-NEXT:    add r1, r1, r12
124; ARM6-NEXT:    ldrb r12, [sp, #108]
125; ARM6-NEXT:    add r1, r1, #1
126; ARM6-NEXT:    strb r1, [r0, #14]
127; ARM6-NEXT:    ldrb r1, [sp, #44]
128; ARM6-NEXT:    add r1, r1, r12
129; ARM6-NEXT:    ldrb r12, [sp, #104]
130; ARM6-NEXT:    add r1, r1, #1
131; ARM6-NEXT:    strb r1, [r0, #13]
132; ARM6-NEXT:    ldrb r1, [sp, #40]
133; ARM6-NEXT:    add r1, r1, r12
134; ARM6-NEXT:    ldrb r12, [sp, #100]
135; ARM6-NEXT:    add r1, r1, #1
136; ARM6-NEXT:    strb r1, [r0, #12]
137; ARM6-NEXT:    ldrb r1, [sp, #36]
138; ARM6-NEXT:    add r1, r1, r12
139; ARM6-NEXT:    ldrb r12, [sp, #96]
140; ARM6-NEXT:    add r1, r1, #1
141; ARM6-NEXT:    strb r1, [r0, #11]
142; ARM6-NEXT:    ldrb r1, [sp, #32]
143; ARM6-NEXT:    add r1, r1, r12
144; ARM6-NEXT:    ldrb r12, [sp, #92]
145; ARM6-NEXT:    add r1, r1, #1
146; ARM6-NEXT:    strb r1, [r0, #10]
147; ARM6-NEXT:    ldrb r1, [sp, #28]
148; ARM6-NEXT:    add r1, r1, r12
149; ARM6-NEXT:    ldrb r12, [sp, #88]
150; ARM6-NEXT:    add r1, r1, #1
151; ARM6-NEXT:    strb r1, [r0, #9]
152; ARM6-NEXT:    ldrb r1, [sp, #24]
153; ARM6-NEXT:    add r1, r1, r12
154; ARM6-NEXT:    ldrb r12, [sp, #84]
155; ARM6-NEXT:    add r1, r1, #1
156; ARM6-NEXT:    strb r1, [r0, #8]
157; ARM6-NEXT:    ldrb r1, [sp, #20]
158; ARM6-NEXT:    add r1, r1, r12
159; ARM6-NEXT:    ldrb r12, [sp, #80]
160; ARM6-NEXT:    add r1, r1, #1
161; ARM6-NEXT:    strb r1, [r0, #7]
162; ARM6-NEXT:    ldrb r1, [sp, #16]
163; ARM6-NEXT:    add r1, r1, r12
164; ARM6-NEXT:    ldrb r12, [sp, #76]
165; ARM6-NEXT:    add r1, r1, #1
166; ARM6-NEXT:    strb r1, [r0, #6]
167; ARM6-NEXT:    ldrb r1, [sp, #12]
168; ARM6-NEXT:    add r1, r1, r12
169; ARM6-NEXT:    ldrb r12, [sp, #72]
170; ARM6-NEXT:    add r1, r1, #1
171; ARM6-NEXT:    strb r1, [r0, #5]
172; ARM6-NEXT:    ldrb r1, [sp, #8]
173; ARM6-NEXT:    add r1, r1, r12
174; ARM6-NEXT:    ldrb r12, [sp, #68]
175; ARM6-NEXT:    add r1, r1, #1
176; ARM6-NEXT:    strb r1, [r0, #4]
177; ARM6-NEXT:    ldrb r1, [sp, #4]
178; ARM6-NEXT:    add r1, r1, r12
179; ARM6-NEXT:    ldrb r12, [sp, #64]
180; ARM6-NEXT:    add r1, r1, #1
181; ARM6-NEXT:    strb r1, [r0, #3]
182; ARM6-NEXT:    ldrb r1, [sp]
183; ARM6-NEXT:    add r1, r1, r12
184; ARM6-NEXT:    add r1, r1, #1
185; ARM6-NEXT:    strb r1, [r0, #2]
186; ARM6-NEXT:    ldrb r1, [sp, #60]
187; ARM6-NEXT:    add r1, r3, r1
188; ARM6-NEXT:    add r1, r1, #1
189; ARM6-NEXT:    strb r1, [r0, #1]
190; ARM6-NEXT:    ldrb r1, [sp, #56]
191; ARM6-NEXT:    add r1, r2, r1
192; ARM6-NEXT:    add r1, r1, #1
193; ARM6-NEXT:    strb r1, [r0]
194; ARM6-NEXT:    bx lr
195;
196; ARM78-LABEL: vector_i128_i8:
197; ARM78:       @ %bb.0:
198; ARM78-NEXT:    vmov d17, r2, r3
199; ARM78-NEXT:    vmov d16, r0, r1
200; ARM78-NEXT:    mov r0, sp
201; ARM78-NEXT:    vmvn q8, q8
202; ARM78-NEXT:    vld1.64 {d18, d19}, [r0]
203; ARM78-NEXT:    vsub.i8 q8, q9, q8
204; ARM78-NEXT:    vmov r0, r1, d16
205; ARM78-NEXT:    vmov r2, r3, d17
206; ARM78-NEXT:    bx lr
207;
208; THUMB6-LABEL: vector_i128_i8:
209; THUMB6:       @ %bb.0:
210; THUMB6-NEXT:    push {r4, lr}
211; THUMB6-NEXT:    ldr r1, [sp, #124]
212; THUMB6-NEXT:    ldr r4, [sp, #60]
213; THUMB6-NEXT:    adds r1, r4, r1
214; THUMB6-NEXT:    adds r1, r1, #1
215; THUMB6-NEXT:    strb r1, [r0, #15]
216; THUMB6-NEXT:    ldr r1, [sp, #120]
217; THUMB6-NEXT:    ldr r4, [sp, #56]
218; THUMB6-NEXT:    adds r1, r4, r1
219; THUMB6-NEXT:    adds r1, r1, #1
220; THUMB6-NEXT:    strb r1, [r0, #14]
221; THUMB6-NEXT:    ldr r1, [sp, #116]
222; THUMB6-NEXT:    ldr r4, [sp, #52]
223; THUMB6-NEXT:    adds r1, r4, r1
224; THUMB6-NEXT:    adds r1, r1, #1
225; THUMB6-NEXT:    strb r1, [r0, #13]
226; THUMB6-NEXT:    ldr r1, [sp, #112]
227; THUMB6-NEXT:    ldr r4, [sp, #48]
228; THUMB6-NEXT:    adds r1, r4, r1
229; THUMB6-NEXT:    adds r1, r1, #1
230; THUMB6-NEXT:    strb r1, [r0, #12]
231; THUMB6-NEXT:    ldr r1, [sp, #108]
232; THUMB6-NEXT:    ldr r4, [sp, #44]
233; THUMB6-NEXT:    adds r1, r4, r1
234; THUMB6-NEXT:    adds r1, r1, #1
235; THUMB6-NEXT:    strb r1, [r0, #11]
236; THUMB6-NEXT:    ldr r1, [sp, #104]
237; THUMB6-NEXT:    ldr r4, [sp, #40]
238; THUMB6-NEXT:    adds r1, r4, r1
239; THUMB6-NEXT:    adds r1, r1, #1
240; THUMB6-NEXT:    strb r1, [r0, #10]
241; THUMB6-NEXT:    ldr r1, [sp, #100]
242; THUMB6-NEXT:    ldr r4, [sp, #36]
243; THUMB6-NEXT:    adds r1, r4, r1
244; THUMB6-NEXT:    adds r1, r1, #1
245; THUMB6-NEXT:    strb r1, [r0, #9]
246; THUMB6-NEXT:    ldr r1, [sp, #96]
247; THUMB6-NEXT:    ldr r4, [sp, #32]
248; THUMB6-NEXT:    adds r1, r4, r1
249; THUMB6-NEXT:    adds r1, r1, #1
250; THUMB6-NEXT:    strb r1, [r0, #8]
251; THUMB6-NEXT:    ldr r1, [sp, #92]
252; THUMB6-NEXT:    ldr r4, [sp, #28]
253; THUMB6-NEXT:    adds r1, r4, r1
254; THUMB6-NEXT:    adds r1, r1, #1
255; THUMB6-NEXT:    strb r1, [r0, #7]
256; THUMB6-NEXT:    ldr r1, [sp, #88]
257; THUMB6-NEXT:    ldr r4, [sp, #24]
258; THUMB6-NEXT:    adds r1, r4, r1
259; THUMB6-NEXT:    adds r1, r1, #1
260; THUMB6-NEXT:    strb r1, [r0, #6]
261; THUMB6-NEXT:    ldr r1, [sp, #84]
262; THUMB6-NEXT:    ldr r4, [sp, #20]
263; THUMB6-NEXT:    adds r1, r4, r1
264; THUMB6-NEXT:    adds r1, r1, #1
265; THUMB6-NEXT:    strb r1, [r0, #5]
266; THUMB6-NEXT:    ldr r1, [sp, #80]
267; THUMB6-NEXT:    ldr r4, [sp, #16]
268; THUMB6-NEXT:    adds r1, r4, r1
269; THUMB6-NEXT:    adds r1, r1, #1
270; THUMB6-NEXT:    strb r1, [r0, #4]
271; THUMB6-NEXT:    ldr r1, [sp, #76]
272; THUMB6-NEXT:    ldr r4, [sp, #12]
273; THUMB6-NEXT:    adds r1, r4, r1
274; THUMB6-NEXT:    adds r1, r1, #1
275; THUMB6-NEXT:    strb r1, [r0, #3]
276; THUMB6-NEXT:    ldr r1, [sp, #72]
277; THUMB6-NEXT:    ldr r4, [sp, #8]
278; THUMB6-NEXT:    adds r1, r4, r1
279; THUMB6-NEXT:    adds r1, r1, #1
280; THUMB6-NEXT:    strb r1, [r0, #2]
281; THUMB6-NEXT:    ldr r1, [sp, #68]
282; THUMB6-NEXT:    adds r1, r3, r1
283; THUMB6-NEXT:    adds r1, r1, #1
284; THUMB6-NEXT:    strb r1, [r0, #1]
285; THUMB6-NEXT:    ldr r1, [sp, #64]
286; THUMB6-NEXT:    adds r1, r2, r1
287; THUMB6-NEXT:    adds r1, r1, #1
288; THUMB6-NEXT:    strb r1, [r0]
289; THUMB6-NEXT:    pop {r4, pc}
290;
291; THUMB78-LABEL: vector_i128_i8:
292; THUMB78:       @ %bb.0:
293; THUMB78-NEXT:    vmov d17, r2, r3
294; THUMB78-NEXT:    vmov d16, r0, r1
295; THUMB78-NEXT:    mov r0, sp
296; THUMB78-NEXT:    vmvn q8, q8
297; THUMB78-NEXT:    vld1.64 {d18, d19}, [r0]
298; THUMB78-NEXT:    vsub.i8 q8, q9, q8
299; THUMB78-NEXT:    vmov r0, r1, d16
300; THUMB78-NEXT:    vmov r2, r3, d17
301; THUMB78-NEXT:    bx lr
302  %t0 = add <16 x i8> %x, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
303  %t1 = add <16 x i8> %y, %t0
304  ret <16 x i8> %t1
305}
306
307define <8 x i16> @vector_i128_i16(<8 x i16> %x, <8 x i16> %y) nounwind {
308; ARM6-LABEL: vector_i128_i16:
309; ARM6:       @ %bb.0:
310; ARM6-NEXT:    ldrh r12, [sp, #52]
311; ARM6-NEXT:    ldrh r1, [sp, #20]
312; ARM6-NEXT:    add r1, r1, r12
313; ARM6-NEXT:    ldrh r12, [sp, #48]
314; ARM6-NEXT:    add r1, r1, #1
315; ARM6-NEXT:    strh r1, [r0, #14]
316; ARM6-NEXT:    ldrh r1, [sp, #16]
317; ARM6-NEXT:    add r1, r1, r12
318; ARM6-NEXT:    ldrh r12, [sp, #44]
319; ARM6-NEXT:    add r1, r1, #1
320; ARM6-NEXT:    strh r1, [r0, #12]
321; ARM6-NEXT:    ldrh r1, [sp, #12]
322; ARM6-NEXT:    add r1, r1, r12
323; ARM6-NEXT:    ldrh r12, [sp, #40]
324; ARM6-NEXT:    add r1, r1, #1
325; ARM6-NEXT:    strh r1, [r0, #10]
326; ARM6-NEXT:    ldrh r1, [sp, #8]
327; ARM6-NEXT:    add r1, r1, r12
328; ARM6-NEXT:    ldrh r12, [sp, #36]
329; ARM6-NEXT:    add r1, r1, #1
330; ARM6-NEXT:    strh r1, [r0, #8]
331; ARM6-NEXT:    ldrh r1, [sp, #4]
332; ARM6-NEXT:    add r1, r1, r12
333; ARM6-NEXT:    ldrh r12, [sp, #32]
334; ARM6-NEXT:    add r1, r1, #1
335; ARM6-NEXT:    strh r1, [r0, #6]
336; ARM6-NEXT:    ldrh r1, [sp]
337; ARM6-NEXT:    add r1, r1, r12
338; ARM6-NEXT:    add r1, r1, #1
339; ARM6-NEXT:    strh r1, [r0, #4]
340; ARM6-NEXT:    ldrh r1, [sp, #28]
341; ARM6-NEXT:    add r1, r3, r1
342; ARM6-NEXT:    add r1, r1, #1
343; ARM6-NEXT:    strh r1, [r0, #2]
344; ARM6-NEXT:    ldrh r1, [sp, #24]
345; ARM6-NEXT:    add r1, r2, r1
346; ARM6-NEXT:    add r1, r1, #1
347; ARM6-NEXT:    strh r1, [r0]
348; ARM6-NEXT:    bx lr
349;
350; ARM78-LABEL: vector_i128_i16:
351; ARM78:       @ %bb.0:
352; ARM78-NEXT:    vmov d17, r2, r3
353; ARM78-NEXT:    vmov d16, r0, r1
354; ARM78-NEXT:    mov r0, sp
355; ARM78-NEXT:    vmvn q8, q8
356; ARM78-NEXT:    vld1.64 {d18, d19}, [r0]
357; ARM78-NEXT:    vsub.i16 q8, q9, q8
358; ARM78-NEXT:    vmov r0, r1, d16
359; ARM78-NEXT:    vmov r2, r3, d17
360; ARM78-NEXT:    bx lr
361;
362; THUMB6-LABEL: vector_i128_i16:
363; THUMB6:       @ %bb.0:
364; THUMB6-NEXT:    push {r4, lr}
365; THUMB6-NEXT:    ldr r1, [sp, #60]
366; THUMB6-NEXT:    ldr r4, [sp, #28]
367; THUMB6-NEXT:    adds r1, r4, r1
368; THUMB6-NEXT:    adds r1, r1, #1
369; THUMB6-NEXT:    strh r1, [r0, #14]
370; THUMB6-NEXT:    ldr r1, [sp, #56]
371; THUMB6-NEXT:    ldr r4, [sp, #24]
372; THUMB6-NEXT:    adds r1, r4, r1
373; THUMB6-NEXT:    adds r1, r1, #1
374; THUMB6-NEXT:    strh r1, [r0, #12]
375; THUMB6-NEXT:    ldr r1, [sp, #52]
376; THUMB6-NEXT:    ldr r4, [sp, #20]
377; THUMB6-NEXT:    adds r1, r4, r1
378; THUMB6-NEXT:    adds r1, r1, #1
379; THUMB6-NEXT:    strh r1, [r0, #10]
380; THUMB6-NEXT:    ldr r1, [sp, #48]
381; THUMB6-NEXT:    ldr r4, [sp, #16]
382; THUMB6-NEXT:    adds r1, r4, r1
383; THUMB6-NEXT:    adds r1, r1, #1
384; THUMB6-NEXT:    strh r1, [r0, #8]
385; THUMB6-NEXT:    ldr r1, [sp, #44]
386; THUMB6-NEXT:    ldr r4, [sp, #12]
387; THUMB6-NEXT:    adds r1, r4, r1
388; THUMB6-NEXT:    adds r1, r1, #1
389; THUMB6-NEXT:    strh r1, [r0, #6]
390; THUMB6-NEXT:    ldr r1, [sp, #40]
391; THUMB6-NEXT:    ldr r4, [sp, #8]
392; THUMB6-NEXT:    adds r1, r4, r1
393; THUMB6-NEXT:    adds r1, r1, #1
394; THUMB6-NEXT:    strh r1, [r0, #4]
395; THUMB6-NEXT:    ldr r1, [sp, #36]
396; THUMB6-NEXT:    adds r1, r3, r1
397; THUMB6-NEXT:    adds r1, r1, #1
398; THUMB6-NEXT:    strh r1, [r0, #2]
399; THUMB6-NEXT:    ldr r1, [sp, #32]
400; THUMB6-NEXT:    adds r1, r2, r1
401; THUMB6-NEXT:    adds r1, r1, #1
402; THUMB6-NEXT:    strh r1, [r0]
403; THUMB6-NEXT:    pop {r4, pc}
404;
405; THUMB78-LABEL: vector_i128_i16:
406; THUMB78:       @ %bb.0:
407; THUMB78-NEXT:    vmov d17, r2, r3
408; THUMB78-NEXT:    vmov d16, r0, r1
409; THUMB78-NEXT:    mov r0, sp
410; THUMB78-NEXT:    vmvn q8, q8
411; THUMB78-NEXT:    vld1.64 {d18, d19}, [r0]
412; THUMB78-NEXT:    vsub.i16 q8, q9, q8
413; THUMB78-NEXT:    vmov r0, r1, d16
414; THUMB78-NEXT:    vmov r2, r3, d17
415; THUMB78-NEXT:    bx lr
416  %t0 = add <8 x i16> %x, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>
417  %t1 = add <8 x i16> %y, %t0
418  ret <8 x i16> %t1
419}
420
421define <4 x i32> @vector_i128_i32(<4 x i32> %x, <4 x i32> %y) nounwind {
422; ARM6-LABEL: vector_i128_i32:
423; ARM6:       @ %bb.0:
424; ARM6-NEXT:    ldr r12, [sp]
425; ARM6-NEXT:    add r0, r0, r12
426; ARM6-NEXT:    ldr r12, [sp, #4]
427; ARM6-NEXT:    add r0, r0, #1
428; ARM6-NEXT:    add r1, r1, r12
429; ARM6-NEXT:    ldr r12, [sp, #8]
430; ARM6-NEXT:    add r1, r1, #1
431; ARM6-NEXT:    add r2, r2, r12
432; ARM6-NEXT:    ldr r12, [sp, #12]
433; ARM6-NEXT:    add r2, r2, #1
434; ARM6-NEXT:    add r3, r3, r12
435; ARM6-NEXT:    add r3, r3, #1
436; ARM6-NEXT:    bx lr
437;
438; ARM78-LABEL: vector_i128_i32:
439; ARM78:       @ %bb.0:
440; ARM78-NEXT:    vmov d17, r2, r3
441; ARM78-NEXT:    vmov d16, r0, r1
442; ARM78-NEXT:    mov r0, sp
443; ARM78-NEXT:    vmvn q8, q8
444; ARM78-NEXT:    vld1.64 {d18, d19}, [r0]
445; ARM78-NEXT:    vsub.i32 q8, q9, q8
446; ARM78-NEXT:    vmov r0, r1, d16
447; ARM78-NEXT:    vmov r2, r3, d17
448; ARM78-NEXT:    bx lr
449;
450; THUMB6-LABEL: vector_i128_i32:
451; THUMB6:       @ %bb.0:
452; THUMB6-NEXT:    push {r4, lr}
453; THUMB6-NEXT:    ldr r4, [sp, #8]
454; THUMB6-NEXT:    adds r0, r0, r4
455; THUMB6-NEXT:    adds r0, r0, #1
456; THUMB6-NEXT:    ldr r4, [sp, #12]
457; THUMB6-NEXT:    adds r1, r1, r4
458; THUMB6-NEXT:    adds r1, r1, #1
459; THUMB6-NEXT:    ldr r4, [sp, #16]
460; THUMB6-NEXT:    adds r2, r2, r4
461; THUMB6-NEXT:    adds r2, r2, #1
462; THUMB6-NEXT:    ldr r4, [sp, #20]
463; THUMB6-NEXT:    adds r3, r3, r4
464; THUMB6-NEXT:    adds r3, r3, #1
465; THUMB6-NEXT:    pop {r4, pc}
466;
467; THUMB78-LABEL: vector_i128_i32:
468; THUMB78:       @ %bb.0:
469; THUMB78-NEXT:    vmov d17, r2, r3
470; THUMB78-NEXT:    vmov d16, r0, r1
471; THUMB78-NEXT:    mov r0, sp
472; THUMB78-NEXT:    vmvn q8, q8
473; THUMB78-NEXT:    vld1.64 {d18, d19}, [r0]
474; THUMB78-NEXT:    vsub.i32 q8, q9, q8
475; THUMB78-NEXT:    vmov r0, r1, d16
476; THUMB78-NEXT:    vmov r2, r3, d17
477; THUMB78-NEXT:    bx lr
478  %t0 = add <4 x i32> %x, <i32 1, i32 1, i32 1, i32 1>
479  %t1 = add <4 x i32> %y, %t0
480  ret <4 x i32> %t1
481}
482
483define <2 x i64> @vector_i128_i64(<2 x i64> %x, <2 x i64> %y) nounwind {
484; ARM6-LABEL: vector_i128_i64:
485; ARM6:       @ %bb.0:
486; ARM6-NEXT:    push {r11, lr}
487; ARM6-NEXT:    ldr lr, [sp, #8]
488; ARM6-NEXT:    ldr r12, [sp, #12]
489; ARM6-NEXT:    adds r0, r0, lr
490; ARM6-NEXT:    ldr lr, [sp, #16]
491; ARM6-NEXT:    adc r1, r1, r12
492; ARM6-NEXT:    adds r0, r0, #1
493; ARM6-NEXT:    ldr r12, [sp, #20]
494; ARM6-NEXT:    adc r1, r1, #0
495; ARM6-NEXT:    adds r2, r2, lr
496; ARM6-NEXT:    adc r3, r3, r12
497; ARM6-NEXT:    adds r2, r2, #1
498; ARM6-NEXT:    adc r3, r3, #0
499; ARM6-NEXT:    pop {r11, pc}
500;
501; ARM78-LABEL: vector_i128_i64:
502; ARM78:       @ %bb.0:
503; ARM78-NEXT:    vmov d17, r2, r3
504; ARM78-NEXT:    vmov d16, r0, r1
505; ARM78-NEXT:    mov r0, sp
506; ARM78-NEXT:    vmvn q8, q8
507; ARM78-NEXT:    vld1.64 {d18, d19}, [r0]
508; ARM78-NEXT:    vsub.i64 q8, q9, q8
509; ARM78-NEXT:    vmov r0, r1, d16
510; ARM78-NEXT:    vmov r2, r3, d17
511; ARM78-NEXT:    bx lr
512;
513; THUMB6-LABEL: vector_i128_i64:
514; THUMB6:       @ %bb.0:
515; THUMB6-NEXT:    push {r4, r5, r7, lr}
516; THUMB6-NEXT:    mvns r4, r1
517; THUMB6-NEXT:    mvns r0, r0
518; THUMB6-NEXT:    ldr r1, [sp, #20]
519; THUMB6-NEXT:    ldr r5, [sp, #16]
520; THUMB6-NEXT:    subs r0, r5, r0
521; THUMB6-NEXT:    sbcs r1, r4
522; THUMB6-NEXT:    mvns r4, r3
523; THUMB6-NEXT:    mvns r2, r2
524; THUMB6-NEXT:    ldr r3, [sp, #28]
525; THUMB6-NEXT:    ldr r5, [sp, #24]
526; THUMB6-NEXT:    subs r2, r5, r2
527; THUMB6-NEXT:    sbcs r3, r4
528; THUMB6-NEXT:    pop {r4, r5, r7, pc}
529;
530; THUMB78-LABEL: vector_i128_i64:
531; THUMB78:       @ %bb.0:
532; THUMB78-NEXT:    vmov d17, r2, r3
533; THUMB78-NEXT:    vmov d16, r0, r1
534; THUMB78-NEXT:    mov r0, sp
535; THUMB78-NEXT:    vmvn q8, q8
536; THUMB78-NEXT:    vld1.64 {d18, d19}, [r0]
537; THUMB78-NEXT:    vsub.i64 q8, q9, q8
538; THUMB78-NEXT:    vmov r0, r1, d16
539; THUMB78-NEXT:    vmov r2, r3, d17
540; THUMB78-NEXT:    bx lr
541  %t0 = add <2 x i64> %x, <i64 1, i64 1>
542  %t1 = add <2 x i64> %y, %t0
543  ret <2 x i64> %t1
544}
545